Commit d0d3b282 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

added define of TRACE macro

parent c143e134

tools/Verilog/IVerilog.xml

+1 −0
Original line number Original line Diff line number Diff line
@@ -369,6 +369,7 @@ 
					"%OutFileFull"

					"%OutFileFull"

				</if-not>

				</if-not>

				" -DIVERILOG"

				" -DIVERILOG"

				" -DTRACE"

				"%IVerilogOther"

				"%IVerilogOther"

				"%Param_TopModule"

				"%Param_TopModule"

				"%TopModulesOther"

				"%TopModulesOther"