Commit b11069c2 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

fixed template

parent f64ed7ee

templates/verilog.xml

+1 −1
Original line number Diff line number Diff line
@@ -148,7 +148,7 @@ endmodule 
    enabled="true"

    id="com.elphel.vdt.veditor.templates.verilog.newFile.GPL"

    name="Verilog GPL File"

>/!

>/*!

 * <b>Module:</b> ${modulename}

 * @file ${modulename}.v

 * @date ${year}-${month}-${day}