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Commit 62377d5d authored by Andrey Filippov's avatar Andrey Filippov
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Added ISE map, python parser for ISE tool output, bug fixes

parent 19878460
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Showing with 488 additions and 8 deletions
.project
View file @ 62377d5d
......@@ -5,6 +5,11 @@
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.python.pydev.PyDevBuilder</name>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.ui.externaltools.ExternalToolBuilder</name>
<triggers>clean,full,incremental,</triggers>
......@@ -24,5 +29,6 @@
<natures>
<nature>org.eclipse.pde.PluginNature</nature>
<nature>org.eclipse.jdt.core.javanature</nature>
<nature>org.python.pydev.pythonNature</nature>
</natures>
</projectDescription>
parsers/parser_ise.py 0 → 100644
View file @ 62377d5d
#!/usr/bin/env python
##/usr/bin/python -u
import sys
tool="EXTERNAL_TOOL"
if len(sys.argv)>1:
tool=sys.argv[1]
def isProblem(str):
if str.startswith("ERROR:") or str.startswith("WARNING:") or str.startswith("INFO:"):
return True
return False
def hasLine(str):
if '" Line ' in str:
return True
return False
def addTool(str,tool):
if hasLine(str):
return str
else:
index=str.find(" - ")+3
return str[:index]+(" \"%s\" Line 0000:"%tool)+str[index:]
# return str[:len(str)-1]+(" \"%s\" Line 0000:"%tool)+"\n"
pline=""
for line in iter(sys.stdin.readline,''):
if isProblem(pline):
if line.startswith(" ") :
pline = pline[:len(pline)-1]+line[2:]
else:
sys.stdout.write(addTool(pline,tool))
pline = line
else:
pline = line
if isProblem(pline):
sys.stdout.write(addTool(pline,tool))
src/com/elphel/vdt/VDT.java
View file @ 62377d5d
......@@ -159,6 +159,9 @@ public class VDT {
public static final String GENERATOR_ID_STATE_DIR = "StateDir";
public static final String GENERATOR_ID_STATE_FILE = "StateFile";
public static final String GENERATOR_PARSERS_PATH = "ParsersPath";
public static final String PATH_TO_PARSERS = "parsers";
public static final String TIME_STAMP_FORMAT = "yyyyMMddHHmmssSSS";
......
src/com/elphel/vdt/core/tools/generators/ParsersPathGenerator.java 0 → 100644
View file @ 62377d5d
/*******************************************************************************
* Copyright (c) 2014 Elphel, Inc.
* This file is a part of Eclipse/VDT plug-in.
* Eclipse/VDT plug-in is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* Eclipse/VDT plug-in is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*******************************************************************************/
package com.elphel.vdt.core.tools.generators;
import java.net.URI;
import java.net.URL;
import org.eclipse.core.runtime.FileLocator;
import org.eclipse.core.runtime.Path;
import com.elphel.vdt.VDT;
import com.elphel.vdt.veditor.VerilogPlugin;
public class ParsersPathGenerator extends AbstractGenerator {
public static final String NAME = VDT.GENERATOR_PARSERS_PATH;
public String getName() {
return NAME;
}
public ParsersPathGenerator()
{
super(null); // null for topFormatProcessor - this generator can not reference other parameters
}
protected String[] getStringValues() {
String path = "$nl$/" + VDT.PATH_TO_PARSERS; //$NON-NLS-1$
try {
URL url=FileLocator.find(VerilogPlugin.getDefault().getBundle(), new Path(path), null);
if(url != null) {
URI uri=FileLocator.resolve(url).toURI();
// System.out.println("ParsersPathGenerator()->"+uri.getRawPath()+" : "+uri.toString());
return new String[]{uri.getRawPath()};
}
return null;
} catch (Exception e){
return null;
}
}
}
src/com/elphel/vdt/core/tools/params/FormatProcessor.java
View file @ 62377d5d
......@@ -108,9 +108,11 @@ public class FormatProcessor {
topProcessor.setCurrentTool(context);
return;
}
if (currentTool==null) { // otherwise after using parameter belonging to baseTool, it will be changed
currentTool=(Tool) context;
}
}
}
private List<String> processTemplate(String template)
throws ToolException
......
src/com/elphel/vdt/core/tools/params/ToolSequence.java
View file @ 62377d5d
......@@ -912,8 +912,12 @@ public class ToolSequence {
IProject project = SelectedResourceManager.getDefault().getSelectedProject(); // should not be null when we got here
IFolder stateDir= project.getFolder((stateDirString==null)?"":stateDirString);
IFile target= stateDir.getFile(targetString); //null po
if (target==null){
System.out.println("Restore file for tool "+tool.getName()+" - '"+targetString+"': got null");
return false;
}
if (!target.exists()){
System.out.println("Restore file "+target.getLocation().toOSString()+" does not exist");
System.out.println("Restore file for tool "+tool.getName()+": "+target.getLocation().toOSString()+" does not exist");
return false;
}
return true;
......
src/com/elphel/vdt/core/tools/params/recognizers/SimpleGeneratorRecognizer.java
View file @ 62377d5d
......@@ -45,7 +45,8 @@ public class SimpleGeneratorRecognizer implements Recognizer {
new StateDirGenerator(processor),
new StateFileGenerator(processor),
new StateBaseGenerator(processor),
new ToolNameGenerator()
new ToolNameGenerator(),
new ParsersPathGenerator()
// new SourceListGenerator("","",""),
// new FilteredSourceListGenerator("","","")
};
......
tools/DesignMenu.xml
View file @ 62377d5d
......@@ -52,6 +52,14 @@
label="Synthesize design"
icon="Retort.png"
call="ISExst"/>
<menuitem name="ISENGDBuild"
label="Run NGDBuild"
icon="opt_blue.png"
call="ISENGDBuild"/>
<menuitem name="ISEMap"
label="Map design"
icon="map_icon.png"
call="ISEMap"/>
</menu>
<menu name="Vivado"
......
tools/FPGA_project.xml
View file @ 62377d5d
......@@ -317,6 +317,16 @@
default="%%ProjectName-synth.tgz"
type="String" format="CopyValue" />
<parameter id="ISESnapshotNGDBuild"
label="NGDBuild snapshot" tooltip="Name of ISE snapshot archive after NGDBuild"
default="%%ProjectName-ngdbuild.tgz"
type="String" format="CopyValue" />
<parameter id="ISESnapshotMap"
label="NGDBuild snapshot" tooltip="Name of ISE snapshot archive after map"
default="%%ProjectName-map.tgz"
type="String" format="CopyValue" />
<parameter id="ISESnapshotOptPlace"
label="Placement snapshot" tooltip="Name of ISE snapshot archive after optimization/placement"
default="%%ProjectName-opt-place.tgz"
......@@ -406,6 +416,8 @@
<group name="ISESnapshots" label="ISE snapshot archives">
"ISECleanRestore"
"ISESnapshotSynth"
"ISESnapshotNGDBuild"
"ISESnapshotMap"
<!-- "ISESnapshotOptPlace" -->
"ISESnapshotOpt"
"ISESnapshotOptPower"
......
tools/Xilinx_ISE/ise_map.xml 0 → 100644
View file @ 62377d5d
<?xml version="1.0" encoding="UTF-8"?>
<vdt-project>
<interface name="ISEMapInterface" extends="ISEInterface">
<typedef name="CoverModeType">
<paramtype kind= "enum" base="String">
<item value= "area" label="minimize area"/>
<item value= "speed" label="maximize speed (minimaize number of logic levels)"/>
<item value= "balanced" label="speed/area balamnced goal"/>
</paramtype>
</typedef>
<typedef name = "Cardinal_0_100">
<paramtype kind="number" lo="0" hi="100" format="%d" />
</typedef>
<typedef name="GlobalOptType">
<paramtype kind= "enum" base="String">
<item value= "off" label="no global optimization"/>
<item value= "speed" label="maximize speed (minimaize number of logic levels), not available for Virtex-4"/>
<item value= "area" label="minimize area"/>
<item value= "power" label="optimizes for minimal power, not available for Virtex-4"/>
</paramtype>
</typedef>
<typedef name="DoNotUseRLOCType">
<paramtype kind= "enum" base="String">
<item value= "all" label="disable all RLOC processing"/>
<item value= "off" label="enable all RLOC properties"/>
<item value= "place" label="only use RLOC to group elements into slices"/>
</paramtype>
</typedef>
<typedef name="LUTCombineType">
<paramtype kind= "enum" base="String">
<item value= "off" label="disable LUT combining"/>
<item value= "auto" label="moderate LUI combining, balancing compression and performance"/>
<item value= "area" label="combine LUT whenev er possible"/>
</paramtype>
</typedef>
<typedef name="MTType">
<paramtype kind= "enum" base="String">
<item value= "off" label="multi-threading off"/>
<item value= "2" label="use 2 CPU cores if available"/>
</paramtype>
</typedef>
<typedef name="OLType">
<paramtype kind= "enum" base="String">
<item value= "std" label="standard effort level"/>
<item value= "high" label="high effort level"/>
</paramtype>
</typedef>
<typedef name="PowerType">
<paramtype kind= "enum" base="String">
<item value= "on" label="standard power optimization"/>
<item value= "off" label="no power optimization"/>
<item value= "high" label="intelligent clock gating. Available for Spartan-6, Virtex-6,-7 and Zynq"/>
<item value= "xe" label="extra effort. Available for Spartan-6, Virtex-6,-7 and Zynq"/>
</paramtype>
</typedef>
<typedef name="PRIOType">
<paramtype kind= "enum" base="String">
<item value= "off" label="no register packing in I/O blocks unless 'IOB=TRUE' in constraints"/>
<item value= "i" label="attempt to pack registers in input blocks"/>
<item value= "o" label="attempt to pack registers in output blocks"/>
<item value= "b" label="attempt to pack registers in both input and output blocks"/>
</paramtype>
</typedef>
<typedef name="RegisterOrderingType">
<paramtype kind= "enum" base="String">
<item value= "4" label="4 registers per slice"/>
<item value= "off" label="disable register ordering"/>
<item value= "8" label="8 registers per slice"/>
</paramtype>
</typedef>
<typedef name="NormalContinueType">
<paramtype kind= "enum" base="String">
<item value= "n" label="normal"/>
<item value= "c" label="continue"/>
</paramtype>
</typedef>
</interface>
<tool name="ISEMap" label="run Map"
project="FPGA_project"
interface="ISEMapInterface"
package="FPGA_package"
shell="/bin/bash"
ignore="%ISEIgnoreSource"
description="Run Map"
result="ISESnapshotMap"
log-dir="ISELogDir"
state-dir="ISELocalDir"
restore="RestoreISEMap"
autosave="AutosaveISEMap"
save="SaveISEMap"
inherits="ISEToolPrototype"
>
<action-menu>
<action label="Run Map" resource="" icon="map_icon.png" />
</action-menu>
<depends-list>
<depends state="ISESnapshotNGDBuild"/>
<!-- <depends files="constraints"/>-->
</depends-list>
<parameter id="SkipSnapshotMap" label="Skip snapshot" tooltip="Do not create snapshot after Map"
default="false" type= "Boolean" format="None"/>
<parameter id="input_file" label="Design file name" tooltip= "Top level design file name"
default="%%ProjectName.ngd" visible="true" type="String" format="CopyValue"/>
<parameter id="physical_constraints_file" label="Physical constraints file" tooltip= "Physical constraints file"
default="%%ProjectName.pcf" visible="true" omit="" type="String" format="CopyValue"/>
<parameter id="extra_input_files" label="extra files" tooltip= "Extra input files to copy to the top directory before running Map"
default="" omit="" visible="true" type="Filelist" format="ParamListSyntax"/>
<parameter id="output_file" outid="o" label="Output file name" tooltip= "Output file name"
default="%%ProjectName.ncd" visible="true" omit="" type="String" format="Dash"/>
<!-- Map options -->
<parameter id="activityfile" label="Activity file" tooltip= "*.vcd or *.saif file for power optimization (only valid with -power on)"
default="" visible="true" omit="" type="String" format="Dash"/>
<parameter id="map_slice_logic" outid="bp" label="Map slice logic" tooltip="Try to use BRAM for LUTs and FFs"
default="false" omit="false" type= "Boolean" format="DashName"/>
<parameter id="pack_slices" outid="c" label="Pack slices"
tooltip="Degree to pack unrelated logic into slices (value restrictions apply, 1 - maximal density, 100 - minimal)"
default="100" omit="100" type= "Cardinal_0_100" format="Dash"/>
<parameter id="cover_mode" outid="cm" label="Cover mode strategy" tooltip= "Not applicable to Spartan-6, Virtex-6,-7 and Zynq"
default="area" visible="true" omit="area" type="CoverModeType" format="Dash"/>
<parameter id="detail" label="Detailed map report" tooltip="Enable detailed map report"
default="false" omit="false" type= "Boolean" format="DashName"/>
<parameter id="equivalent_register_removal" label="Equivalent register removal"
tooltip="Removes redundant registers (Spartan-6, Virtex-4,-5,-6) when '-global_opt' is used."
default="true" omit="true" type= "Bool_on_off" format="Dash"/>
<parameter id="global_opt" outid="cm" label="Global optimization"
tooltip= "Applicable to Spartan-6, Virtex-4,-5,-6,-7 only. '-register_duplication' is disabled, '-u' is not allowed."
default="off" visible="true" omit="off" type="GlobalOptType" format="Dash"/>
<parameter id="ignore_keep_hierarchy" label="Ignore KEEP_HIERARCHY" tooltip="Enable detailed map report"
default="false" omit="false" type= "Boolean" format="DashName"/>
<!-- Not clear what the default value is, so omit="" -->
<parameter id="do_not_use_rloc" outid="ir" label="Do not use RLOC"
tooltip= "Sets mode of processing RLOC constraints"
default="off" visible="true" omit="" type="DoNotUseRLOCType" format="Dash"/>
<parameter id="lut_combine" outid="lc" label="LUT combine"
tooltip= "Sets mode LUT combining"
default="off" visible="true" omit="off" type="LUTCombineType" format="Dash"/>
<parameter id="logic_opt" label="Logic optimization"
tooltip="Post-placement logic restructuring"
default="true" omit="true" type= "Bool_on_off" format="Dash"/>
<parameter id="multi_threading" outid="mt" label="Multi-threading"
tooltip= "Enable multithreading during placement"
default="off" visible="true" omit="off" type="MTType" format="Dash"/>
<parameter id="non_timing_driven" outid="ntd" label="Non timing-driven"
tooltip="Run in non timing-driven mode for MAP. (separate switch for PAR)"
default="false" omit="false" type= "Boolean" format="DashName"/>
<parameter id="overall_effor_level" outid="ol" label="Overall effort level"
tooltip= "Overall MAP effort level used for packing and placement (recommended >= PAR effort level)"
default="std" visible="true" omit="std" type="OLType" format="Dash"/>
<parameter id="target_device" outid="p" label="Target device" tooltip= "Target device part number"
default="%part" visible="true" omit="" type="String" format="Dash"/>
<parameter id="power_optimization" outid="power" label="Power optimization mode"
tooltip= "Controls power reduction optimization mode"
default="off" visible="true" omit="off" type="PowerType" format="Dash"/>
<parameter id="pack_registers_iob" outid="pr" label="Pack registers in IOB"
tooltip= "Attempt to pack registers in I/O blocks"
default="off" visible="true" omit="off" type="PRIOType" format="Dash"/>
<!-- default not clear , disabling omit-->
<parameter id="register_duplication" label="Register duplication"
tooltip="PRegister duplication (disabled if '-global_opt' is used, reguires '-timing')"
default="true" omit="" type= "Bool_on_off" format="Dash"/>
<parameter id="register_ordering" outid="r" label="Register ordering"
tooltip="Register ordering in a slice (use 4 or 8)"
default="4" omit="4" type= "RegisterOrderingType" format="Dash"/>
<parameter id="smartguide" label="Smart guide file" tooltip= "Guide file (*.ncd). Enable after initial 'timing' placement is performed"
default="" visible="true" omit="" type="String" format="Dash"/>
<parameter id="placer_cost_table" outid="t" label="Placer cost table"
tooltip= "Placer cost table with values in 1-100 range. Valid with '-timing' option only"
default="" visible="true" omit="" type="String" format="Dash"/>
<parameter id="timing" label="Timing driven"
tooltip="Timing driven packing and placement. Alwais on for Spartan-6, Virtex-6,-7 and Zynq"
default="false" omit="false" type= "Boolean" format="DashName"/>
<parameter id="do_not_remove_unused" outid="u" label="Do not remove unused"
tooltip="Keep unused resources by applying 'S' (NOCLIP) property to all dangling signals."
default="false" omit="false" type= "Boolean" format="DashName"/>
<!-- made overwrite on by default -->
<parameter id="overwrite" outid="w" label="Overwrite existent files"
tooltip="Overwrite existent files including design (*.ncd) files."
default="true" omit="false" type= "Boolean" format="DashName"/>
<parameter id="performance_evaluation" outid="x" label="Performance evaluation mode"
tooltip="Use tool-generated timing constraints instead of the specified to evaluate each clock in the design."
default="false" omit="false" type= "Boolean" format="DashName"/>
<parameter id="extra_effort" outid="xe" label="Extra effort"
tooltip= "Extra effort for timing-driven packing and placement"
default="n" visible="true" omit="n" type="NormalContinueType" format="Dash"/>
<parameter id="extra_placer_cost_table" outid="xt" label="Extra Placer cost table"
tooltip= "Placer extra cost table with values in 1-100 range. Valid for S-6, V-6,-7 and Zynq"
default="" visible="true" omit="" type="String" format="Dash"/>
<!-- is it available? NOT-->
<!-- <parameter id="verbose" label="Verbose mode" tooltip="Generate more detailed output"
default="false" omit="false" type= "Boolean" format="DashName"/> -->
<!-- common parameters from the base tool -->
<parameter id="intstyle"/> <!-- USED -->
<parameter id="command_files"/> <!-- USED -->
<parameter id="speed_grade"/>
<!-- calculated parameters -->
<parameter id="ISEMapActionIndex" default="%%ChosenActionIndex"
type="String" format="CopyValue" visible="false" />
<!-- hidden (calculated) parameters -->
<parameter id="AutosaveISEMap" default="?%%ChosenActionIndex=0 ^ %SkipSnapshotMap=false : true, false"
visible="false" type="Boolean" format="None"/>
<input>
<group name="General options">
"SkipSnapshotMap"
"input_file"
"physical_constraints_file"
"extra_input_files"
"output_file"
"activityfile"
"map_slice_logic"
"pack_slices"
"cover_mode"
"detail"
"equivalent_register_removal"
"global_opt"
"ignore_keep_hierarchy"
"do_not_use_rloc"
"lut_combine"
"logic_opt"
"multi_threading"
"non_timing_driven"
"overall_effor_level"
"target_device"
"power_optimization"
"pack_registers_iob"
"register_duplication"
"register_ordering"
"smartguide"
"placer_cost_table"
"timing"
"do_not_remove_unused"
"overwrite"
"performance_evaluation"
"extra_effort"
"extra_placer_cost_table"
"---"
"ISEProjectRoot"
"ISERemoteDir"
</group>
<group name ="NGCBuild Options">
</group>
</input>
<output>
<if-not extra_input_files="">
<line name="ise_copy_pre_map">
"-c"
"rsync -avrR -e ssh"
"%extra_input_files"
"%RemoteUser@%RemoteHost:%ISEProjectRoot"
</line>
</if-not>
<line name="ise_run_map"
dest="ISEConsole"
mark="``"
sep=" "
prompt="@@FINISH@@"
success="@@FINISH@@"
failure="ERROR"
log=""
stdout="parser_ISE">
"mkdir -p"
"~/%ISEProjectRoot/%ISERemoteDir"
"\n"
"cd ~/%ISEProjectRoot\n"
"%ISEBinAbsolutePath/map"
<!-- map command options -->
"%output_file"
"%activityfile"
"%map_slice_logic"
"%pack_slices"
"%cover_mode"
"%detail"
"%equivalent_register_removal"
"%global_opt"
"%ignore_keep_hierarchy"
"%do_not_use_rloc"
"%lut_combine"
"%logic_opt"
"%multi_threading"
"%non_timing_driven"
"%overall_effor_level"
"%target_device"
"%power_optimization"
"%pack_registers_iob"
"%register_duplication"
"%register_ordering"
"%smartguide"
"%placer_cost_table"
"%timing"
"%do_not_remove_unused"
"%overwrite"
"%performance_evaluation"
"%extra_effort"
"%extra_placer_cost_table"
<!-- input (*.ngd) file -->
"%input_file"
<!-- physical constraints (*.pcf) output file -->
"%physical_constraints_file"
"\n"
"echo \"@@FINISH@@\"\n"
</line>
<!-- TODO: copy results -->
<line name="ise_copy_after_map">
"-c"
"mkdir -p %ISELocalResultDir ;"
"rsync -avr -e ssh"
<!-- "%RemoteUser@%RemoteHost:%ISEProjectRoot/%ISERemoteDir/*.mrp" -->
"%RemoteUser@%RemoteHost:%ISEProjectRoot/*.mrp"
"%ISELocalResultDir/"
</line>
</output>
</tool>
<!-- Restore tool for ISESynthesis -->
<tool name="RestoreISEMap"
project="FPGA_project"
interface="ISEInterface"
package="FPGA_package"
inherits="RestoreISE"/>
<!-- Save tool for ISESynthesis -->
<tool name="SaveISEMap"
project="FPGA_project"
interface="ISEInterface"
package="FPGA_package"
inherits="SaveISE"/>
</vdt-project>
tools/Xilinx_ISE/ise_proto.xml
View file @ 62377d5d
......@@ -75,6 +75,11 @@
default="grep --line-buffered -E 'ERROR:%PreGrepW%PreGrepI'"
type="String" format="CopyValue"
visible="true" readonly="true"/>
<parameter id="parsers_path" label="Parsers Path" tooltip= "parsers directory in plugins"
default="%%ParsersPath" visible="true" omit="" type="String" format="CopyValue"/>
<parameter id="parser_name" label="ISE parser name" tooltip= "ISE parser script path"
default="parser_ise.py" visible="true" omit="" type="String" format="CopyValue"/>
<input>
<group name="Common options"
......@@ -86,6 +91,9 @@
</group>
<group name="Parser"
weight="10">
"parsers_path"
"parser_name"
"ShowWarnings"
"ShowInfo"
"GrepEWI"
......@@ -114,6 +122,7 @@
warnings= "PatternWarnings"
info= "PatternInfo">
"-c"
"python -u %parsers_path%parser_name %%ToolName | "
"%GrepEWI"
"| %ISESedPaths"
<if NoBabyTalk="true">
......@@ -130,11 +139,12 @@
"%Timing"
"%Pwropt"
"%OtherProblems"
<!-- TODO: change Placement to Routing? or such -->
<if NoFileProblem="true">
<!-- Add [Placement:0000] to lines that do not have [file:line] - then "Placement" will appear in "Problems" location-->
<!--
<if NoFileProblem="true">
"| sed -u 's@^[^\[]*\[[^\[]*$@&amp;\[%%ToolName:0000\]@'"
</if>
-->
</line>
</output>
</tool>
......
tools/Xilinx_ISE/ise_xst.xml
View file @ 62377d5d
......@@ -217,7 +217,7 @@
<depends files="constraints"/>
</depends-list>
<parameter id="clean_start" label="Clean start" tooltip= "Delete all files on remote before running XST"
default="false" visible="true" omit="false" type="BoolYesNo" format="Dash"/>
default="true" visible="true" omit="false" type="BoolYesNo" format="Dash"/>
<parameter id="SkipSnapshotSynth" label="Skip snapshot" tooltip="Do not create snapshot after synthesis"
default="false"
type= "Boolean" format="None"/>
......@@ -629,7 +629,7 @@
"%RemoteUser@%RemoteHost:%ISEProjectRoot"
</line>
<line name="ise_run_partgen"
<line name="ise_run_xst"
dest="ISEConsole"
mark="``"
sep=" "
......@@ -743,7 +743,7 @@
</line>
<!-- TODO: copy results -->
<!--
<line name="ise_copy_after_partgen">
<line name="ise_copy_after_synth">
"-c"
"mkdir -p %ISELocalResultDir ;"
"rsync -avr -e ssh"
......
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