Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
O
oc_jpegencode_vdt
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Commits
Open sidebar
Elphel
oc_jpegencode_vdt
Commits
5c3f8d63
Commit
5c3f8d63
authored
Jun 30, 2016
by
Andrey Filippov
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
fixed typo
parent
ca94cc1f
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
2 additions
and
2 deletions
+2
-2
README.md
README.md
+2
-2
No files found.
README.md
View file @
5c3f8d63
oc_jpegencode
=============
This repository is for of a fork - it is taken from
[
https://github.com/chiggs/oc_jpegencode
](
https://github.com/chiggs/oc_jpegencode
)
,
This repository is for
k
of a fork - it is taken from
[
https://github.com/chiggs/oc_jpegencode
](
https://github.com/chiggs/oc_jpegencode
)
,
just added Eclipse/
[
VDT
](
https://github.com/Elphel/vdt-plugin
)
project files so it can be imported into IDE and run there.
__These Verilog source files are not related to any of Elphel camera projects.__
Instructions below are preserved from the original (first fork) repo. With
[
VDT plugin
](
https://github.com/Elphel/vdt-plugin
)
you need to install the plugin following the instructions and/or video tutorial, then clone this project and open it in VDT.
T
He
open any of the Verilog source files in the editor and change perspective:
T
hen
open any of the Verilog source files in the editor and change perspective:
Window -> Perspective -> Open Perspective -> Other... -> Verilog/VHDL
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment