oc_jpegencode  1.0
JPEGencoder
pre_fifo.v
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1 /////////////////////////////////////////////////////////////////////
2 //// ////
3 //// JPEG Encoder Core - Verilog ////
4 //// ////
5 //// Author: David Lundgren ////
6 //// davidklun@gmail.com ////
7 //// ////
8 /////////////////////////////////////////////////////////////////////
9 //// ////
10 //// Copyright (C) 2009 David Lundgren ////
11 //// davidklun@gmail.com ////
12 //// ////
13 //// This source file may be used and distributed without ////
14 //// restriction provided that this copyright statement is not ////
15 //// removed from the file and that any derivative work contains ////
16 //// the original copyright notice and the associated disclaimer.////
17 //// ////
18 //// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
19 //// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
20 //// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
21 //// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
22 //// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
23 //// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
24 //// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
25 //// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
26 //// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
27 //// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
28 //// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
29 //// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
30 //// POSSIBILITY OF SUCH DAMAGE. ////
31 //// ////
32 /////////////////////////////////////////////////////////////////////
33 
34 
35 /* This module combines the Y, Cb, and Cr blocks, and the RGB to Y, Cb, and Cr
36 converter. **/
37 
38 `timescale 1ns / 100ps
39 
44 input clk, rst, enable;
45 input [23:0] data_in;
46 output [31:0] cr_JPEG_bitstream;
48 output [4:0] cr_orc;
49 output [31:0] cb_JPEG_bitstream;
51 output [4:0] cb_orc;
52 output [31:0] y_JPEG_bitstream;
53 output y_data_ready;
54 output [4:0] y_orc;
55 output y_eob_output;
57 
58 
60 wire [23:0] dct_data_in;
61 
62 
65 
70 
75 
80 
81  endmodule
[23:0] 3424data_in
Definition: rgb2ycbcr.v:49
[31:0] 4911JPEG_bitstream
Definition: yd_q_h.v:46
4915end_of_block_empty
Definition: yd_q_h.v:50
u11 crd_q_h
Definition: pre_fifo.v:66
1418clk
Definition: cbd_q_h.v:42
2974clk
Definition: crd_q_h.v:41
3418cr_eob_empty
Definition: pre_fifo.v:56
[31:0] 1422JPEG_bitstream
Definition: cbd_q_h.v:46
3419rgb_enablewire
Definition: pre_fifo.v:59
3417cb_eob_empty
Definition: pre_fifo.v:56
1425end_of_block_empty
Definition: cbd_q_h.v:49
u13 yd_q_h
Definition: pre_fifo.v:76
[4:0] 3414y_orc
Definition: pre_fifo.v:54
[4:0] 2980cr_orc
Definition: crd_q_h.v:47
3415y_eob_output
Definition: pre_fifo.v:55
2979data_ready
Definition: crd_q_h.v:46
[31:0] 3409cb_JPEG_bitstream
Definition: pre_fifo.v:49
1420enable
Definition: cbd_q_h.v:44
[7:0] 4910data_in
Definition: yd_q_h.v:45
3420dct_data_inwire[23:0]
Definition: pre_fifo.v:60
[4:0] 1424cb_orc
Definition: cbd_q_h.v:48
u4 RGB2YCBCR
Definition: pre_fifo.v:63
4907clk
Definition: yd_q_h.v:42
u12 cbd_q_h
Definition: pre_fifo.v:71
[31:0] 2978JPEG_bitstream
Definition: crd_q_h.v:45
[4:0] 4913y_orc
Definition: yd_q_h.v:48
4912data_ready
Definition: yd_q_h.v:47
3410cb_data_ready
Definition: pre_fifo.v:50
3404enable
Definition: pre_fifo.v:44
4914end_of_block_output
Definition: yd_q_h.v:49
4908rst
Definition: yd_q_h.v:43
3416y_eob_empty
Definition: pre_fifo.v:56
2976enable
Definition: crd_q_h.v:43
[7:0] 1421data_in
Definition: cbd_q_h.v:45
1423data_ready
Definition: cbd_q_h.v:47
[7:0] 2977data_in
Definition: crd_q_h.v:44
[23:0] 3405data_in
Definition: pre_fifo.v:45
[31:0] 3412y_JPEG_bitstream
Definition: pre_fifo.v:52
3454data_outwire[23:0]
Definition: rgb2ycbcr.v:69
1419rst
Definition: cbd_q_h.v:43
3413y_data_ready
Definition: pre_fifo.v:53
[31:0] 3406cr_JPEG_bitstream
Definition: pre_fifo.v:46
[4:0] 3411cb_orc
Definition: pre_fifo.v:51
[4:0] 3408cr_orc
Definition: pre_fifo.v:48
2981end_of_block_empty
Definition: crd_q_h.v:48
3407cr_data_ready
Definition: pre_fifo.v:47
2975rst
Definition: crd_q_h.v:42
4909enable
Definition: yd_q_h.v:44
3453enable_outreg
Definition: rgb2ycbcr.v:68