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meta-elphel393
Commit cb95eed8 authored by Oleg Dzhimiev's avatar Oleg Dzhimiev
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updated device trees

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conf/machine/boards/elphel393/elphel393.dts
View file @ cb95eed8
/* */
/dts-v1/;
/ {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,zynq-zc770";
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-7000";
model = "Xilinx Zynq";
aliases {
ethernet0 = "/amba@0/ps7-ethernet@e000b000";
serial0 = "/amba@0/serial@e0000000";
};
ethernet0 = &ps7_ethernet_0;
serial0 = &ps7_uart_0;
} ;
chosen {
bootargs = "console=ttyPS0,115200 root=/dev/ram rw ip=192.168.0.9 earlyprintk ramdisk_size=131072";
linux,stdout-path = "/axi@0/serial@e0000000";
};
linux,stdout-path = "/amba@0/serial@e0000000";
} ;
cpus {
#address-cells = <0x1>;
#cpus = <0x2>;
#size-cells = <0x0>;
cpu@0 {
compatible = "xlnx,ps7-cortexa9-1.00.a";
#address-cells = <1>;
#size-cells = <0>;
ps7_cortexa9_0: cpu@0 {
bus-handle = <&ps7_axi_interconnect_0>;
compatible = "arm,cortex-a9";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
model = "ps7_cortexa9,1.00.a";
interrupt-handle = <&ps7_scugic_0>;
reg = <0x0>;
xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
xlnx,cpu-clk-freq-hz = <0x27bc86bf>;
};
cpu@1 {
compatible = "xlnx,ps7-cortexa9-1.00.a";
} ;
ps7_cortexa9_1: cpu@1 {
bus-handle = <&ps7_axi_interconnect_0>;
compatible = "arm,cortex-a9";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
model = "ps7_cortexa9,1.00.a";
interrupt-handle = <&ps7_scugic_0>;
reg = <0x1>;
xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
xlnx,cpu-clk-freq-hz = <0x27bc86bf>;
};
};
} ;
} ;
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <0x1>;
interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
};
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 5 4>, <0 6 4>;
reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
reg-names = "cpu0", "cpu1";
} ;
ps7_ddr_0: memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
};
} ;
ps7_axi_interconnect_0: amba@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
ranges ;
ps7_afi_0: ps7-afi@f8008000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8008000 0x1000>;
};
} ;
ps7_afi_1: ps7-afi@f8009000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8009000 0x1000>;
};
} ;
ps7_afi_2: ps7-afi@f800a000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800a000 0x1000>;
};
} ;
ps7_afi_3: ps7-afi@f800b000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800b000 0x1000>;
};
} ;
ps7_ddrc_0: ps7-ddrc@f8006000 {
compatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
reg = <0xf8006000 0x1000>;
xlnx,has-ecc = <0x0>;
};
} ;
ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
compatible = "xlnx,ps7-dev-cfg-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0x8 0x4>;
reg = <0xf8007000 0x1000>;
};
interrupts = <0 8 4>;
reg = <0xf8007000 0x100>;
} ;
ps7_dma_s: ps7-dma@f8003000 {
#dma-cells = <0x1>;
#dma-channels = <0x8>;
#dma-requests = <0x4>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <4>;
arm,primecell-periphid = <0x41330>;
clock-names = "apb_pclk";
clocks = <&clkc 27>;
compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
"dma4", "dma5", "dma6", "dma7";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
reg = <0xf8003000 0x1000>;
};
} ;
ps7_ethernet_0: ps7-ethernet@e000b000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 13>, <&clkc 30>;
compatible = "xlnx,ps7-ethernet-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0x16 0x1>;
interrupts = <0 22 4>;
local-mac-address = [00 0a 35 00 00 00];
phy-handle = <&phy3>;
phy-mode = "rgmii-id";
reg = <0xe000b000 0x1000>;
xlnx,enet-clk-freq-hz = <0x7735940>;
xlnx,enet-reset = <0xffffffff>;
/*
xlnx,enet-slcr-1000mbps-div0 = <0x8>;
xlnx,enet-slcr-1000mbps-div1 = <0x1>;
xlnx,enet-slcr-100mbps-div0 = <0x8>;
xlnx,enet-slcr-100mbps-div1 = <0x5>;
xlnx,enet-slcr-10mbps-div0 = <0x8>;
xlnx,enet-slcr-10mbps-div1 = <0x32>;
*/
xlnx,eth-mode = <0x1>;
xlnx,has-mdio = <0x1>;
xlnx,ptp-enet-clock = <0x69f6bcb>;
xlnx,ptp-enet-clock = <111111115>;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
phy3: phy@3 {
compatible = "atheros,8035";
device_type = "ethernet-phy";
reg = <0x3>;
};
};
};
ps7-i2c@e0004000 {
} ;
} ;
} ;
ps7_i2c_0: ps7-i2c@e0004000 {
bus-id = <0>;
clocks = <&clkc 38>;
compatible = "xlnx,ps7-i2c-1.00.a";
i2c-clk = <400000>;
input-clk = <111111114>;
......@@ -159,134 +138,118 @@
xlnx,i2c-clk-freq-hz = <0x69f6bcb>;
xlnx,i2c-reset = "";
} ;
ps7-gpio@e000a000 {
#gpio-cells = <0x2>;
ps7_gpio_0: ps7-gpio@e000a000 {
#gpio-cells = <2>;
clocks = <&clkc 42>;
compatible = "xlnx,ps7-gpio-1.00.a";
emio-gpio-width = <0x40>;
gpio-controller;
emio-gpio-width = <64>;
gpio-controller ;
gpio-mask-high = <0xc0000>;
gpio-mask-low = <0xfe81>;
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0x14 0x4>;
interrupts = <0 20 4>;
reg = <0xe000a000 0x1000>;
};
ps7-iop-bus-config@e0200000 {
} ;
ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
compatible = "xlnx,ps7-iop-bus-config-1.00.a";
reg = <0xe0200000 0x1000>;
};
ps7-pl310@f8f02000 {
arm,data-latency = <0x3 0x2 0x2>;
arm,tag-latency = <0x2 0x2 0x2>;
cache-level = <0x2>;
cache-unified;
} ;
ps7_pl310_0: ps7-pl310@f8f02000 {
arm,data-latency = <3 2 2>;
arm,tag-latency = <2 2 2>;
cache-level = <2>;
cache-unified ;
compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0x2 0x4>;
interrupts = <0 2 4>;
reg = <0xf8f02000 0x1000>;
};
} ;
ps7-ram@0 {
ps7_ram_0: ps7-ram@0 {
compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 3 4>;
reg = <0xfffc0000 0x40000>;
};
} ;
ps7_scugic_0: ps7-scugic@f8f01000 {
#address-cells = <0x2>;
#interrupt-cells = <0x3>;
#size-cells = <0x1>;
#address-cells = <2>;
#interrupt-cells = <3>;
#size-cells = <1>;
compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
interrupt-controller;
linux,phandle = <0x1>;
phandle = <0x1>;
reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
};
interrupt-controller ;
num_cpus = <2>;
num_interrupts = <96>;
reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
} ;
ps7_scutimer_0: ps7-scutimer@f8f00600 {
clocks = <&clkc 4>;
compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x1 0xd 0x301>;
interrupts = <1 13 0x301>;
reg = <0xf8f00600 0x20>;
};
} ;
ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
clocks = <&clkc 4>;
compatible = "xlnx,ps7-scuwdt-1.00.a";
device_type = "watchdog";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x1 0xe 0x301>;
interrupts = <1 14 0x301>;
reg = <0xf8f00620 0xe0>;
};
} ;
ps7_sd_0: ps7-sdio@e0100000 {
clock-frequency = <0x7735940>;
compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 21>, <&clkc 32>;
compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0x18 0x4>;
interrupts = <0 24 4>;
reg = <0xe0100000 0x1000>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x3f93e10>;
};
ps7-slcr@f8000000 {
} ;
ps7_slcr_0: ps7-slcr@f8000000 {
compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
reg = <0xf8000000 0x1000>;
clocks {
#address-cells = <0x1>;
#size-cells = <0x0>;
armpll {
#clock-cells = <0x0>;
clock-output-names = "armpll";
clocks = <0x3>;
compatible = "xlnx,zynq-pll";
lockbit = <0x0>;
reg = <0x100 0x110 0x10c>;
};
ddrpll {
#clock-cells = <0x0>;
clock-output-names = "ddrpll";
clocks = <0x3>;
compatible = "xlnx,zynq-pll";
lockbit = <0x1>;
reg = <0x104 0x114 0x10c>;
};
iopll {
#clock-cells = <0x0>;
clock-output-names = "iopll";
clocks = <0x3>;
compatible = "xlnx,zynq-pll";
lockbit = <0x2>;
reg = <0x108 0x118 0x10c>;
};
ps_clk {
#clock-cells = <0x0>;
clock-frequency = <0x1fca055>;
clock-output-names = "ps_clk";
compatible = "fixed-clock";
linux,phandle = <0x3>;
phandle = <0x3>;
};
};
};
ps7-ttc@f8001000 {
compatible = "xlnx,ps7-ttc-1.00.a";
#address-cells = <1>;
#size-cells = <0>;
clkc: clkc {
#clock-cells = <1>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
"lqspi", "smc", "pcap", "gem0", "gem1",
"fclk0", "fclk1", "fclk2", "fclk3", "can0",
"can1", "sdio0", "sdio1", "uart0", "uart1",
"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
"swdt", "dbg_trc", "dbg_apb";
compatible = "xlnx,ps7-clkc";
fclk-enable = <0xf>;
ps-clk-frequency = <33333333>;
} ;
} ;
} ;
ps7_ttc_0: ps7-ttc@f8001000 {
clocks = <&clkc 6>;
compatible = "xlnx,ps7-ttc-1.00.a", "cdns,ttc";
interrupt-names = "ttc0", "ttc1", "ttc2";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
reg = <0xf8001000 0x1000>;
};
ps7-smcc@e000e000 {
} ;
ps7_smcc_0: ps7-smcc@e000e000 {
#address-cells = <1>;
#size-cells = <1>;
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 11>, <&clkc 44>;
compatible = "xlnx,ps7-smcc-1.00.a", "xlnx,ps7-smc";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 18 4 >;
......@@ -297,7 +260,7 @@
xlnx,nor-chip-sel1 = <0x0>;
xlnx,sram-chip-sel0 = <0x0>;
xlnx,sram-chip-sel1 = <0x0>;
ps7-nand@e1000000 {
ps7_nand_0: ps7-nand@e1000000 {
compatible = "xlnx,ps7-nand-1.00.a";
reg = < 0xe1000000 0x1000000 >;
xlnx,nand-clk-freq-hz = <0x5f5e100>;
......@@ -317,34 +280,35 @@
};
} ;
} ;
ps7_uart_0: serial@e0000000 {
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 23>, <&clkc 40>;
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0x1b 0x4>;
port-number = <0x0>;
port-number = <0>;
reg = <0xe0000000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
};
} ;
ps7_usb_0: ps7-usb@e0002000 {
clocks = <&clkc 28>;
compatible = "xlnx,ps7-usb-1.00.a";
dr_mode = "host";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0x15 0x4>;
interrupts = <0 21 4>;
phy_type = "ulpi";
reg = <0xe0002000 0x1000>;
xlnx,usb-reset = <0xffffffff>;
};
ps7-xadc@f8007100 {
} ;
ps7_xadc: ps7-xadc@f8007100 {
clocks = <&clkc 12>;
compatible = "xlnx,ps7-xadc-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0x0 0x7 0x4>;
interrupts = <0 7 4>;
reg = <0xf8007100 0x20>;
};
};
};
} ;
} ;
} ;
conf/machine/boards/microzed/microzed.dts
View file @ cb95eed8
......@@ -62,7 +62,7 @@
} ;
ps7_ddr_0: memory@0 {
device_type = "memory";
reg = <0x0 0x20000000>;
reg = <0x0 0x40000000>;
} ;
ps7_axi_interconnect_0: amba@0 {
#address-cells = <1>;
......@@ -245,7 +245,7 @@
reg = <0xf8f00620 0xe0>;
} ;
ps7_sd_0: ps7-sdio@e0100000 {
clock-frequency = <50000000>;
clock-frequency = <0x7735940>;
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 21>, <&clkc 32>;
compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci";
......@@ -255,6 +255,7 @@
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x3f93e10>;
} ;
ps7_slcr_0: ps7-slcr@f8000000 {
compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
......
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