...
 
Commits (3)
/**/
/ {
chosen {
bootargs = "earlycon cma=336M root=ubi0:elphel393-rootfs rootwait rootfstype=ubifs ubi.mtd=4,2048";
bootargs = "earlycon cma=336M root=ubi0:elphel393-rootfs rootwait rootfstype=ubifs ubi.mtd=4,512";
stdout-path = "serial0:115200n8";
};
};
......@@ -119,43 +119,36 @@
};
};
ps7_smcc_0: ps7-smcc@e000e000 {
ps7_nand_0: ps7-nand@e1000000 {
compatible = "arm,pl353-nand-r2p1";
reg = < 0xe1000000 0x1000000 >;
/*arm,nand-clk-freq-hz = <0x5f5e100>;*/
arm,nand-width = <0x8>;
arm,nand-cycle-t0 = <0x4>;
arm,nand-cycle-t1 = <0x4>;
arm,nand-cycle-t2 = <0x1>;
arm,nand-cycle-t3 = <0x2>;
arm,nand-cycle-t4 = <0x2>;
arm,nand-cycle-t5 = <0x2>;
arm,nand-cycle-t6 = <0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
smcc: memory-controller@e000e000 {
nand0: flash@e1000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
/*reg = <0x1600000 0x10000000>;*/ /*256MB*/
reg = <0x1600000 0x14000000>; /*320MB*/
};
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
reg = <0x1600000 0x10000000>;/*256MB*/
};
} ;
} ;
};
};
elphel_ahci: elphel-ahci@80000000 {
compatible = "elphel,elphel-ahci";
......
......@@ -119,43 +119,36 @@
};
};
ps7_smcc_0: ps7-smcc@e000e000 {
ps7_nand_0: ps7-nand@e1000000 {
compatible = "arm,pl353-nand-r2p1";
reg = < 0xe1000000 0x1000000 >;
/*arm,nand-clk-freq-hz = <0x5f5e100>;*/
arm,nand-width = <0x8>;
arm,nand-cycle-t0 = <0x4>;
arm,nand-cycle-t1 = <0x4>;
arm,nand-cycle-t2 = <0x1>;
arm,nand-cycle-t3 = <0x2>;
arm,nand-cycle-t4 = <0x2>;
arm,nand-cycle-t5 = <0x2>;
arm,nand-cycle-t6 = <0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
smcc: memory-controller@e000e000 {
nand0: flash@e1000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
/*reg = <0x1600000 0x10000000>;*/ /*256MB*/
reg = <0x1600000 0x14000000>; /*320MB*/
};
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
reg = <0x1600000 0x10000000>;/*256MB*/
};
} ;
} ;
};
};
elphel_ahci: elphel-ahci@80000000 {
compatible = "elphel,elphel-ahci";
......
......@@ -143,11 +143,12 @@
};
partition@4 {
label = "rootfs";
reg = <0x1600000 0x10000000>;/*256MB*/
/*reg = <0x1600000 0x10000000>;*/ /*256MB*/
reg = <0x1600000 0x14000000>; /*320MB*/
};
};
} ;
} ;
};
};
elphel_ahci: elphel-ahci@80000000 {
compatible = "elphel,elphel-ahci";
......
......@@ -119,43 +119,36 @@
};
};
ps7_smcc_0: ps7-smcc@e000e000 {
ps7_nand_0: ps7-nand@e1000000 {
compatible = "arm,pl353-nand-r2p1";
reg = < 0xe1000000 0x1000000 >;
/*arm,nand-clk-freq-hz = <0x5f5e100>;*/
arm,nand-width = <0x8>;
arm,nand-cycle-t0 = <0x4>;
arm,nand-cycle-t1 = <0x4>;
arm,nand-cycle-t2 = <0x1>;
arm,nand-cycle-t3 = <0x2>;
arm,nand-cycle-t4 = <0x2>;
arm,nand-cycle-t5 = <0x2>;
arm,nand-cycle-t6 = <0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
smcc: memory-controller@e000e000 {
nand0: flash@e1000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
/*reg = <0x1600000 0x10000000>;*/ /*256MB*/
reg = <0x1600000 0x14000000>; /*320MB*/
};
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
reg = <0x1600000 0x10000000>;/*256MB*/
};
} ;
} ;
};
};
elphel_ahci: elphel-ahci@80000000 {
compatible = "elphel,elphel-ahci";
......
......@@ -117,43 +117,36 @@
};
};
ps7_smcc_0: ps7-smcc@e000e000 {
ps7_nand_0: ps7-nand@e1000000 {
compatible = "arm,pl353-nand-r2p1";
reg = < 0xe1000000 0x1000000 >;
/*arm,nand-clk-freq-hz = <0x5f5e100>;*/
arm,nand-width = <0x8>;
arm,nand-cycle-t0 = <0x4>;
arm,nand-cycle-t1 = <0x4>;
arm,nand-cycle-t2 = <0x1>;
arm,nand-cycle-t3 = <0x2>;
arm,nand-cycle-t4 = <0x2>;
arm,nand-cycle-t5 = <0x2>;
arm,nand-cycle-t6 = <0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
smcc: memory-controller@e000e000 {
nand0: flash@e1000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
/*reg = <0x1600000 0x10000000>;*/ /*256MB*/
reg = <0x1600000 0x14000000>; /*320MB*/
};
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
reg = <0x1600000 0x10000000>;/*256MB*/
};
} ;
} ;
};
};
elphel_ahci: elphel-ahci@80000000 {
compatible = "elphel,elphel-ahci";
......
......@@ -117,43 +117,36 @@
};
};
ps7_smcc_0: ps7-smcc@e000e000 {
ps7_nand_0: ps7-nand@e1000000 {
compatible = "arm,pl353-nand-r2p1";
reg = < 0xe1000000 0x1000000 >;
/*arm,nand-clk-freq-hz = <0x5f5e100>;*/
arm,nand-width = <0x8>;
arm,nand-cycle-t0 = <0x4>;
arm,nand-cycle-t1 = <0x4>;
arm,nand-cycle-t2 = <0x1>;
arm,nand-cycle-t3 = <0x2>;
arm,nand-cycle-t4 = <0x2>;
arm,nand-cycle-t5 = <0x2>;
arm,nand-cycle-t6 = <0x4>;
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
smcc: memory-controller@e000e000 {
nand0: flash@e1000000 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;/*1MB for backup spl image(s)*/
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
/*reg = <0x1600000 0x10000000>;*/ /*256MB*/
reg = <0x1600000 0x14000000>; /*320MB*/
};
};
partition@1 {
label = "u-boot";
reg = <0x100000 0x400000>;/*4MB*/
};
partition@2 {
label = "device-tree";
reg = <0x500000 0x100000>;/*1MB*/
};
partition@3 {
label = "kernel";
reg = <0x600000 0x1000000>;/*16MB*/
};
partition@4 {
label = "rootfs";
reg = <0x1600000 0x10000000>;/*256MB*/
};
} ;
} ;
};
};
elphel_ahci: elphel-ahci@80000000 {
compatible = "elphel,elphel-ahci";
......
......@@ -763,10 +763,6 @@ static int micron_nand_init(struct nand_chip *chip)
// chip->id.data[1] is dev_id (0xa3 in Elphel 10393)
nand_micron_mt29f_init(mtd, chip->id.data[1]);
// MT29F8G08ADBDAH4, no subpage write support
if (chip->id.data[1]==0xa3)
chip->options |= NAND_NO_SUBPAGE_WRITE;
// Elphel: modification for Micron NAND chips
//TODO: add Micron chip ID checking
mtd->_unlock = micron_nand_unlock;
......
......@@ -1133,8 +1133,8 @@ static int pl353_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc,
* They enable/disable ondie ecc feature each call which
* is not optimal.
*/
ecc->read_page = pl353_nand_read_page_raw;
ecc->write_page = pl353_nand_write_page_raw;
//ecc->read_page = pl353_nand_read_page_raw;
//ecc->write_page = pl353_nand_write_page_raw;
pl353_smc_set_ecc_mode(PL353_SMC_ECCMODE_BYPASS);
/*
......