if(JTAG_channels[chn].mode==JTAG_MODE_BOUNDARY)JTAG_channels[chn].mode=JTAG_MODE_SAMPLE;//should write the last byte before reading - or buffer data will be just lost
if(JTAG_channels[chn].mode==JTAG_MODE_BOUNDARY)JTAG_channels[chn].mode=JTAG_MODE_SAMPLE;//should write the last byte before reading - or buffer data will be just lost
/* TCK = 0 - just a delay; is it really needed? */
data.tck=0;
data.tms=tms&1;
data.tdi=((d<<=1)>>8)&1;
data.tck=0;
data.tms=tms&1;
data.tdi=((d<<=1)>>8)&1;
data.tck=0;
x393_sensio_jtag(data,sens_num);
/* repeat writel - just a delay; is it really needed? */
// x393_sensio_jtag(data, sens_num);
x393_sensio_jtag(data,sens_num);
/* repeat writel - just a delay; is it really needed? */
// x393_sensio_jtag(data, sens_num);
/* read TDO before TCK pulse */
/* read TDO before TCK pulse */
#ifndef PARALLEL_JTAG
r=(r<<1)+read_tdo(sens_num);// may need to read twice to increase delay?
r=(r<<1)+read_tdo(sens_num);// may need to read twice to increase delay?
#else
bm=(bm<<1)|1;
bm=(bm<<1)|1;
#endif
data.tck=1;
x393_sensio_jtag(data,sens_num);// keep other signals, set TCK == 1
// x393_sensio_jtag(data, sens_num); // repeat if delay will be needed to increase length of the TCK signal
data.tck=0;
// x393_sensio_jtag(data, sens_num);
}
x393_sensio_jtag(data,sens_num);
data.tck=1;
x393_sensio_jtag(data,sens_num);// keep other signals, set TCK == 1
// x393_sensio_jtag(data, sens_num); // repeat if delay will be needed to increase length of the TCK signal
data.tck=0;
// x393_sensio_jtag(data, sens_num);
}
x393_sensio_jtag(data,sens_num);
#ifdef PARALLEL_JTAG
r=read_tdo_byte(sens_num)&bm;
r=read_tdo_byte(sens_num)&bm;
#endif
// x393_sensio_jtag(data, sens_num);
dev_dbg(NULL," ---> %02x\n",r);
break;
caseJTAG_AUX_FPGA:
break;
}
returnr;
// x393_sensio_jtag(data, sens_num);
dev_dbg(NULL," ---> %02x\n",r);
break;
caseJTAG_AUX_FPGA:
break;
}
returnr;
}
//====================================
...
...
@@ -920,272 +929,272 @@ int jtag_send (int chn, int tms, int len, int d) {
// send/receive bits, raising TMS during the last one (if last==1). If number of bits are not multiple of 8, lower bits of the last byte will not be used.
intjtag_write_bits(intchn,
unsignedchar*buf,// data to write
intlen,// number of bits to write
intcheck,// compare readback data with previously written, abort on mismatch
intlast,// output last bit with TMS=1
intprev[2])// if null - don't use
unsignedchar*buf,// data to write
intlen,// number of bits to write
intcheck,// compare readback data with previously written, abort on mismatch
#define FRAMEPARS_DRIVER_NAME "Elphel (R) Model 393 Frame Parameters device driver"
#define FRAMEPARS_DRIVER_DESCRIPTION "Elphel (R) Model 393 Frame Parameters device driver"
/* 393: sFrameParsAll is an array of 4per-port structures */
staticstructframepars_all_tsFrameParsAll[SENSOR_PORTS]__attribute__((aligned(PAGE_SIZE)));///< Sensor Parameters, currently 16 pages all and 2048 pages some, static struct
set_gamma_table(0,GAMMA_SCLALE_1,NULL,0,0,0,0);// maybe not needed to put linear to cache - it can be calculated as soon FPGA will be tried to be programmed with
printk(KERN_NOTICE"Closing IMU device, numBytesWritten=0x%llx, numBytesRead=0x%llx (only global pointer, does not include files opened in read mode)\n",numBytesWritten,numBytesRead);
// Temporarily porting, to use only bus = 1 (GPS, IMU)
// Moved to include/uapi/elphel/x393_devices.h
#if 0
#define X3X3_I2C_CTRL 0 ///< control/reset i2c
#define X3X3_I2C_8_AINC 1 ///< 8bit registers, autoincement while read/write
#define X3X3_I2C_16_AINC 2 ///< 16bit registers, autoincement while read/write
...
...
@@ -128,6 +130,7 @@
#define X3X3_I2C_RAW 5 ///< 8bit registers, no address byte (just slave, then read/write byte(s)
#define X3X3_I2C1_RAW 6 ///< 8bit registers, no address byte (just slave, then read/write byte(s)
#define X3X3_I2C_ENABLE 7 ///< enable(/protect) different I2C devices for different types of I2C accesses
#endif
#define X3X3_I2C_ENABLE_RD 0 ///< bit 0 - enable i2c read
#define X3X3_I2C_ENABLE_WR 1 ///< bit 1 - enable i2c write
#define X3X3_I2C_ENABLE_RAW 2 ///< bit 2 - enable i2c raw (no address byte)
...
...
@@ -1478,7 +1481,7 @@ struct p_names_t {
#define LSEEK_HIST_WAIT_C 0x29 ///< set histogram waiting for the C (actually R, G2, B) histograms to become available - implies G1 too
#define LSEEK_HIST_REQ_EN 0x2a ///< enable histogram request when reading histogram (safer, but may be not desirable in HDR mode) - default after opening
#define LSEEK_HIST_REQ_DIS 0x2b ///< disable histogram request when reading histogram - will read latest available relying it is available
#define LSEEK_HIST_SET_CHN 0x30 ///< ..2F Select channel to wait for (4*port+subchannel)
#define LSEEK_HIST_SET_CHN 0x30 ///< ..3F Select channel to wait for (4*port+subchannel)
#define LSEEK_HIST_NEEDED 0x10000 ///< set histogram "needed" mask - 0x10000..0x1ffff
//#define LSEEK_HIST_WAIT_AE 0x2a ///< wait for autoexposure enabled
#define DEV393_EXIF_TIME ("exif_time", "exif_elphel", 125, 4, "0666", "c") ///< write today/tomorrow date (YYYY:MM:DD) and number of seconds at today/tomorrow
///< midnight (00:00:00) in seconds from epoch (long, startting from LSB)
#define DEV393_EXIF0 ("exif_exif0", "exif_elphel", 125, 16, "0666", "c") ///< sensor port 0: read encoded Exif data (SEEK_END)
#define DEV393_EXIF1 ("exif_exif1", "exif_elphel", 125, 17, "0666", "c") ///< sensor port 1: read encoded Exif data (SEEK_END)
#define DEV393_EXIF2 ("exif_exif2", "exif_elphel", 125, 18, "0666", "c") ///< sensor port 2: read encoded Exif data (SEEK_END)
#define DEV393_EXIF3 ("exif_exif3", "exif_elphel", 125, 19, "0666", "c") ///< sensor port 3: read encoded Exif data (SEEK_END)
#define DEV393_EXIF_META0 ("exif_meta0", "exif_elphel", 125, 32, "0666", "c") ///< sensor port 0: write metadata, concurrently opened files. All writes atomic
#define DEV393_EXIF_META1 ("exif_meta1", "exif_elphel", 125, 33, "0666", "c") ///< sensor port 1: write metadata, concurrently opened files. All writes atomic
#define DEV393_EXIF_META2 ("exif_meta2", "exif_elphel", 125, 34, "0666", "c") ///< sensor port 2: write metadata, concurrently opened files. All writes atomic
#define DEV393_EXIF_META3 ("exif_meta3", "exif_elphel", 125, 35, "0666", "c") ///< sensor port 3: write metadata, concurrently opened files. All writes atomic
#define DEV393_FRAMEPARS0 ("frameparsall0","framepars_operations",125,80, "0666", "c") ///< Access frame parameters for channel 0 (schedule modification, read with mmap)
#define DEV393_FRAMEPARS1 ("frameparsall1","framepars_operations",125,81, "0666", "c") ///< Access frame parameters for channel 1 (schedule modification, read with mmap)
#define DEV393_FRAMEPARS2 ("frameparsall2","framepars_operations",125,82, "0666", "c") ///< Access frame parameters for channel 2 (schedule modification, read with mmap)
#define DEV393_FRAMEPARS3 ("frameparsall3","framepars_operations",125,83, "0666", "c") ///< Access frame parameters for channel 3 (schedule modification, read with mmap)
#define DEV393_JTAG_RESET ("fpgaresetjtag", "x393_jtag", 132, 0, "0666", "c") ///< Just close open files (same as jtagraw)
#define DEV393_JTAG_RAW ("jtagraw", "x393_jtag", 132, 0, "0666", "c") ///< Just close open files (same as jtagraw)
#define DEV393_I2C_RAW ("xi2craw", "fpga_xi2c", 134, 5, "0666", "c") ///< 8bit registers, no address byte (just slave, then read/write byte(s) (NC393: Not used)
#define DEV393_I2C1_RAW ("xi2craw_aux", "fpga_xi2c", 134, 6, "0666", "c") ///< 8bit registers, no address byte (just slave, then read/write byte(s) bus 1
#define DEV393_I2C_ENABLE ("xi2cenable", "fpga_xi2c", 134, 7, "0666", "c") ///< enable(/protect) different I2C devices for different types of I2C accesses
#define DEV393_GAMMA ("gamma_cache","gamma_tables_operations",137,17,"0666", "c") ///< Cache for calculated gamma tables (common for all ports/channels/colors)
#define DEV393_HISTOGRAM ("histogram_cache","histograms_operations",138,18,"0666","c") ///< Access to acquired/calculated histograms for all ports/channels/colors
// Video memory access uses a single (shared) membridge module, so device driver should have exclusive access
#define DEV393_VIDEOMEM_RAW ("videomem_raw", "video_mem", 142, 1, "0666", "c") ///< Raw access to video memory using membridge module (NC393: Not yet implemented)
#define DEV393_IMAGE_RAW ("image_raw", "video_mem", 142, 2, "0666", "c") ///< Access to raw (uncompressed) data in video memory, frame-organized
#define DEV393_DETECT_SENSORS ("detect_sensors", "detect_sensors",143, 1, "0666", "c") ///< Probably not needed, only sysfs is used
#define DEV393_I2C_SENSORS ("", "elphel393-sensor-i2c",-1, -1, "0666", "c") ///< Used only in sysfs, no character device (yet?)
#define _DEV393_PATH(n, ...) "/dev/"n
#define _DEV393_NAME(a,n, ...) n
#define _DEV393_MAJOR(a,b,n, ...) n
#define _DEV393_MINOR(a,b,c,n, ...) n
#define _DEV393_PERMISSIONS(a,b,c,d,n, ...) n
#define _DEV393_TYPE(a,b,c,d,e,n,...) n
#define DEV393_PATH(LIST) _DEV393_PATH LIST
#define DEV393_NAME(LIST) _DEV393_NAME LIST
#define DEV393_MAJOR(LIST) _DEV393_MAJOR LIST
#define DEV393_MINOR(LIST) _DEV393_MINOR LIST
#define DEV393_PERMISSIONS(LIST) _DEV393_PERMISSIONS LIST
