Commit 326815dc authored by Andrey Filippov's avatar Andrey Filippov

more bugs fixed

parent e2386cf2
This diff is collapsed.
......@@ -1938,6 +1938,7 @@ int pgm_quality (int sensor_port, ///< sensor port number (0..3
x393_cmprs_mode_t cmprs_mode = {.d32=0};
int y_coring_index;
int c_coring_index;
int qtab = 0;
int composite_quality=(thispars->pars[P_QUALITY] & 0xff7f) | ((thispars->pars[P_PORTRAIT] & 1)<<7);
dev_dbg(g_dev_ptr,"{%d} frame16=%d\n",sensor_port,frame16);
MDP(DBGB_PSFN, sensor_port,"frame16=%d\n",frame16)
......@@ -1960,15 +1961,15 @@ int pgm_quality (int sensor_port, ///< sensor port number (0..3
// calculate quality tables - find already programmed FPGA page or calculates/programms a new one
// set_qtable_fpga returns table page (0..7) or -1 - invalid q
if ((thispars->pars[P_COMPMOD_QTAB]=set_qtable_fpga(composite_quality, sensor_port))>=0) {
cmprs_mode.qbank = thispars->pars[P_COMPMOD_QTAB];
if ((qtab=set_qtable_fpga(composite_quality, sensor_port))>=0) {
setFramePar(sensor_port, thispars, P_COMPMOD_QTAB, qtab); // single parameter, when more - use SETFRAMEPARS_SET
cmprs_mode.qbank = qtab;
cmprs_mode.qbank_set = 1;
X393_SEQ_SEND1 (sensor_port, frame16, x393_cmprs_control_reg, cmprs_mode);
dev_dbg(g_dev_ptr,"{%d} X393_SEQ_SEND1(0x%x, 0x%x, x393_cmprs_control_reg, 0x%x)\n",
sensor_port, sensor_port, frame16, cmprs_mode.d32);
MDP(DBGB_PADD, sensor_port,"X393_SEQ_SEND1(0x%x, 0x%x, x393_cmprs_control_reg, 0x%x)\n",
sensor_port, frame16, cmprs_mode.d32)
dev_dbg(g_dev_ptr,"{%d} X393_SEQ_SEND1(0x%x, 0x%x, x393_cmprs_control_reg, 0x%x), qtab = %d\n",
sensor_port, sensor_port, frame16, cmprs_mode.d32, qtab);
MDP(DBGB_PADD, sensor_port,"X393_SEQ_SEND1(0x%x, 0x%x, x393_cmprs_control_reg, 0x%x), qtab = %d\n",
sensor_port, frame16, cmprs_mode.d32, qtab)
return 0;
} else return -EFAULT;
......
......@@ -358,6 +358,7 @@ void init_qtable_fpga(unsigned int chn)
* @param[in] chn compressor channel number
* @return table page number used (0..7) or -1 - invalid q
*/
//TODO 393: Change to spinlock_irq_save!
int set_qtable_fpga(int quality2, unsigned int chn)
{
unsigned long flags;
......@@ -460,7 +461,11 @@ int set_qtable_fpga(int quality2, unsigned int chn)
}
table_addr.type = TABLE_TYPE_QUANT;
table_addr.addr32 = qtables_set[ind].qtable_fpga_mre * QTABLE_SIZE;
//NC393 TODO: Find why address should be x4
// table_addr.addr32 = qtables_set[ind].qtable_fpga_mre * QTABLE_SIZE;
table_addr.addr32 = qtables_set[ind].qtable_fpga_mre * QTABLE_SIZE*4;
dev_dbg(g_dev_ptr, "table_addr=0x%08x\n", table_addr);
x393_cmprs_tables_address(table_addr, chn);
for (i = 0; i < QTABLE_SIZE; i++) {
x393_cmprs_tables_data(qtable_fpga_dw[i], chn);
......
......@@ -1607,7 +1607,7 @@ struct p_names_t {
/* For past compatibility, CCMA_DMA_SIZE...
*/
//#define CCAM_DMA_SIZE CCAM_WORDS_PER_DMABUF
#define CCAM_DMA_SIZE 0x4000000 ///< Each channel buffer size TODO NC393: use only for initial allocation, move to DT
#define CCAM_DMA_SIZE 0x4000000 ///< Each channel buffer size in BYTES (was in DWORDS in NC353) TODO NC393: use only for initial allocation, move to DT
#define CIRCBUF_START_OFFSET 0x100000 ///< Offset for the first bufer TODO NC393: use only for initial allocation, move to DT
/*
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment