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linux-elphel
Commit 2455c447 authored by Oleg Dzhimiev's avatar Oleg Dzhimiev
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updated to current version

parent f9aa8d9f
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Showing with 57 additions and 25 deletions
src/drivers/mmc/host/sdhci.h
View file @ 2455c447
...@@ -17,6 +17,8 @@ ...@@ -17,6 +17,8 @@
#include <linux/compiler.h> #include <linux/compiler.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/leds.h>
#include <linux/interrupt.h>
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
...@@ -136,6 +138,7 @@ ...@@ -136,6 +138,7 @@
#define SDHCI_INT_CARD_REMOVE 0x00000080 #define SDHCI_INT_CARD_REMOVE 0x00000080
#define SDHCI_INT_CARD_INT 0x00000100 #define SDHCI_INT_CARD_INT 0x00000100
#define SDHCI_INT_RETUNE 0x00001000 #define SDHCI_INT_RETUNE 0x00001000
#define SDHCI_INT_CQE 0x00004000
#define SDHCI_INT_ERROR 0x00008000 #define SDHCI_INT_ERROR 0x00008000
#define SDHCI_INT_TIMEOUT 0x00010000 #define SDHCI_INT_TIMEOUT 0x00010000
#define SDHCI_INT_CRC 0x00020000 #define SDHCI_INT_CRC 0x00020000
...@@ -160,6 +163,13 @@ ...@@ -160,6 +163,13 @@
SDHCI_INT_BLK_GAP) SDHCI_INT_BLK_GAP)
#define SDHCI_INT_ALL_MASK ((unsigned int)-1) #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
#define SDHCI_CQE_INT_ERR_MASK ( \
SDHCI_INT_ADMA_ERROR | SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | \
SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | \
SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)
#define SDHCI_CQE_INT_MASK (SDHCI_CQE_INT_ERR_MASK | SDHCI_INT_CQE)
#define SDHCI_ACMD12_ERR 0x3C #define SDHCI_ACMD12_ERR 0x3C
#define SDHCI_HOST_CONTROL2 0x3E #define SDHCI_HOST_CONTROL2 0x3E
...@@ -429,8 +439,10 @@ struct sdhci_host { ...@@ -429,8 +439,10 @@ struct sdhci_host {
#define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14) #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14)
/* Broken Clock divider zero in controller */ /* Broken Clock divider zero in controller */
#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15) #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15)
/* Controller has CRC in 136 bit Command Response */
#define SDHCI_QUIRK2_RSP_136_HAS_CRC (1<<16)
/* Broken Clock between 19MHz-25MHz */ /* Broken Clock between 19MHz-25MHz */
#define SDHCI_QUIRK2_CLOCK_STANDARD_25_BROKEN (1<<16) #define SDHCI_QUIRK2_CLOCK_STANDARD_25_BROKEN (1<<17)
int irq; /* Device IRQ */ int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */ void __iomem *ioaddr; /* Mapped address */
...@@ -522,6 +534,10 @@ struct sdhci_host { ...@@ -522,6 +534,10 @@ struct sdhci_host {
/* cached registers */ /* cached registers */
u32 ier; u32 ier;
bool cqe_on; /* CQE is operating */
u32 cqe_ier; /* CQE interrupt mask */
u32 cqe_err_ier; /* CQE error interrupt mask */
wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */ wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */ unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */
...@@ -530,6 +546,11 @@ struct sdhci_host { ...@@ -530,6 +546,11 @@ struct sdhci_host {
#define SDHCI_TUNING_MODE_1 0 #define SDHCI_TUNING_MODE_1 0
#define SDHCI_TUNING_MODE_2 1 #define SDHCI_TUNING_MODE_2 1
#define SDHCI_TUNING_MODE_3 2 #define SDHCI_TUNING_MODE_3 2
/* Delay (ms) between tuning commands */
int tuning_delay;
/* Host SDMA buffer boundary. */
u32 sdma_boundary;
unsigned long private[0] ____cacheline_aligned; unsigned long private[0] ____cacheline_aligned;
}; };
...@@ -548,9 +569,12 @@ struct sdhci_ops { ...@@ -548,9 +569,12 @@ struct sdhci_ops {
void (*set_power)(struct sdhci_host *host, unsigned char mode, void (*set_power)(struct sdhci_host *host, unsigned char mode,
unsigned short vdd); unsigned short vdd);
u32 (*irq)(struct sdhci_host *host, u32 intmask);
int (*enable_dma)(struct sdhci_host *host); int (*enable_dma)(struct sdhci_host *host);
unsigned int (*get_max_clock)(struct sdhci_host *host); unsigned int (*get_max_clock)(struct sdhci_host *host);
unsigned int (*get_min_clock)(struct sdhci_host *host); unsigned int (*get_min_clock)(struct sdhci_host *host);
/* get_timeout_clock should return clk rate in unit of Hz */
unsigned int (*get_timeout_clock)(struct sdhci_host *host); unsigned int (*get_timeout_clock)(struct sdhci_host *host);
unsigned int (*get_max_timeout_count)(struct sdhci_host *host); unsigned int (*get_max_timeout_count)(struct sdhci_host *host);
void (*set_timeout)(struct sdhci_host *host, void (*set_timeout)(struct sdhci_host *host,
...@@ -566,10 +590,6 @@ struct sdhci_ops { ...@@ -566,10 +590,6 @@ struct sdhci_ops {
void (*adma_workaround)(struct sdhci_host *host, u32 intmask); void (*adma_workaround)(struct sdhci_host *host, u32 intmask);
void (*card_event)(struct sdhci_host *host); void (*card_event)(struct sdhci_host *host);
void (*voltage_switch)(struct sdhci_host *host); void (*voltage_switch)(struct sdhci_host *host);
int (*select_drive_strength)(struct sdhci_host *host,
struct mmc_card *card,
unsigned int max_dtr, int host_drv,
int card_drv, int *drv_type);
}; };
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
...@@ -656,24 +676,23 @@ static inline u8 sdhci_readb(struct sdhci_host *host, int reg) ...@@ -656,24 +676,23 @@ static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
#endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */ #endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
extern struct sdhci_host *sdhci_alloc_host(struct device *dev, struct sdhci_host *sdhci_alloc_host(struct device *dev, size_t priv_size);
size_t priv_size); void sdhci_free_host(struct sdhci_host *host);
extern void sdhci_free_host(struct sdhci_host *host);
static inline void *sdhci_priv(struct sdhci_host *host) static inline void *sdhci_priv(struct sdhci_host *host)
{ {
return (void *)host->private; return host->private;
} }
extern void sdhci_card_detect(struct sdhci_host *host); void sdhci_card_detect(struct sdhci_host *host);
extern void __sdhci_read_caps(struct sdhci_host *host, u16 *ver, u32 *caps, void __sdhci_read_caps(struct sdhci_host *host, u16 *ver, u32 *caps,
u32 *caps1); u32 *caps1);
extern int sdhci_setup_host(struct sdhci_host *host); int sdhci_setup_host(struct sdhci_host *host);
extern int __sdhci_add_host(struct sdhci_host *host); void sdhci_cleanup_host(struct sdhci_host *host);
extern int sdhci_add_host(struct sdhci_host *host); int __sdhci_add_host(struct sdhci_host *host);
extern void sdhci_remove_host(struct sdhci_host *host, int dead); int sdhci_add_host(struct sdhci_host *host);
extern void sdhci_send_command(struct sdhci_host *host, void sdhci_remove_host(struct sdhci_host *host, int dead);
struct mmc_command *cmd); void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd);
static inline void sdhci_read_caps(struct sdhci_host *host) static inline void sdhci_read_caps(struct sdhci_host *host)
{ {
...@@ -688,6 +707,7 @@ static inline bool sdhci_sdio_irq_enabled(struct sdhci_host *host) ...@@ -688,6 +707,7 @@ static inline bool sdhci_sdio_irq_enabled(struct sdhci_host *host)
u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
unsigned int *actual_clock); unsigned int *actual_clock);
void sdhci_set_clock(struct sdhci_host *host, unsigned int clock); void sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
void sdhci_enable_clk(struct sdhci_host *host, u16 clk);
void sdhci_set_power(struct sdhci_host *host, unsigned char mode, void sdhci_set_power(struct sdhci_host *host, unsigned char mode,
unsigned short vdd); unsigned short vdd);
void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode, void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode,
...@@ -695,13 +715,25 @@ void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode, ...@@ -695,13 +715,25 @@ void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode,
void sdhci_set_bus_width(struct sdhci_host *host, int width); void sdhci_set_bus_width(struct sdhci_host *host, int width);
void sdhci_reset(struct sdhci_host *host, u8 mask); void sdhci_reset(struct sdhci_host *host, u8 mask);
void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing); void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);
int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode);
void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
struct mmc_ios *ios);
void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable);
#ifdef CONFIG_PM #ifdef CONFIG_PM
extern int sdhci_suspend_host(struct sdhci_host *host); int sdhci_suspend_host(struct sdhci_host *host);
extern int sdhci_resume_host(struct sdhci_host *host); int sdhci_resume_host(struct sdhci_host *host);
extern void sdhci_enable_irq_wakeups(struct sdhci_host *host); void sdhci_enable_irq_wakeups(struct sdhci_host *host);
extern int sdhci_runtime_suspend_host(struct sdhci_host *host); int sdhci_runtime_suspend_host(struct sdhci_host *host);
extern int sdhci_runtime_resume_host(struct sdhci_host *host); int sdhci_runtime_resume_host(struct sdhci_host *host);
#endif #endif
void sdhci_cqe_enable(struct mmc_host *mmc);
void sdhci_cqe_disable(struct mmc_host *mmc, bool recovery);
bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
int *data_error);
void sdhci_dumpregs(struct sdhci_host *host);
#endif /* __SDHCI_HW_H */ #endif /* __SDHCI_HW_H */
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