elphel393-zynq-base.dtsi 10.4 KB
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/* */
/dts-v1/;
/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "xlnx,zynq-7000";
	model = "Elphel 10393 original";
	aliases {
		ethernet0 = &ps7_ethernet_0;
		serial0 = &ps7_uart_0;
	} ;
	chosen {
/*		bootargs = "console=ttyPS0,115200 debug root=/dev/ram rw ip=192.168.0.9 earlyprintk ramdisk_size=262144";*/
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		bootargs = "earlycon cma=128M root=/dev/mmcblk0p2 rw rootwait rootfstype=ext4";
		stdout-path = "serial0:115200n8";
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	} ;
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		ps7_cortexa9_0: cpu@0 {
			bus-handle = <&ps7_axi_interconnect_0>;
			clock-latency = <1000>;
			clocks = <&clkc 3>;
			compatible = "arm,cortex-a9";
			d-cache-line-size = <0x20>;
			d-cache-size = <0x8000>;
			device_type = "cpu";
			i-cache-line-size = <0x20>;
			i-cache-size = <0x8000>;
			interrupt-handle = <&ps7_scugic_0>;
			cpu0-supply = <&regulator_vccpint>;
			reg = <0x0>;
			operating-points = <
					666667 1000000
					333334 1000000
				>;
		} ;
		ps7_cortexa9_1: cpu@1 {
			bus-handle = <&ps7_axi_interconnect_0>;
			clocks = <&clkc 3>;
			compatible = "arm,cortex-a9";
			d-cache-line-size = <0x20>;
			d-cache-size = <0x8000>;
			device_type = "cpu";
			i-cache-line-size = <0x20>;
			i-cache-size = <0x8000>;
			interrupt-handle = <&ps7_scugic_0>;
			reg = <0x1>;
		} ;
	} ;
	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupt-parent = <&ps7_scugic_0>;
		interrupts = <0 5 4>, <0 6 4>;
		reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
		reg-names = "cpu0", "cpu1";
	} ;
	regulator_vccpint: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "VCCPINT";
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		regulator-boot-on;
		regulator-always-on;
	} ;
	ps7_ddr_0: memory@0 {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	} ;
	ps7_axi_interconnect_0: amba@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
		ranges ;
		ps7_afi_0: ps7-afi@f8008000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0xf8008000 0x1000>;
		} ;
		ps7_afi_1: ps7-afi@f8009000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0xf8009000 0x1000>;
		} ;
		ps7_afi_2: ps7-afi@f800a000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0xf800a000 0x1000>;
		} ;
		ps7_afi_3: ps7-afi@f800b000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0xf800b000 0x1000>;
		} ;
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		ocmc: ocmc@f800c000 {
			compatible = "xlnx,zynq-ocmc-1.0";
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 3 4>;
			reg = <0xf800c000 0x1000>;
		};
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		ps7_ddrc_0: ps7-ddrc@f8006000 {
			compatible = "xlnx,zynq-ddrc-a05";
			reg = <0xf8006000 0x1000>;
			xlnx,has-ecc = <0x0>;
		} ;
		ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
			clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
			clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
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			compatible = "xlnx,zynq-devcfg-1.0";
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			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 8 4>;
			reg = <0xf8007000 0x100>;
			syscon = <&ps7_slcr_0>;
		} ;
		ps7_dma_s: ps7-dma@f8003000 {
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <4>;
			arm,primecell-periphid = <0x41330>;
			clock-names = "apb_pclk";
			clocks = <&clkc 27>;
			compatible = "arm,pl330", "arm,primecell", "xlnx,ps7-dma-1.00.a";
			interrupt-parent = <&ps7_scugic_0>;
			interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
			interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
			reg = <0xf8003000 0x1000>;
		} ;
		ps7_ethernet_0: ps7-ethernet@e000b000 {
			#address-cells = <1>;
			#size-cells = <0>;
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			clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
			clock-names = "pclk", "hclk", "tx_clk";
			compatible = "cdns,zynq-gem", "cdns,gem";
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			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 22 4>;
			phy-mode = "rgmii-id";
			reg = <0xe000b000 0x1000>;
		} ;

		ps7_i2c_0: ps7-i2c@e0004000 {
			bus-id = <0>;
			clocks = <&clkc 38>;
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			compatible = "cdns,i2c-r1p10";
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			i2c-clk = <400000>;
			input-clk = <111111114>;
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = < 0 25 4 >;
			reg = < 0xe0004000 0x1000 >;
			xlnx,has-interrupt = <0x0>;
			xlnx,i2c-clk-freq-hz = <0x69f6bcb>;
			xlnx,i2c-reset = "";
			#address-cells = <1>;
			#size-cells = <0>;
		} ;
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		ps7_gpio_0: ps7-gpio@e000a000 {
			#gpio-cells = <2>;
			#interrupt-cells = <2>;
			clocks = <&clkc 42>;
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			compatible = "xlnx,zynq-gpio-1.0";
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			emio-gpio-width = <64>;
			gpio-controller ;
			gpio-mask-high = <0x0>;
			gpio-mask-low = <0x0>;
			interrupt-controller;
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 20 4>;
			reg = <0xe000a000 0x1000>;
		} ;
		ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
			compatible = "xlnx,ps7-iop-bus-config-1.00.a";
			reg = <0xe0200000 0x1000>;
		} ;
		ps7_pl310_0: ps7-pl310@f8f02000 {
			arm,data-latency = <3 2 2>;
			arm,tag-latency = <2 2 2>;
			cache-level = <2>;
			cache-unified ;
			compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 2 4>;
			reg = <0xf8f02000 0x1000>;
		} ;
		ps7_ram_0: ps7-ram@0 {
			compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 3 4>;
			reg = <0xfffc0000 0x40000>;
		} ;
		ps7_scugic_0: ps7-scugic@f8f01000 {
			#address-cells = <2>;
			#interrupt-cells = <3>;
			#size-cells = <1>;
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			compatible = "arm,cortex-a9-gic";
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			interrupt-controller ;
			num_cpus = <2>;
			num_interrupts = <96>;
			reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
		} ;
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		efuse: efuse@f800d000 {
			compatible = "xlnx,zynq-efuse";
			reg = <0xf800d000 0x20>;
		};
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		ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
			clocks = <&clkc 4>;
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			compatible = "arm,cortex-a9-global-timer";
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			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <1 11 0x301>;
			reg = <0xf8f00200 0x100>;
		} ;
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		scutimer: timer@f8f00600 {
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			clocks = <&clkc 4>;
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			compatible = "arm,cortex-a9-twd-timer";
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			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <1 13 0x301>;
			reg = <0xf8f00600 0x20>;
		} ;
		ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
			clocks = <&clkc 4>;
			compatible = "xlnx,ps7-scuwdt-1.00.a";
			device_type = "watchdog";
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <1 14 0x301>;
			reg = <0xf8f00620 0xe0>;
		} ;
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                watchdog0: watchdog@f8005000 {
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			clocks = <&clkc 45>;
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			compatible = "cdns,wdt-r1p2";
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			interrupt-parent = <&ps7_scugic_0>;
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			interrupts = <0 9 1>;
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			reg = <0xf8005000 0x1000>;
			reset = <0>;
			timeout-sec = <10>;
		} ;
		ps7_sd_0: ps7-sdio@e0100000 {
			clock-frequency = <0x7735940>;
			clock-names = "clk_xin", "clk_ahb", "ref_clk", "aper_clk";
			clocks = <&clkc 21>, <&clkc 32>, <&clkc 21>, <&clkc 32>;
			compatible = "arasan,sdhci-8.9a", "arasan,sdhci", "generic-sdhci", "xlnx,ps7-sdio-1.00.a";
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 24 4>;
			reg = <0xe0100000 0x1000>;
			xlnx,has-cd = <0x1>;
			xlnx,has-power = <0x0>;
			xlnx,has-wp = <0x1>;
			xlnx,sdio-clk-freq-hz = <0x3f93e10>;
			/*wp-inverted;*/
		} ;
		ps7_slcr_0: ps7-slcr@f8000000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "xlnx,zynq-slcr", "syscon", "simple-bus", "xlnx,ps7-slcr-1.00.a";
			ranges ;
			reg = <0xf8000000 0x1000>;
			clkc: clkc@100 {
				#clock-cells = <1>;
				clock-output-names = "armpll", "ddrpll", "iopll",
					"cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
					"ddr2x", "ddr3x", "dci",
					"lqspi", "smc", "pcap",
					"gem0", "gem1",
					"fclk0", "fclk1", "fclk2", "fclk3",
					"can0", "can1",
					"sdio0", "sdio1",
					"uart0", "uart1",
					"spi0", "spi1",
					"dma",
					"usb0_aper", "usb1_aper",
					"gem0_aper", "gem1_aper",
					"sdio0_aper", "sdio1_aper",
					"spi0_aper", "spi1_aper",
					"can0_aper", "can1_aper",
					"i2c0_aper", "i2c1_aper",
					"uart0_aper", "uart1_aper",
					"gpio_aper", "lqspi_aper", "smc_aper", "swdt",
					"dbg_trc", "dbg_apb";
				compatible = "xlnx,ps7-clkc";
				fclk-enable = <0xf>;
				ps-clk-frequency = <33333333>;
				reg = <0x100 0x100>;
			} ;
			rstc: rstc@200 {
				compatible = "xlnx,zynq-reset";
				reg = <0x200 0x48>;
				#reset-cells = <1>;
				syscon = <&ps7_slcr_0>;
			} ;
			pinctl0: pinctrl@700 {
				compatible = "xlnx,pinctrl-zynq";
				reg = <0x700 0x200>;
				syscon = <&ps7_slcr_0>;
			} ;
		} ;
		ps7_ttc_0: ps7-ttc@f8001000 {
			clocks = <&clkc 6>;
			compatible = "cdns,ttc", "xlnx,ps7-ttc-1.00.a";
			interrupt-names = "ttc0", "ttc1", "ttc2";
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
			reg = <0xf8001000 0x1000>;
		} ;

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		smcc: memory-controller@e000e000 {
			#address-cells = <2>;
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			#size-cells = <1>;
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		  	clock-names = "memclk", "apb_pclk";
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			clocks = <&clkc 11>, <&clkc 44>;
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			compatible = "arm,pl353-smc-r2p1", "arm,primecell";
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			interrupt-parent = <&ps7_scugic_0>;
			interrupts = < 0 18 4 >;
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			ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region
				  0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region
				  0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region

			reg = <0xe000e000 0x1000>;
			nand0: flash@e1000000 {
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				compatible = "arm,pl353-nand-r2p1";
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				reg = <0 0 0x1000000>;
                                nand-ecc-mode = "on-die";
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				/*arm,nand-clk-freq-hz = <0x5f5e100>;*/
				arm,nand-width = <0x8>;
				arm,nand-cycle-t0 = <0x4>;
				arm,nand-cycle-t1 = <0x4>;
				arm,nand-cycle-t2 = <0x1>;
				arm,nand-cycle-t3 = <0x2>;
				arm,nand-cycle-t4 = <0x2>;
				arm,nand-cycle-t5 = <0x2>;
				arm,nand-cycle-t6 = <0x4>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
			} ;
		} ;
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		ps7_uart_0: serial@e0000000 {
			clock-names = "uart_clk", "pclk", "ref_clk", "aper_clk";
			clocks = <&clkc 23>, <&clkc 40>, <&clkc 23>, <&clkc 40>;
			compatible = "xlnx,xuartps", "cdns,uart-r1p8", "xlnx,ps7-uart-1.00.a";
			device_type = "serial";
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 27 4>;
			reg = <0xe0000000 0x1000>;
			port-number = <1>;
			current-speed = <115200>;
			xlnx,has-modem = <0x0>;
		} ;
		ps7_usb_0: ps7-usb@e0002000 {
			clocks = <&clkc 28>;
			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
			reg = <0xe0002000 0x1000>;
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 21 4>;
			dr_mode = "host";
			phy_type = "ulpi";
			usb-phy = <&usb_phy0>;
		} ;
		ps7_xadc: ps7-xadc@f8007100 {
			clocks = <&clkc 12>;
			compatible = "xlnx,zynq-xadc-1.00.a", "xlnx,ps7-xadc-1.00.a";
			reg = <0xf8007100 0x20>;
			interrupt-parent = <&ps7_scugic_0>;
			interrupts = <0 7 4>;
		} ;
	} ;
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	usb_phy0: phy0{
		compatible = "ulpi-phy";
		#phy-cells = <0>;
		reg = <0xe0002000 0x1000>;
		view-port = <0x170>;
	} ;
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} ;