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Elphel
kicad-source-mirror
Commits
f687f9ef
Commit
f687f9ef
authored
Apr 10, 2014
by
Dick Hollenbeck
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Plain Diff
catch some IO_ERRORs
parent
5efdac01
Changes
2
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2 changed files
with
82 additions
and
42 deletions
+82
-42
single_top.cpp
common/single_top.cpp
+24
-0
readwrite_dlgs.cpp
cvpcb/readwrite_dlgs.cpp
+58
-42
No files found.
common/single_top.cpp
View file @
f687f9ef
...
@@ -226,6 +226,30 @@ struct APP_SINGLE_TOP : public wxApp
...
@@ -226,6 +226,30 @@ struct APP_SINGLE_TOP : public wxApp
return
wxApp
::
OnExit
();
return
wxApp
::
OnExit
();
}
}
int
OnRun
()
// overload wxApp virtual
{
try
{
return
wxApp
::
OnRun
();
}
catch
(
const
std
::
exception
&
e
)
{
wxLogError
(
"Unhandled exception class: %s what: %s"
,
typeid
(
e
).
name
(),
e
.
what
()
);
}
catch
(
const
IO_ERROR
&
ioe
)
{
wxLogError
(
"Unhandled exception class: %s what: %s"
,
typeid
(
ioe
).
name
(),
TO_UTF8
(
ioe
.
errorText
)
);
}
catch
(...)
{
wxLogError
(
"Unhandled exception of unknown type"
);
}
return
-
1
;
}
/**
/**
* Function MacOpenFile
* Function MacOpenFile
* is specific to MacOSX (not used under Linux or Windows).
* is specific to MacOSX (not used under Linux or Windows).
...
...
cvpcb/readwrite_dlgs.cpp
View file @
f687f9ef
...
@@ -119,6 +119,20 @@ void CVPCB_MAINFRAME::SetNewPkg( const wxString& aFootprintName )
...
@@ -119,6 +119,20 @@ void CVPCB_MAINFRAME::SetNewPkg( const wxString& aFootprintName )
}
}
#if 0
/*
This code block was based on two major assumptions that are no longer true:
1) Footprint library basenames would remain the same.
(But no, basenames have been renamed in the github repo.)
2) *.mod files would still be around and merely reside in the FP_LIB_TABLE.
(But no, they have been converted to *.pretty.)
There is a newer replacement code block in the #else region.
*/
/**
/**
* Function missingLegacyLibs
* Function missingLegacyLibs
* tests the list of \a aLibNames by URI to determine if any of them are missing from
* tests the list of \a aLibNames by URI to determine if any of them are missing from
...
@@ -171,21 +185,6 @@ static bool missingLegacyLibs( FP_LIB_TABLE* aTbl, SEARCH_STACK& aSStack,
...
@@ -171,21 +185,6 @@ static bool missingLegacyLibs( FP_LIB_TABLE* aTbl, SEARCH_STACK& aSStack,
}
}
#if 0
/*
This code block was based on two major assumptions that are no longer true:
1) Footprint library basenames would remain the same.
(But no, basenames have been renamed in the github repo.)
2) *.mod files would still be around and merely reside in the FP_LIB_TABLE.
(But no, they have been converted to *.pretty.)
There is a newer replacement code block in the #else region.
*/
/**
/**
* Function convertFromLegacy
* Function convertFromLegacy
* converts the footprint names in \a aNetList from the legacy format to the #FPID format.
* converts the footprint names in \a aNetList from the legacy format to the #FPID format.
...
@@ -460,7 +459,6 @@ bool CVPCB_MAINFRAME::ReadNetListAndLinkFiles()
...
@@ -460,7 +459,6 @@ bool CVPCB_MAINFRAME::ReadNetListAndLinkFiles()
#else
// new strategy
#else
// new strategy
/// Return true if the resultant FPID has a certain nickname. The guess
/// Return true if the resultant FPID has a certain nickname. The guess
/// is only made if this footprint resides in only one library.
/// is only made if this footprint resides in only one library.
/// @return int - 0 on success, 1 on not found, 2 on ambiguous i.e. multiple matches
/// @return int - 0 on success, 1 on not found, 2 on ambiguous i.e. multiple matches
...
@@ -548,6 +546,8 @@ bool CVPCB_MAINFRAME::ReadNetListAndLinkFiles()
...
@@ -548,6 +546,8 @@ bool CVPCB_MAINFRAME::ReadNetListAndLinkFiles()
{
{
msg
.
Clear
();
msg
.
Clear
();
try
{
for
(
unsigned
i
=
0
;
i
<
m_netlist
.
GetCount
();
i
++
)
for
(
unsigned
i
=
0
;
i
<
m_netlist
.
GetCount
();
i
++
)
{
{
COMPONENT
*
component
=
m_netlist
.
GetComponent
(
i
);
COMPONENT
*
component
=
m_netlist
.
GetComponent
(
i
);
...
@@ -582,6 +582,16 @@ bool CVPCB_MAINFRAME::ReadNetListAndLinkFiles()
...
@@ -582,6 +582,16 @@ bool CVPCB_MAINFRAME::ReadNetListAndLinkFiles()
}
}
}
}
}
}
}
catch
(
const
IO_ERROR
&
ioe
)
{
wxString
msg
=
ioe
.
errorText
;
msg
+=
wxT
(
"
\n\n
"
);
msg
+=
_
(
"First check your fp-lib-table entries."
);
wxMessageBox
(
msg
,
wxT
(
"Problematic fp-lib-tables"
)
);
return
false
;
}
if
(
msg
.
size
()
)
if
(
msg
.
size
()
)
{
{
...
@@ -593,7 +603,13 @@ bool CVPCB_MAINFRAME::ReadNetListAndLinkFiles()
...
@@ -593,7 +603,13 @@ bool CVPCB_MAINFRAME::ReadNetListAndLinkFiles()
dlg
.
MessageSet
(
wxT
(
"
\n
You will need to reassign them manually if you want them "
dlg
.
MessageSet
(
wxT
(
"
\n
You will need to reassign them manually if you want them "
"to be updated correctly the next time you import the "
"to be updated correctly the next time you import the "
"netlist in Pcbnew."
)
);
"netlist in Pcbnew."
)
);
#if 1
dlg
.
ShowModal
();
dlg
.
ShowModal
();
#else
dlg
.
Fit
();
dlg
.
Show
(
true
);
// modeless lets user watch while fixing the problems, but its not working.
#endif
}
}
}
}
else
else
...
...
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