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Commit f3cd8f57 authored by dickelbeck's avatar dickelbeck
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fixed a bug in "ratsnest on module or pad", and beautification

parent 8bb93b8d
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Showing with 586 additions and 511 deletions
pcbnew/controle.cpp
View file @ f3cd8f57
......@@ -138,7 +138,8 @@ void WinEDA_BasePcbFrame::GeneralControle( wxDC* DC, wxPoint Mouse )
// Save the board after the time out :
int CurrentTime = time( NULL );
if( !GetScreen()->IsModify() || GetScreen()->IsSave() )
{ /* If no change, reset the time out */
{
/* If no change, reset the time out */
g_SaveTime = CurrentTime;
}
......@@ -147,7 +148,9 @@ void WinEDA_BasePcbFrame::GeneralControle( wxDC* DC, wxPoint Mouse )
wxString tmpFileName = GetScreen()->m_FileName;
wxString filename = g_SaveFileName + PcbExtBuffer;
bool flgmodify = GetScreen()->IsModify();
( (WinEDA_PcbFrame*) this )->SavePcbFile( filename );
if( flgmodify ) // Set the flags m_Modify cleared by SavePcbFile()
{
GetScreen()->SetModify();
......@@ -326,8 +329,8 @@ void WinEDA_BasePcbFrame::GeneralControle( wxDC* DC, wxPoint Mouse )
GetScreen()->m_Curseur = curpos;
/* Put cursor on grid or a pad centre if requested
* But if the tool DELETE is active the cursor is left off grid
* this is better to reach items to delete off grid
* But if the tool DELETE is active the cursor is left off grid
* this is better to reach items to delete off grid
*/
D_PAD* pad;
bool keep_on_grid = TRUE;
......
pcbnew/edit.cpp
View file @ f3cd8f57
......@@ -126,7 +126,8 @@ void WinEDA_PcbFrame::OnLeftClick( wxDC* DC, const wxPoint& MousePos )
case ID_PCB_SHOW_1_RATSNEST_BUTT:
DrawStruct = PcbGeneralLocateAndDisplay();
Show_1_Ratsnest( DrawStruct, DC );
if( DrawStruct )
Show_1_Ratsnest( DrawStruct, DC );
break;
case ID_PCB_MIRE_BUTT:
......
pcbnew/editrack-part2.cpp
View file @ f3cd8f57
/*******************************/
/* Edition des pistes */
/* Routines de trace de pistes */
/*******************************/
/*******************************/
/* Edition des pistes */
/* Routines de trace de pistes */
/*******************************/
#include "fctsys.h"
#include "gr_basic.h"
......@@ -18,371 +18,410 @@
/* variables locales */
/***********************************************/
void WinEDA_PcbFrame::DisplayTrackSettings(void)
void WinEDA_PcbFrame::DisplayTrackSettings( void )
/***********************************************/
/* Display the current track width and via diameter
*/
*/
{
wxString msg;
wxString buftrc, bufvia;
valeur_param(g_DesignSettings.m_CurrentTrackWidth, buftrc);
valeur_param(g_DesignSettings.m_CurrentViaSize, bufvia);
msg.Printf( _("Track Width: %s Vias Size : %s"),
buftrc.GetData(), bufvia.GetData());
Affiche_Message( msg);
m_SelTrackWidthBox_Changed = TRUE;
m_SelViaSizeBox_Changed = TRUE;
wxString msg;
wxString buftrc, bufvia;
valeur_param( g_DesignSettings.m_CurrentTrackWidth, buftrc );
valeur_param( g_DesignSettings.m_CurrentViaSize, bufvia );
msg.Printf( _( "Track Width: %s Vias Size : %s" ),
buftrc.GetData(), bufvia.GetData() );
Affiche_Message( msg );
m_SelTrackWidthBox_Changed = TRUE;
m_SelViaSizeBox_Changed = TRUE;
}
/***********************************************/
void WinEDA_PcbFrame::Ratsnest_On_Off(wxDC * DC)
void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC )
/***********************************************/
/* Affiche ou efface le chevelu selon l'etat du bouton d'appel */
{
int ii;
CHEVELU * pt_chevelu;
if((m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
{
if ( g_Show_Ratsnest ) Compile_Ratsnest( DC, TRUE );
return;
}
DrawGeneralRatsnest(DC, 0); /* effacement eventuel du chevelu affiche */
pt_chevelu = m_Pcb->m_Ratsnest;
if ( pt_chevelu == NULL ) return;
if(g_Show_Ratsnest)
{
for( ii = m_Pcb->GetNumRatsnests(); ii > 0 ; pt_chevelu++, ii--)
{
pt_chevelu->status |= CH_VISIBLE;
}
DrawGeneralRatsnest(DC, 0);
}
else
{
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii--)
{
pt_chevelu->status &= ~CH_VISIBLE;
}
}
int ii;
CHEVELU* pt_chevelu;
if( (m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
{
if( g_Show_Ratsnest )
Compile_Ratsnest( DC, TRUE );
return;
}
DrawGeneralRatsnest( DC, 0 ); /* effacement eventuel du chevelu affiche */
pt_chevelu = m_Pcb->m_Ratsnest;
if( pt_chevelu == NULL )
return;
if( g_Show_Ratsnest )
{
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
pt_chevelu->status |= CH_VISIBLE;
}
DrawGeneralRatsnest( DC, 0 );
}
else
{
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
pt_chevelu->status &= ~CH_VISIBLE;
}
}
}
/*************************************************************************/
void WinEDA_PcbFrame::ExChange_Track_Layer(TRACK *pt_segm, wxDC * DC)
void WinEDA_PcbFrame::ExChange_Track_Layer( TRACK* pt_segm, wxDC* DC )
/*************************************************************************/
/*
change de couche la piste pointee par la souris :
la piste doit etre sur une des couches de travail,
elle est mise sur l'autre couche de travail, si cela est possible
(ou si DRC = Off ).
*/
* change de couche la piste pointee par la souris :
* la piste doit etre sur une des couches de travail,
* elle est mise sur l'autre couche de travail, si cela est possible
* (ou si DRC = Off ).
*/
{
int ii;
TRACK *pt_track;
int l1, l2 , nb_segm;
if ( (pt_segm == NULL ) || ( pt_segm->m_StructType == TYPEZONE ) )
{
return;
}
l1 = Route_Layer_TOP; l2 = Route_Layer_BOTTOM;
pt_track = Marque_Une_Piste(this, DC, pt_segm, &nb_segm, GR_XOR);
/* effacement du flag BUSY et sauvegarde en membre .param de la couche
initiale */
ii = nb_segm; pt_segm = pt_track;
for (; ii > 0; ii -- , pt_segm = (TRACK*)pt_segm->Pnext)
{
pt_segm->SetState(BUSY,OFF);
pt_segm->m_Param = pt_segm->m_Layer; /* pour sauvegarde */
}
ii = 0; pt_segm = pt_track;
for ( ; ii < nb_segm; ii++, pt_segm = (TRACK*) pt_segm->Pnext )
{
if( pt_segm->m_StructType == TYPEVIA) continue;
/* inversion des couches */
if( pt_segm->m_Layer == l1 ) pt_segm->m_Layer = l2 ;
else if(pt_segm->m_Layer == l2 ) pt_segm->m_Layer = l1 ;
if( (Drc_On) && ( Drc(this, DC,pt_segm,m_Pcb->m_Track,1) == BAD_DRC ) )
{ /* Annulation du changement */
ii = 0; pt_segm = pt_track;
for ( ; ii < nb_segm; ii++, pt_segm = (TRACK*) pt_segm->Pnext )
{
pt_segm->m_Layer = pt_segm->m_Param;
}
Trace_Une_Piste(DrawPanel, DC, pt_track, nb_segm, GR_OR);
DisplayError(this, _("Drc error, cancelled"), 10);
return;
}
}
Trace_Une_Piste(DrawPanel, DC, pt_track, nb_segm, GR_OR | GR_SURBRILL);
/* controle des extremites de segments: sont-ils sur un pad */
ii = 0; pt_segm = pt_track;
for(; ii < nb_segm; pt_segm = (TRACK*)pt_segm->Pnext, ii++)
{
pt_segm->start = Locate_Pad_Connecte(m_Pcb, pt_segm, START);
pt_segm->end = Locate_Pad_Connecte(m_Pcb, pt_segm, END);
}
test_1_net_connexion(DC, pt_track->m_NetCode );
Affiche_Infos_Piste(this, pt_track) ;
GetScreen()->SetModify();
int ii;
TRACK* pt_track;
int l1, l2, nb_segm;
if( (pt_segm == NULL ) || ( pt_segm->m_StructType == TYPEZONE ) )
{
return;
}
l1 = Route_Layer_TOP; l2 = Route_Layer_BOTTOM;
pt_track = Marque_Une_Piste( this, DC, pt_segm, &nb_segm, GR_XOR );
/* effacement du flag BUSY et sauvegarde en membre .param de la couche
* initiale */
ii = nb_segm; pt_segm = pt_track;
for( ; ii > 0; ii--, pt_segm = (TRACK*) pt_segm->Pnext )
{
pt_segm->SetState( BUSY, OFF );
pt_segm->m_Param = pt_segm->m_Layer; /* pour sauvegarde */
}
ii = 0; pt_segm = pt_track;
for( ; ii < nb_segm; ii++, pt_segm = (TRACK*) pt_segm->Pnext )
{
if( pt_segm->m_StructType == TYPEVIA )
continue;
/* inversion des couches */
if( pt_segm->m_Layer == l1 )
pt_segm->m_Layer = l2;
else if( pt_segm->m_Layer == l2 )
pt_segm->m_Layer = l1;
if( (Drc_On) && ( Drc( this, DC, pt_segm, m_Pcb->m_Track, 1 ) == BAD_DRC ) )
{ /* Annulation du changement */
ii = 0; pt_segm = pt_track;
for( ; ii < nb_segm; ii++, pt_segm = (TRACK*) pt_segm->Pnext )
{
pt_segm->m_Layer = pt_segm->m_Param;
}
Trace_Une_Piste( DrawPanel, DC, pt_track, nb_segm, GR_OR );
DisplayError( this, _( "Drc error, cancelled" ), 10 );
return;
}
}
Trace_Une_Piste( DrawPanel, DC, pt_track, nb_segm, GR_OR | GR_SURBRILL );
/* controle des extremites de segments: sont-ils sur un pad */
ii = 0; pt_segm = pt_track;
for( ; ii < nb_segm; pt_segm = (TRACK*) pt_segm->Pnext, ii++ )
{
pt_segm->start = Locate_Pad_Connecte( m_Pcb, pt_segm, START );
pt_segm->end = Locate_Pad_Connecte( m_Pcb, pt_segm, END );
}
test_1_net_connexion( DC, pt_track->m_NetCode );
Affiche_Infos_Piste( this, pt_track );
GetScreen()->SetModify();
}
/****************************************************************/
void WinEDA_PcbFrame::Other_Layer_Route(TRACK * track, wxDC * DC)
void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
/****************************************************************/
/*
Change de couche active pour le routage.
Si une piste est en cours de trace : placement d'une Via
*/
* Change de couche active pour le routage.
* Si une piste est en cours de trace : placement d'une Via
*/
{
TRACK * pt_segm;
SEGVIA * Via;
int ii;
int itmp;
if(track == NULL)
{
if(GetScreen()->m_Active_Layer != GetScreen()->m_Route_Layer_TOP)
GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_TOP;
else GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_BOTTOM ;
Affiche_Status_Box();
SetToolbars();
return;
}
/* Les vias ne doivent pas etre inutilement empilees: */
if( Locate_Via(m_Pcb, g_CurrentTrackSegment->m_End, g_CurrentTrackSegment->m_Layer))
return;
pt_segm = g_FirstTrackSegment;
for ( ii = 0; ii < g_TrackSegmentCount-1 ; ii++, pt_segm = (TRACK*)pt_segm->Pnext)
{
if( (pt_segm->m_StructType == TYPEVIA) &&
(g_CurrentTrackSegment->m_End == pt_segm->m_Start) )
return;
}
/* Test si segment possible a placer */
if ( Drc_On )
if ( Drc(this, DC,g_CurrentTrackSegment,m_Pcb->m_Track,1) == BAD_DRC )
return ;
/* save etat actuel pour regeneration si via impossible a placer */
itmp = g_TrackSegmentCount;
Begin_Route(g_CurrentTrackSegment, DC);
DrawPanel->ManageCurseur(DrawPanel, DC, FALSE);
Via = new SEGVIA(m_Pcb);
Via->m_Flags = IS_NEW;
Via->m_Width = g_DesignSettings.m_CurrentViaSize;
Via->m_Shape = g_DesignSettings.m_CurrentViaType ;
Via->m_NetCode = g_HightLigth_NetCode ;
Via->m_Start = Via->m_End = g_CurrentTrackSegment->m_End;
Via->m_Layer = GetScreen()->m_Active_Layer;
// Provisoirement. indicate the first layer (?)
//swap the layers.
if( GetScreen()->m_Active_Layer != GetScreen()->m_Route_Layer_TOP)
GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_TOP ;
else GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_BOTTOM ;
if ( (Via->m_Shape & 15) == VIA_ENTERREE )
{
Via->m_Layer |= GetScreen()->m_Active_Layer << 4;
}
else if ( (Via->m_Shape & 15) == VIA_BORGNE ) //blind via
{ // A revoir! ( la via devrait deboucher sur 1 cote )
Via->m_Layer |= GetScreen()->m_Active_Layer << 4;
}
else Via->m_Layer = 0x0F;
if ( Drc_On &&( Drc(this, DC,Via,m_Pcb->m_Track,1 ) == BAD_DRC ) )
{ /* Via impossible a placer ici */
delete Via;
GetScreen()->m_Active_Layer = g_CurrentTrackSegment->m_Layer ;
DrawPanel->ManageCurseur(DrawPanel, DC, FALSE);
return;
}
/* la via est OK et est inseree apres le segment courant */
Via->Pback = g_CurrentTrackSegment;
g_CurrentTrackSegment->Pnext = Via;
g_TrackSegmentCount++;
g_CurrentTrackSegment = new TRACK(*g_CurrentTrackSegment);
g_CurrentTrackSegment->m_Layer = GetScreen()->m_Active_Layer;
g_CurrentTrackSegment->m_Start = g_CurrentTrackSegment->m_End = Via->m_Start;
g_TrackSegmentCount++;
g_CurrentTrackSegment->Pback = Via;
Via->Pnext = g_CurrentTrackSegment;
if ( g_TwoSegmentTrackBuild )
{ // Create a second segment (we must have 2 track segments to adjust)
TRACK * track = g_CurrentTrackSegment;
g_CurrentTrackSegment = new TRACK(*track);
g_TrackSegmentCount++;
g_CurrentTrackSegment->Pback = track;
track->Pnext = g_CurrentTrackSegment;
}
DrawPanel->ManageCurseur(DrawPanel, DC, FALSE);
Affiche_Infos_Piste(this, Via);
Affiche_Status_Box();
SetToolbars();
TRACK* pt_segm;
SEGVIA* Via;
int ii;
int itmp;
if( track == NULL )
{
if( GetScreen()->m_Active_Layer != GetScreen()->m_Route_Layer_TOP )
GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_TOP;
else
GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_BOTTOM;
Affiche_Status_Box();
SetToolbars();
return;
}
/* Les vias ne doivent pas etre inutilement empilees: */
if( Locate_Via( m_Pcb, g_CurrentTrackSegment->m_End, g_CurrentTrackSegment->m_Layer ) )
return;
pt_segm = g_FirstTrackSegment;
for( ii = 0; ii < g_TrackSegmentCount - 1; ii++, pt_segm = (TRACK*) pt_segm->Pnext )
{
if( (pt_segm->m_StructType == TYPEVIA)
&& (g_CurrentTrackSegment->m_End == pt_segm->m_Start) )
return;
}
/* Test si segment possible a placer */
if( Drc_On )
if( Drc( this, DC, g_CurrentTrackSegment, m_Pcb->m_Track, 1 ) == BAD_DRC )
return;
/* save etat actuel pour regeneration si via impossible a placer */
itmp = g_TrackSegmentCount;
Begin_Route( g_CurrentTrackSegment, DC );
DrawPanel->ManageCurseur( DrawPanel, DC, FALSE );
Via = new SEGVIA( m_Pcb );
Via->m_Flags = IS_NEW;
Via->m_Width = g_DesignSettings.m_CurrentViaSize;
Via->m_Shape = g_DesignSettings.m_CurrentViaType;
Via->m_NetCode = g_HightLigth_NetCode;
Via->m_Start = Via->m_End = g_CurrentTrackSegment->m_End;
Via->m_Layer = GetScreen()->m_Active_Layer;
// Provisoirement. indicate the first layer (?)
//swap the layers.
if( GetScreen()->m_Active_Layer != GetScreen()->m_Route_Layer_TOP )
GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_TOP;
else
GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_BOTTOM;
if( (Via->m_Shape & 15) == VIA_ENTERREE )
{
Via->m_Layer |= GetScreen()->m_Active_Layer << 4;
}
else if( (Via->m_Shape & 15) == VIA_BORGNE ) //blind via
{ // A revoir! ( la via devrait deboucher sur 1 cote )
Via->m_Layer |= GetScreen()->m_Active_Layer << 4;
}
else
Via->m_Layer = 0x0F;
if( Drc_On &&( Drc( this, DC, Via, m_Pcb->m_Track, 1 ) == BAD_DRC ) )
{ /* Via impossible a placer ici */
delete Via;
GetScreen()->m_Active_Layer = g_CurrentTrackSegment->m_Layer;
DrawPanel->ManageCurseur( DrawPanel, DC, FALSE );
return;
}
/* la via est OK et est inseree apres le segment courant */
Via->Pback = g_CurrentTrackSegment;
g_CurrentTrackSegment->Pnext = Via;
g_TrackSegmentCount++;
g_CurrentTrackSegment = new TRACK( *g_CurrentTrackSegment );
g_CurrentTrackSegment->m_Layer = GetScreen()->m_Active_Layer;
g_CurrentTrackSegment->m_Start = g_CurrentTrackSegment->m_End = Via->m_Start;
g_TrackSegmentCount++;
g_CurrentTrackSegment->Pback = Via;
Via->Pnext = g_CurrentTrackSegment;
if( g_TwoSegmentTrackBuild )
{ // Create a second segment (we must have 2 track segments to adjust)
TRACK* track = g_CurrentTrackSegment;
g_CurrentTrackSegment = new TRACK( *track );
g_TrackSegmentCount++;
g_CurrentTrackSegment->Pback = track;
track->Pnext = g_CurrentTrackSegment;
}
DrawPanel->ManageCurseur( DrawPanel, DC, FALSE );
Affiche_Infos_Piste( this, Via );
Affiche_Status_Box();
SetToolbars();
}
/*************************************************/
void WinEDA_PcbFrame::Affiche_Status_Net(wxDC * DC)
void WinEDA_PcbFrame::Affiche_Status_Net( wxDC* DC )
/*************************************************/
/* Affiche:
le status du net en haut d'ecran du segment pointe par la souris
ou le status PCB en bas d'ecran si pas de segment pointe
*/
* le status du net en haut d'ecran du segment pointe par la souris
* ou le status PCB en bas d'ecran si pas de segment pointe
*/
{
TRACK * pt_segm;
int masquelayer = g_TabOneLayerMask[GetScreen()->m_Active_Layer];
pt_segm = Locate_Pistes(m_Pcb->m_Track, masquelayer, CURSEUR_OFF_GRILLE);
if(pt_segm == NULL) Affiche_Infos_Status_Pcb(this);
else test_1_net_connexion(DC, pt_segm->m_NetCode);
TRACK* pt_segm;
int masquelayer = g_TabOneLayerMask[GetScreen()->m_Active_Layer];
pt_segm = Locate_Pistes( m_Pcb->m_Track, masquelayer, CURSEUR_OFF_GRILLE );
if( pt_segm == NULL )
Affiche_Infos_Status_Pcb( this );
else
test_1_net_connexion( DC, pt_segm->m_NetCode );
}
/**********************************************************************/
void WinEDA_PcbFrame::Show_1_Ratsnest(EDA_BaseStruct * item, wxDC * DC)
void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
/**********************************************************************/
/* Affiche le ratsnest relatif
au net du pad pointe par la souris
ou au module localise par la souris
Efface le chevelu affiche si aucun module ou pad n'est selectionne
*/
* au net du pad pointe par la souris
* ou au module localise par la souris
* Efface le chevelu affiche si aucun module ou pad n'est selectionne
*/
{
int ii;
CHEVELU * pt_chevelu;
D_PAD * pt_pad = NULL;
MODULE * Module = NULL;
if (g_Show_Ratsnest) return; // Deja Affich�
if((m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
{
Compile_Ratsnest( DC, TRUE );
}
if ( item && (item->m_StructType == TYPEPAD) )
{
pt_pad = (D_PAD*)item;
Module = (MODULE *) pt_pad->m_Parent;
}
if ( pt_pad ) /* Affichage du chevelu du net correspondant */
{
pt_pad->Display_Infos(this);
pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii--)
{
if( pt_chevelu->m_NetCode == pt_pad->m_NetCode)
{
if( (pt_chevelu->status & CH_VISIBLE) != 0 ) continue;
pt_chevelu->status |= CH_VISIBLE;
if( (pt_chevelu->status & CH_ACTIF) == 0 ) continue;
GRSetDrawMode(DC, GR_XOR);
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
pt_chevelu->pad_start->m_Pos.y,
pt_chevelu->pad_end->m_Pos.x,
pt_chevelu->pad_end->m_Pos.y,
0,
g_DesignSettings.m_RatsnestColor);
}
}
}
else
{
if ( item && (item->m_StructType == TYPEMODULE) )
{
Module = (MODULE*)item;
}
if( Module)
{
Module->Display_Infos(this);
pt_pad = Module->m_Pads;
for( ; pt_pad != NULL; pt_pad = (D_PAD*)pt_pad->Pnext)
{
pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii--)
{
if( (pt_chevelu->pad_start == pt_pad) ||
(pt_chevelu->pad_end == pt_pad) )
{
if( pt_chevelu->status & CH_VISIBLE ) continue;
pt_chevelu->status |= CH_VISIBLE;
if( (pt_chevelu->status & CH_ACTIF) == 0 ) continue;
GRSetDrawMode(DC, GR_XOR);
GRLine(&DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
pt_chevelu->pad_start->m_Pos.y,
pt_chevelu->pad_end->m_Pos.x,
pt_chevelu->pad_end->m_Pos.y,
0,
g_DesignSettings.m_RatsnestColor);
}
}
}
pt_pad = NULL;
}
}
/* Effacement complet des selections
si aucun pad ou module n'a ete localise */
if( (pt_pad == NULL) && (Module == NULL) )
{
MsgPanel->EraseMsgBox();
DrawGeneralRatsnest(DC);
pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
for( ii = m_Pcb->GetNumRatsnests();(ii > 0) && pt_chevelu; pt_chevelu++, ii--)
pt_chevelu->status &= ~CH_VISIBLE;
}
int ii;
CHEVELU* pt_chevelu;
D_PAD* pt_pad = NULL;
MODULE* Module = NULL;
if( g_Show_Ratsnest )
return; // Deja Affich�
if( !item )
return;
if( (m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
{
Compile_Ratsnest( DC, TRUE );
}
if( item->m_StructType == TYPEPAD )
{
pt_pad = (D_PAD*) item;
Module = (MODULE*) pt_pad->m_Parent;
}
if( pt_pad ) /* Affichage du chevelu du net correspondant */
{
pt_pad->Display_Infos( this );
pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
if( pt_chevelu->m_NetCode == pt_pad->m_NetCode )
{
if( (pt_chevelu->status & CH_VISIBLE) != 0 )
continue;
pt_chevelu->status |= CH_VISIBLE;
if( (pt_chevelu->status & CH_ACTIF) == 0 )
continue;
GRSetDrawMode( DC, GR_XOR );
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
pt_chevelu->pad_start->m_Pos.y,
pt_chevelu->pad_end->m_Pos.x,
pt_chevelu->pad_end->m_Pos.y,
0,
g_DesignSettings.m_RatsnestColor );
}
}
}
else
{
if( item->m_StructType == TYPETEXTEMODULE )
{
Module = (MODULE*) item->m_Parent;
}
else if( item->m_StructType == TYPEMODULE )
{
Module = (MODULE*) item;
}
if( Module )
{
Module->Display_Infos( this );
pt_pad = Module->m_Pads;
for( ; pt_pad != NULL; pt_pad = (D_PAD*) pt_pad->Pnext )
{
pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
if( (pt_chevelu->pad_start == pt_pad)
|| (pt_chevelu->pad_end == pt_pad) )
{
if( pt_chevelu->status & CH_VISIBLE )
continue;
pt_chevelu->status |= CH_VISIBLE;
if( (pt_chevelu->status & CH_ACTIF) == 0 )
continue;
GRSetDrawMode( DC, GR_XOR );
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
pt_chevelu->pad_start->m_Pos.y,
pt_chevelu->pad_end->m_Pos.x,
pt_chevelu->pad_end->m_Pos.y,
0,
g_DesignSettings.m_RatsnestColor );
}
}
}
pt_pad = NULL;
}
}
/* Effacement complet des selections
* si aucun pad ou module n'a ete localise */
if( (pt_pad == NULL) && (Module == NULL) )
{
MsgPanel->EraseMsgBox();
DrawGeneralRatsnest( DC );
pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
for( ii = m_Pcb->GetNumRatsnests(); (ii > 0) && pt_chevelu; pt_chevelu++, ii-- )
pt_chevelu->status &= ~CH_VISIBLE;
}
}
/*****************************************************/
void WinEDA_PcbFrame::Affiche_PadsNoConnect(wxDC * DC)
void WinEDA_PcbFrame::Affiche_PadsNoConnect( wxDC* DC )
/*****************************************************/
/* Met en surbrillance les pads non encore connectes ( correspondants aux
chevelus actifs
*/
* chevelus actifs
*/
{
int ii;
CHEVELU * pt_chevelu;
D_PAD * pt_pad;
pt_chevelu = (CHEVELU*)m_Pcb->m_Ratsnest;
for( ii = m_Pcb->GetNumRatsnests();ii > 0; pt_chevelu++, ii--)
{
if( (pt_chevelu->status & CH_ACTIF) == 0 ) continue;
pt_pad = pt_chevelu->pad_start;
if (pt_pad)
pt_pad->Draw(DrawPanel,DC, wxPoint(0,0), GR_OR | GR_SURBRILL);
pt_pad = pt_chevelu->pad_end;
if (pt_pad)
pt_pad->Draw(DrawPanel,DC, wxPoint(0,0), GR_OR | GR_SURBRILL);
}
int ii;
CHEVELU* pt_chevelu;
D_PAD* pt_pad;
pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{
if( (pt_chevelu->status & CH_ACTIF) == 0 )
continue;
pt_pad = pt_chevelu->pad_start;
if( pt_pad )
pt_pad->Draw( DrawPanel, DC, wxPoint( 0, 0 ), GR_OR | GR_SURBRILL );
pt_pad = pt_chevelu->pad_end;
if( pt_pad )
pt_pad->Draw( DrawPanel, DC, wxPoint( 0, 0 ), GR_OR | GR_SURBRILL );
}
}
pcbnew/locate.cpp
View file @ f3cd8f57
......@@ -2,6 +2,7 @@
/* Localisation des elements */
/*****************************/
#include "fctsys.h"
#include "gr_basic.h"
......@@ -19,15 +20,24 @@ int ux0, uy0, dx, dy, spot_cX, spot_cY; /* Variables utilisees pour
/* fonctions locales */
EDA_BaseStruct* Locate_MirePcb( EDA_BaseStruct* PtStruct, int LayerSearch, int typeloc );
/**/
/* Macro de calcul de la coord de pointage selon le curseur
* (ON/OFF grille) choisi
/**
* Function RefPos
* returns the reference position, coming from either the mouse position or the
* the cursor position, based on whether the typeloc has the CURSEUR_OFF_GRILLE
* flag ORed in or not.
* @param typeloc int with possible CURSEUR_OFF_GRILLE bit on.
* @return wxPoint - The reference point, either the mouse position or
* the cursor position.
*/
#define SET_REF_POS( ref_pos ) if( typeloc == CURSEUR_ON_GRILLE ) \
{ ref_pos = ActiveScreen->m_Curseur; } \
else { ref_pos = ActiveScreen->m_MousePosition; }
wxPoint inline RefPos( int typeloc )
{
if( typeloc & CURSEUR_OFF_GRILLE )
return ActiveScreen->m_MousePosition;
else
return ActiveScreen->m_Curseur;
}
/**
* Function IsModuleLayerVisible
......@@ -36,7 +46,8 @@ EDA_BaseStruct* Locate_MirePcb( EDA_BaseStruct* PtStruct, int LayerSearch, int t
* @param layer One of the two allowed layers for modules: CMP_N or CUIVRE_N
* @return bool - true if the layer is visible, else false.
*/
bool inline IsModuleLayerVisible( int layer ) {
bool inline IsModuleLayerVisible( int layer )
{
if( layer==CMP_N )
return DisplayOpt.Show_Modules_Cmp;
......@@ -102,8 +113,8 @@ EDA_BaseStruct* WinEDA_BasePcbFrame::Locate( int typeloc, int LayerSearch )
/*******************************************************************************/
/* General locate function
* Display infos relatives to the item found
* return a pointer to this item ( or NULL )
* Display infos relatives to the item found
* return a pointer to this item ( or NULL )
*/
{
TEXTE_PCB* pt_texte_pcb;
......@@ -145,7 +156,8 @@ EDA_BaseStruct* WinEDA_BasePcbFrame::Locate( int typeloc, int LayerSearch )
Track = Locate_Pistes( m_Pcb->m_Track, masque_layer, typeloc );
if( Track != NULL )
{
TrackLocate = Track; /* a track or a via is found*/
TrackLocate = Track; /* a track or a via is found */
/* Search for a via */
while( ( TrackLocate = Locate_Pistes( TrackLocate,
masque_layer, typeloc ) ) != NULL )
......@@ -153,6 +165,7 @@ EDA_BaseStruct* WinEDA_BasePcbFrame::Locate( int typeloc, int LayerSearch )
Track = TrackLocate;
if( TrackLocate->m_StructType == TYPEVIA )
break;
TrackLocate = (TRACK*) TrackLocate->Pnext;
}
......@@ -169,8 +182,9 @@ EDA_BaseStruct* WinEDA_BasePcbFrame::Locate( int typeloc, int LayerSearch )
/* Search for a footprint text */
// First search: locate texts for footprints on copper or component layer
// Priority to the active layer (component or copper.
// this is useful for small smd components when 2 texts overlap but are not on the same layer
// Priority to the active layer (component or copper).
// This is useful for small smd components when 2 texts overlap but are not
// on the same layer
if( LayerSearch == LAYER_CUIVRE_N || LayerSearch == CMP_N )
{
for( module = m_Pcb->m_Modules; module != NULL; module = (MODULE*) module->Pnext )
......@@ -315,15 +329,15 @@ EDGE_MODULE* Locate_Edge_Module( MODULE* module, int typeloc )
EDA_BaseStruct* PtStruct;
int uxf, uyf, type_trace;
int rayon, dist;
wxPoint ref_pos; /* coord du point de localisation */
int StAngle, EndAngle, MouseAngle;/* pour localisation d'arcs,
* angle du point de debut, de fin et du point
* de reference */
wxPoint ref_pos; /* coord du point de localisation */
/* pour localisation d'arcs, angle du point de debut, de fin et du point de reference */
int StAngle, EndAngle, MouseAngle;
if( !module )
return NULL;
SET_REF_POS( ref_pos );
ref_pos = RefPos( typeloc );
PtStruct = module->m_Drawings;
for( ; PtStruct != NULL; PtStruct = PtStruct->Pnext )
......@@ -397,7 +411,7 @@ EDA_BaseStruct* Locate_Cotation( BOARD* Pcb, int LayerSearch, int typeloc )
wxPoint ref_pos;
int ux0, uy0;
SET_REF_POS( ref_pos );
ref_pos = RefPos( typeloc );
PtStruct = Pcb->m_Drawings;
for( ; PtStruct != NULL; PtStruct = PtStruct->Pnext )
......@@ -418,6 +432,7 @@ EDA_BaseStruct* Locate_Cotation( BOARD* Pcb, int LayerSearch, int typeloc )
/* Localisation des SEGMENTS ?) */
ux0 = Cotation->Barre_ox; uy0 = Cotation->Barre_oy;
/* recalcul des coordonnees avec ux0, uy0 = origine des coordonnees */
dx = Cotation->Barre_fx - ux0; dy = Cotation->Barre_fy - uy0;
spot_cX = ref_pos.x - ux0; spot_cY = ref_pos.y - uy0;
......@@ -427,6 +442,7 @@ EDA_BaseStruct* Locate_Cotation( BOARD* Pcb, int LayerSearch, int typeloc )
return PtStruct;
ux0 = Cotation->TraitG_ox; uy0 = Cotation->TraitG_oy;
/* recalcul des coordonnees avec ux0, uy0 = origine des coordonnees */
dx = Cotation->TraitG_fx - ux0; dy = Cotation->TraitG_fy - uy0;
spot_cX = ref_pos.x - ux0; spot_cY = ref_pos.y - uy0;
......@@ -436,6 +452,7 @@ EDA_BaseStruct* Locate_Cotation( BOARD* Pcb, int LayerSearch, int typeloc )
return PtStruct;
ux0 = Cotation->TraitD_ox; uy0 = Cotation->TraitD_oy;
/* recalcul des coordonnees avec ux0, uy0 = origine des coordonnees */
dx = Cotation->TraitD_fx - ux0; dy = Cotation->TraitD_fy - uy0;
spot_cX = ref_pos.x - ux0; spot_cY = ref_pos.y - uy0;
......@@ -445,6 +462,7 @@ EDA_BaseStruct* Locate_Cotation( BOARD* Pcb, int LayerSearch, int typeloc )
return PtStruct;
ux0 = Cotation->FlecheD1_ox; uy0 = Cotation->FlecheD1_oy;
/* recalcul des coordonnees avec ux0, uy0 = origine des coordonnees */
dx = Cotation->FlecheD1_fx - ux0; dy = Cotation->FlecheD1_fy - uy0;
spot_cX = ref_pos.x - ux0; spot_cY = ref_pos.y - uy0;
......@@ -454,6 +472,7 @@ EDA_BaseStruct* Locate_Cotation( BOARD* Pcb, int LayerSearch, int typeloc )
return PtStruct;
ux0 = Cotation->FlecheD2_ox; uy0 = Cotation->FlecheD2_oy;
/* recalcul des coordonnees avec ux0, uy0 = origine des coordonnees */
dx = Cotation->FlecheD2_fx - ux0; dy = Cotation->FlecheD2_fy - uy0;
spot_cX = ref_pos.x - ux0; spot_cY = ref_pos.y - uy0;
......@@ -463,6 +482,7 @@ EDA_BaseStruct* Locate_Cotation( BOARD* Pcb, int LayerSearch, int typeloc )
return PtStruct;
ux0 = Cotation->FlecheG1_ox; uy0 = Cotation->FlecheG1_oy;
/* recalcul des coordonnees avec ux0, uy0 = origine des coordonnees */
dx = Cotation->FlecheG1_fx - ux0; dy = Cotation->FlecheG1_fy - uy0;
spot_cX = ref_pos.x - ux0; spot_cY = ref_pos.y - uy0;
......@@ -472,6 +492,7 @@ EDA_BaseStruct* Locate_Cotation( BOARD* Pcb, int LayerSearch, int typeloc )
return PtStruct;
ux0 = Cotation->FlecheG2_ox; uy0 = Cotation->FlecheG2_oy;
/* recalcul des coordonnees avec ux0, uy0 = origine des coordonnees */
dx = Cotation->FlecheG2_fx - ux0; dy = Cotation->FlecheG2_fy - uy0;
spot_cX = ref_pos.x - ux0; spot_cY = ref_pos.y - uy0;
......@@ -501,7 +522,7 @@ DRAWSEGMENT* Locate_Segment_Pcb( BOARD* Pcb, int LayerSearch, int typeloc )
wxPoint ref_pos;
PCB_SCREEN* screen = (PCB_SCREEN*) ActiveScreen;
SET_REF_POS( ref_pos );
ref_pos = RefPos( typeloc );
PtStruct = Pcb->m_Drawings;
for( ; PtStruct != NULL; PtStruct = PtStruct->Pnext )
......@@ -511,7 +532,9 @@ DRAWSEGMENT* Locate_Segment_Pcb( BOARD* Pcb, int LayerSearch, int typeloc )
pts = (DRAWSEGMENT*) PtStruct;
if( (pts->m_Layer != LayerSearch) && (LayerSearch != -1) )
continue;
ux0 = pts->m_Start.x; uy0 = pts->m_Start.y;
/* recalcul des coordonnees avec ux0, uy0 = origine des coordonnees */
dx = pts->m_End.x - ux0; dy = pts->m_End.y - uy0;
spot_cX = ref_pos.x - ux0; spot_cY = ref_pos.y - uy0;
......@@ -520,8 +543,10 @@ DRAWSEGMENT* Locate_Segment_Pcb( BOARD* Pcb, int LayerSearch, int typeloc )
if( (pts->m_Shape == S_CIRCLE) || (pts->m_Shape == S_ARC) )
{
int rayon, dist, StAngle, EndAngle, MouseAngle;
rayon = (int) hypot( (double) (dx), (double) (dy) );
dist = (int) hypot( (double) (spot_cX), (double) (spot_cY) );
if( abs( rayon - dist ) <= (pts->m_Width / 2) )
{
if( pts->m_Shape == S_CIRCLE )
......@@ -531,6 +556,7 @@ DRAWSEGMENT* Locate_Segment_Pcb( BOARD* Pcb, int LayerSearch, int typeloc )
else if( !locate_segm )
locate_segm = pts;
}
/* pour un arc, controle complementaire */
MouseAngle = (int) ArcTangente( spot_cY, spot_cX );
StAngle = (int) ArcTangente( dy, dx );
......@@ -586,9 +612,7 @@ DRAWSEGMENT* Locate_Segment_Pcb( BOARD* Pcb, int LayerSearch, int typeloc )
D_PAD* Locate_Any_Pad( BOARD* Pcb, int typeloc, bool OnlyCurrentLayer )
{
wxPoint ref_pos;
SET_REF_POS( ref_pos );
wxPoint ref_pos = RefPos( typeloc );
return Locate_Any_Pad( Pcb, ref_pos, OnlyCurrentLayer );
}
......@@ -635,9 +659,7 @@ D_PAD* Locate_Any_Pad( BOARD* Pcb, const wxPoint& ref_pos, bool OnlyCurrentLayer
D_PAD* Locate_Pads( MODULE* module, int masque_layer, int typeloc )
{
wxPoint ref_pos;
SET_REF_POS( ref_pos );
wxPoint ref_pos = RefPos( typeloc );
return Locate_Pads( module, ref_pos, masque_layer );
}
......@@ -713,7 +735,8 @@ MODULE* Locate_Prefered_Module( BOARD* Pcb, int typeloc )
int layer; /* pour calcul de couches prioritaires */
wxPoint ref_pos; /* coord du point de reference pour la localisation */
SET_REF_POS( ref_pos );
ref_pos = RefPos( typeloc );
pt_module = Pcb->m_Modules;
for( ; pt_module; pt_module = (MODULE*) pt_module->Pnext )
{
......@@ -757,7 +780,7 @@ MODULE* Locate_Prefered_Module( BOARD* Pcb, int typeloc )
}
}
else if( !(typeloc & MATCH_LAYER)
&& ( !(typeloc & VISIBLE_ONLY) || IsModuleLayerVisible( layer ) ) )
&& ( !(typeloc & VISIBLE_ONLY) || IsModuleLayerVisible( layer ) ) )
{
if( min( lx, ly ) <= alt_min_dim )
{
......@@ -795,7 +818,8 @@ TEXTE_MODULE* LocateTexteModule( BOARD* Pcb, MODULE** PtModule, int typeloc )
* - pointeur sur le texte localise ( ou NULL )
* - si Ptmodule != NULL: pointeur sur module module ( non modifie sinon )
*
* if typeloc bas the flag VISIBLE_ONLY set, only footprints which are "visible" are considered
* if typeloc has the flag VISIBLE_ONLY set, only footprints which are
* "visible" are considered
*/
{
EDA_BaseStruct* PtStruct;
......@@ -803,7 +827,7 @@ TEXTE_MODULE* LocateTexteModule( BOARD* Pcb, MODULE** PtModule, int typeloc )
MODULE* module;
wxPoint ref_pos;
SET_REF_POS( ref_pos );
ref_pos = RefPos( typeloc );
module = *PtModule;
if( module == NULL )
......@@ -831,9 +855,8 @@ TEXTE_MODULE* LocateTexteModule( BOARD* Pcb, MODULE** PtModule, int typeloc )
continue;
}
// hit-test the reference text
pt_txt_mod = module->m_Reference;
/* la souris est-elle dans le rectangle autour du texte*/
if( pt_txt_mod->Locate( ref_pos ) )
{
if( PtModule )
......@@ -841,9 +864,8 @@ TEXTE_MODULE* LocateTexteModule( BOARD* Pcb, MODULE** PtModule, int typeloc )
return pt_txt_mod;
}
// hit-test the value text
pt_txt_mod = module->m_Value;
/* la souris est-elle dans le rectangle autour du texte*/
if( pt_txt_mod->Locate( ref_pos ) )
{
if( PtModule )
......@@ -851,13 +873,14 @@ TEXTE_MODULE* LocateTexteModule( BOARD* Pcb, MODULE** PtModule, int typeloc )
return pt_txt_mod;
}
// hit-test any other texts
PtStruct = module->m_Drawings;
for( ; PtStruct != NULL; PtStruct = PtStruct->Pnext )
{
if( PtStruct->m_StructType != TYPETEXTEMODULE )
continue;
pt_txt_mod = (TEXTE_MODULE*) PtStruct;
/* la souris est-elle dans le rectangle autour du texte*/
if( pt_txt_mod->Locate( ref_pos ) )
{
if( PtModule )
......@@ -1014,9 +1037,7 @@ suite1:
TRACK* Locate_Pistes( TRACK* start_adresse, int MasqueLayer, int typeloc )
{
wxPoint ref_pos;
SET_REF_POS( ref_pos );
wxPoint ref_pos = RefPos( typeloc );
return Locate_Pistes( start_adresse, ref_pos, MasqueLayer );
}
......@@ -1082,9 +1103,7 @@ TRACK* Locate_Pistes( TRACK* start_adresse, const wxPoint& ref_pos, int MasqueLa
TRACK* Locate_Zone( TRACK* start_adresse, int layer, int typeloc )
{
wxPoint ref_pos;
SET_REF_POS( ref_pos );
wxPoint ref_pos = RefPos( typeloc );
return Locate_Zone( start_adresse, ref_pos, layer );
}
......@@ -1125,9 +1144,8 @@ TEXTE_PCB* Locate_Texte_Pcb( EDA_BaseStruct* PtStruct, int LayerSearch, int type
* retour : pointeur sur la description du texte localise
*/
{
wxPoint ref;
wxPoint ref = RefPos( typeloc );
SET_REF_POS( ref );
for( ; PtStruct != NULL; PtStruct = PtStruct->Pnext )
{
if( PtStruct->m_StructType != TYPETEXTE )
......@@ -1167,8 +1185,8 @@ int distance( int seuil )
{
int cXrot, cYrot, /* coord du point (souris) dans le repere tourne */
segX, segY; /* coord extremite segment tj >= 0 */
int pointX, pointY;/* coord point a tester dans repere modifie dans lequel
* segX et segY sont >=0 */
int pointX, pointY; /* coord point a tester dans repere modifie dans lequel
* segX et segY sont >=0 */
segX = dx; segY = dy; pointX = spot_cX; pointY = spot_cY;
......@@ -1264,7 +1282,7 @@ int distance( int seuil )
else /* orientation quelconque */
{
/* On fait un changement d'axe (rotation) de facon a ce que le segment
* de piste soit horizontal dans le nouveau repere */
* de piste soit horizontal dans le nouveau repere */
int angle;
angle = (int) ( atan2( (float) segY, (float) segX ) * 1800 / M_PI);
......@@ -1272,13 +1290,14 @@ int distance( int seuil )
RotatePoint( &cXrot, &cYrot, angle ); /* Rotation du point a tester */
RotatePoint( &segX, &segY, angle ); /* Rotation du segment */
/*la piste est Horizontale , par suite des modifs de coordonnes
* et d'axe, donc segX = longueur du segment */
/* la piste est Horizontale , par suite des modifs de coordonnes
* et d'axe, donc segX = longueur du segment */
if( abs( cYrot ) <= seuil ) /* ok sur axe vertical) */
{
if( (cXrot >= 0) && (cXrot <= segX) )
return 1;
/* Etude des extremites : cercle de rayon seuil */
if( (cXrot < 0) && (cXrot >= -seuil) )
{
......@@ -1347,18 +1366,21 @@ TRACK* Fast_Locate_Piste( TRACK* start_adr, TRACK* end_adr,
if( start_adr == NULL )
return NULL;
for( PtSegm = start_adr; PtSegm != NULL; PtSegm = (TRACK*) PtSegm->Pnext )
{
if( PtSegm->GetState( DELETED | BUSY ) == 0 )
{
if( ref_pos == PtSegm->m_Start )
{ /* Test des couches */
{
/* Test des couches */
if( MaskLayer & PtSegm->ReturnMaskLayer() )
return PtSegm;
}
if( ref_pos == PtSegm->m_End )
{ /* Test des couches */
{
/* Test des couches */
if( MaskLayer & PtSegm->ReturnMaskLayer() )
return PtSegm;
}
......@@ -1392,7 +1414,8 @@ TRACK* Fast_Locate_Via( TRACK* start_adr, TRACK* end_adr,
if( pos == PtSegm->m_Start )
{
if( PtSegm->GetState( BUSY | DELETED ) == 0 )
{ /* Test des couches */
{
/* Test des couches */
if( MaskLayer & PtSegm->ReturnMaskLayer() )
return PtSegm;
}
......@@ -1420,13 +1443,14 @@ EDA_BaseStruct* Locate_MirePcb( EDA_BaseStruct* PtStruct, int LayerSearch,
if( PtStruct == NULL )
return NULL;
SET_REF_POS( ref_pos );
ref_pos = RefPos( typeloc );
for( ; PtStruct != NULL; PtStruct = PtStruct->Pnext )
{
MIREPCB* item;
if( PtStruct->m_StructType != TYPEMIRE )
continue;
item = (MIREPCB*) PtStruct;
if( LayerSearch != -1 && item->m_Layer != LayerSearch )
continue;
......@@ -1434,8 +1458,9 @@ EDA_BaseStruct* Locate_MirePcb( EDA_BaseStruct* PtStruct, int LayerSearch,
dX = ref_pos.x - item->m_Pos.x;
dY = ref_pos.y - item->m_Pos.y;
rayon = item->m_Size / 2;
if( (abs( dX ) <= rayon ) && ( abs( dY ) <= rayon ) )
break;/* Mire Localisee */
break; /* Mire Localisee */
}
return PtStruct;
......
pcbnew/pcbnew.h
View file @ f3cd8f57
/**************************************/
/* PCBNEW.H : dclarations communes */
/**************************************/
/**************************************/
/* PCBNEW.H : d�larations communes */
/**************************************/
#ifndef PCBNEW_H
#define PCBNEW_H
......@@ -11,68 +11,70 @@
#include "pcbstruct.h"
#include "macros.h"
#define U_PCB (PCB_INTERNAL_UNIT/EESCHEMA_INTERNAL_UNIT)
#define U_PCB (PCB_INTERNAL_UNIT / EESCHEMA_INTERNAL_UNIT)
/* valeur de flag indicant si le pointeur de reference pour une localisation
est le curseur sur grille ou le curseur a deplacement fin hors grille */
#define CURSEUR_ON_GRILLE (0<<0)
#define CURSEUR_OFF_GRILLE (1<<0)
* est le curseur sur grille ou le curseur a deplacement fin hors grille */
#define CURSEUR_ON_GRILLE (0 << 0)
#define CURSEUR_OFF_GRILLE (1 << 0)
#define IGNORE_LOCKED (1<<1) ///< if module is locked, do not select for single module operation
#define MATCH_LAYER (1<<2) ///< if module not on current layer, do not select
#define VISIBLE_ONLY (1<<3) ///< if module not on a visible layer, do not select
#define IGNORE_LOCKED (1 << 1) ///< if module is locked, do not select for single module operation
#define MATCH_LAYER (1 << 2) ///< if module not on current layer, do not select
#define VISIBLE_ONLY (1 << 3) ///< if module not on a visible layer, do not select
#define START 0 /* ctes parametre dans les routines de localisation */
#define END 1
#define START 0 /* ctes parametre dans les routines de localisation */
#define END 1
#define DIM_ANCRE_MODULE 3 /* dim du symbole de l'ancre (centre) des modules */
#define DIM_ANCRE_TEXTE 2 /* dim du symbole de l'ancre (centre) des textes */
#define DIM_ANCRE_TEXTE 2 /* dim du symbole de l'ancre (centre) des textes */
/* Gestion du Menu Zoom */
#define ZOOM_PLUS -1
#define ZOOM_PLUS -1
#define ZOOM_MOINS -2
#define ZOOM_AUTO -3
#define ZOOM_AUTO -3
#define ZOOM_CENTER -4
#define ZOOM_REDRAW -5
/* Bits Flags utiliss en dition (membre .m_Flags de EDA_BaseStruct)*/
#define IS_LINKED 1
#define IN_EDIT 2
#define IS_MOVED 4
#define IS_NEW 8
/* Bits Flags utilis� en �ition (membre .m_Flags de EDA_BaseStruct)*/
#define IS_LINKED 1
#define IN_EDIT 2
#define IS_MOVED 4
#define IS_NEW 8
#define IS_RESIZED 0x10
#define IS_DRAGGED 0x20
#define STARTPOINT 0x100
#define ENDPOINT 0x200
#define SELECTED 0x400
#define ENDPOINT 0x200
#define SELECTED 0x400
/* Definition des cas ou l'on force l'affichage en SKETCH (membre .flags) */
#define FORCE_SKETCH (DRAG | EDIT )
/* Constantes pour options lecture fichier PCB */
#define APPEND_PCB 1 /* pour ajout d'un nouveau circuit */
#define NEWPCB 0 /* pour chargement normal */
#define APPEND_PCB 1 /* pour ajout d'un nouveau circuit */
#define NEWPCB 0 /* pour chargement normal */
eda_global wxArrayString g_LibName_List; // library list to load
eda_global wxArrayString g_LibName_List; // library list to load
eda_global wxSize g_GridList[]
eda_global wxSize g_GridList[]
#ifdef MAIN
= {
wxSize(1000,1000), wxSize(500,500), wxSize(250,250), wxSize(200,200),
wxSize(100,100), wxSize(50,50), wxSize(25,25), wxSize(20,20),
wxSize(10,10), wxSize(5,5), wxSize(2,2), wxSize(1,1),
wxSize(-1,-1), wxSize(0,0)
= {
wxSize( 1000, 1000 ), wxSize( 500, 500 ), wxSize( 250, 250 ), wxSize( 200, 200 ),
wxSize( 100, 100 ), wxSize( 50, 50 ), wxSize( 25, 25 ), wxSize( 20, 20 ),
wxSize( 10, 10 ), wxSize( 5, 5 ), wxSize( 2, 2 ), wxSize( 1, 1 ),
wxSize( -1, -1 ), wxSize( 0, 0 )
}
#endif
;
#define UNDELETE_STACK_SIZE 10
eda_global EDA_BaseStruct * g_UnDeleteStack[UNDELETE_STACK_SIZE]; //Liste des elements supprimes
eda_global int g_UnDeleteStackPtr;
eda_global EDA_BaseStruct* g_UnDeleteStack[UNDELETE_STACK_SIZE]; //Liste des elements supprimes
eda_global int g_UnDeleteStackPtr;
eda_global bool g_ShowGrid
eda_global bool g_ShowGrid
#ifdef MAIN
= TRUE
#endif
......@@ -81,29 +83,30 @@ eda_global bool g_ShowGrid
/* Look up Table for conversion one layer number -> one bit layer mask: */
eda_global int g_TabOneLayerMask[LAYER_COUNT]
#if defined MAIN
= { 0x00000001,0x00000002,0x00000004,0x00000008,
0x00000010,0x00000020,0x00000040,0x00000080,
0x00000100,0x00000200,0x00000400,0x00000800,
0x00001000,0x00002000,0x00004000,0x00008000,
0x00010000,0x00020000,0x00040000,0x00080000,
0x00100000,0x00200000,0x00400000,0x00800000,
0x01000000,0x02000000,0x04000000,0x08000000,
0x10000000,0x20000000,0x40000000,0x80000000
}
= {
0x00000001, 0x00000002, 0x00000004, 0x00000008,
0x00000010, 0x00000020, 0x00000040, 0x00000080,
0x00000100, 0x00000200, 0x00000400, 0x00000800,
0x00001000, 0x00002000, 0x00004000, 0x00008000,
0x00010000, 0x00020000, 0x00040000, 0x00080000,
0x00100000, 0x00200000, 0x00400000, 0x00800000,
0x01000000, 0x02000000, 0x04000000, 0x08000000,
0x10000000, 0x20000000, 0x40000000, 0x80000000
}
#endif
;
;
/* Look up Table for conversion copper layer count -> general copper layer mask: */
eda_global int g_TabAllCopperLayerMask[NB_COPPER_LAYERS]
#if defined MAIN
= {
0x0001, 0x8001, 0x8003, 0x8007,
0x800F, 0x801F, 0x803F, 0x807F,
0x80FF, 0x81FF, 0x83FF, 0x87FF,
0x8FFF, 0x9FFF, 0xCFFF, 0xFFFF
= {
0x0001, 0x8001, 0x8003, 0x8007,
0x800F, 0x801F, 0x803F, 0x807F,
0x80FF, 0x81FF, 0x83FF, 0x87FF,
0x8FFF, 0x9FFF, 0xCFFF, 0xFFFF
};
#endif
;
;
/* variables */
......@@ -114,8 +117,8 @@ eda_global bool Drc_On
= TRUE
#endif
;
eda_global bool g_AutoDeleteOldTrack /* autorise effacement automatique
de l'ancienne piste lors des redessins de pistes */
eda_global bool g_AutoDeleteOldTrack /* autorise effacement automatique
* de l'ancienne piste lors des redessins de pistes */
#ifdef MAIN
= TRUE
#endif
......@@ -135,53 +138,53 @@ eda_global bool g_Raccord_45_Auto
#endif
;
eda_global bool g_ShowIsolDuringCreateTrack; /* .State controle l'affichage
de l'isolation en trace de piste */
* de l'isolation en trace de piste */
/**************************************************************/
/* Options d'affichages (remplissages des segments, textes..) */
/**************************************************************/
/**************************************************************/
/* Options d'affichages (remplissages des segments, textes..) */
/**************************************************************/
eda_global DISPLAY_OPTIONS DisplayOpt;
eda_global bool Track_45_Only; /* Flag pour limiter l'inclinaison
pistes a 45 degres seulement */
eda_global bool Segments_45_Only ; /* Flag pour limiter l'inclinaison
edge pcb a 45 degres seulement */
eda_global wxString PcbExtBuffer
eda_global bool Track_45_Only; /* Flag pour limiter l'inclinaison
* pistes a 45 degres seulement */
eda_global bool Segments_45_Only;/* Flag pour limiter l'inclinaison
* edge pcb a 45 degres seulement */
eda_global wxString PcbExtBuffer
#ifdef MAIN
( wxT(".brd"))
( wxT( ".brd" ) )
#endif
;
eda_global wxString g_SaveFileName // File Name for periodic saving
eda_global wxString g_SaveFileName // File Name for periodic saving
#ifdef MAIN
( wxT("$savepcb") )
( wxT( "$savepcb" ) )
#endif
;
eda_global wxString NetNameBuffer;
eda_global wxString NetExtBuffer
#ifdef MAIN
( wxT(".net") )
( wxT( ".net" ) )
#endif
;
eda_global wxString NetCmpExtBuffer
#ifdef MAIN
( wxT(".cmp") )
( wxT( ".cmp" ) )
#endif
;
// Gestion de la liste des librairies
eda_global wxString LibExtBuffer
#ifdef MAIN
( wxT(".mod") )
( wxT( ".mod" ) )
#endif
;
eda_global wxString g_Shapes3DExtBuffer // extension des fichiers de formes 3D
eda_global wxString g_Shapes3DExtBuffer // extension des fichiers de formes 3D
#ifdef MAIN
( wxT(".wrl") )
( wxT( ".wrl" ) )
#endif
;
eda_global int g_NetType; // for cvpcb: Net type identifier
eda_global int g_NetType; // for cvpcb: Net type identifier
eda_global int g_CurrentVersionPCB
#ifdef MAIN
......@@ -189,33 +192,33 @@ eda_global int g_CurrentVersionPCB
#endif
;
#define BUFMEMSIZE 256000 /* taille du buffer de travail (en octets) */
eda_global char *buf_work ; /* pointeur sur le buffer de travail */
eda_global char * adr_lowmem ; /* adresse de base memoire de calcul disponible*/
eda_global char * adr_himem ; /* adresse haute limite de la memoire disponible*/
eda_global char * adr_max ; /* adresse haute maxi utilisee pour la memoire */
#define BUFMEMSIZE 256000 /* taille du buffer de travail (en octets) */
eda_global char* buf_work; /* pointeur sur le buffer de travail */
eda_global char* adr_lowmem; /* adresse de base memoire de calcul disponible*/
eda_global char* adr_himem; /* adresse haute limite de la memoire disponible*/
eda_global char* adr_max; /* adresse haute maxi utilisee pour la memoire */
/* variables gnerales */
eda_global char cbuf[1024] ; /* buffer de formatage texte */
eda_global BOARD * g_ModuleEditor_Pcb; /* Pointeur de l'entete pcb de l'editeur de module*/
eda_global int g_TimeOut; // Duree entre 2 sauvegardes automatiques
eda_global int g_SaveTime; // heure de la prochaine sauvegarde
/* variables g�erales */
eda_global char cbuf[1024]; /* buffer de formatage texte */
eda_global BOARD* g_ModuleEditor_Pcb; /* Pointeur de l'entete pcb de l'editeur de module*/
eda_global int g_TimeOut; // Duree entre 2 sauvegardes automatiques
eda_global int g_SaveTime; // heure de la prochaine sauvegarde
/* Variables generales d'empreintes */
extern int Angle_Rot_Module;
extern int Angle_Rot_Module;
eda_global wxSize ModuleTextSize; /* dim des textes sur Modules par defaut */
eda_global int ModuleTextWidth;
eda_global int ModuleSegmentWidth;
eda_global int Texte_Module_Type;
eda_global int ModuleTextWidth;
eda_global int ModuleSegmentWidth;
eda_global int Texte_Module_Type;
/***********************/
/* pistes , vias , pads*/
/***********************/
/***********************/
/* pistes , vias , pads*/
/***********************/
#define L_MIN_DESSIN 1 /* seuil de largeur des pistes pour trace autre que filaire */
#define L_MIN_DESSIN 1 /* seuil de largeur des pistes pour trace autre que filaire */
// Current designe settings:
eda_global class EDA_BoardDesignSettings g_DesignSettings;
......@@ -223,19 +226,20 @@ eda_global class EDA_BoardDesignSettings g_DesignSettings;
// valeurs par defaut des caract. des pads
#ifndef GERBVIEW
#ifdef MAIN
D_PAD g_Pad_Master( (MODULE *) NULL);
D_PAD g_Pad_Master( (MODULE*) NULL );
#else
extern D_PAD g_Pad_Master;
#endif
#endif
eda_global int Route_Layer_TOP ;
eda_global int Route_Layer_BOTTOM; /* couches de routage actif */
eda_global int Route_Layer_TOP;
eda_global int Route_Layer_BOTTOM; /* couches de routage actif */
eda_global int g_MaxLinksShowed; // determine le nombre max de links affichs
// en routage manuel
eda_global bool g_TwoSegmentTrackBuild // FALSE = 1 segment build, TRUE = 2 45 deg segm build
eda_global int g_MaxLinksShowed; // determine le nombre max de links affich�
// en routage manuel
eda_global bool g_TwoSegmentTrackBuild // FALSE = 1 segment build, TRUE = 2 45 deg segm build
#ifdef MAIN
= TRUE
#endif
......@@ -243,71 +247,74 @@ eda_global bool g_TwoSegmentTrackBuild // FALSE = 1 segment build, TRUE = 2 45 d
/* How to handle magentic pad: feature to move the pcb cursor on a pad center */
enum MagneticPadOptionValues {
no_effect,
capture_cursor_in_track_tool,
capture_always
no_effect,
capture_cursor_in_track_tool,
capture_always
};
eda_global int g_MagneticPadOption
#ifdef MAIN
= capture_cursor_in_track_tool
#endif
;
eda_global bool g_HightLigt_Status;
eda_global int g_HightLigth_NetCode /* pour mise en surbrillance des pistes */
eda_global int g_HightLigth_NetCode /* pour mise en surbrillance des pistes */
#ifdef MAIN
= -1
#endif
; /* net_code du net a mettre en surbrillance */
; /* net_code du net a mettre en surbrillance */
eda_global TRACK * g_CurrentTrackSegment ; // pointeur sur le segment en cours de trace
eda_global TRACK * g_FirstTrackSegment ; // pointeur sur le debut de la piste en cours
eda_global int g_TrackSegmentCount ; // nombre de points deja traces
eda_global TRACK* g_CurrentTrackSegment; // pointeur sur le segment en cours de trace
eda_global TRACK* g_FirstTrackSegment; // pointeur sur le debut de la piste en cours
eda_global int g_TrackSegmentCount; // nombre de points deja traces
eda_global wxString g_ViaType_Name[4]
#if defined MAIN
= {
wxT("???"), // Unused
_("Blind Via"), // from inner layer to external layer (TOP or BOTTOM)
_("Buried Via"), // from inner to inner layer
_("Standard Via") // Usual via (from TOP to BOTTOM layer)
}
= {
wxT( "???" ), // Unused
_( "Blind Via" ), // from inner layer to external layer (TOP or BOTTOM)
_( "Buried Via" ), // from inner to inner layer
_( "Standard Via" ) // Usual via (from TOP to BOTTOM layer)
}
#endif
;
eda_global int g_ViaHoleLastValue; // Last value for non default value via hole
eda_global int g_ViaHoleLastValue; // Last value for non default value via hole
/* Couleur de fond affichage de bas d'ecran */
eda_global int g_PcbGridColor;
/* couleurs des autres items des empreintes */
#if defined MAIN
int g_PadCMPColor = RED;
int g_PadCUColor = GREEN;
int g_AnchorColor = BLUE;
int g_ModuleTextCMPColor = LIGHTGRAY;
int g_ModuleTextCUColor = MAGENTA;
int g_ModuleTextNOVColor = DARKGRAY;
int g_PadCMPColor = RED;
int g_PadCUColor = GREEN;
int g_AnchorColor = BLUE;
int g_ModuleTextCMPColor = LIGHTGRAY;
int g_ModuleTextCUColor = MAGENTA;
int g_ModuleTextNOVColor = DARKGRAY;
#else
eda_global int g_ModuleTextCMPColor;
eda_global int g_ModuleTextCUColor;
eda_global int g_ModuleTextNOVColor;
eda_global int g_AnchorColor;
eda_global int g_PadCUColor;
eda_global int g_PadCMPColor;
eda_global int g_ModuleTextCMPColor;
eda_global int g_ModuleTextCUColor;
eda_global int g_ModuleTextNOVColor;
eda_global int g_AnchorColor;
eda_global int g_PadCUColor;
eda_global int g_PadCMPColor;
#endif
eda_global PCB_SCREEN* ScreenPcb; /* Ecran principal */
eda_global PCB_SCREEN* ScreenModule; /* Ecran de l'editeur de modules */
eda_global PCB_SCREEN* ScreenPcb; /* Ecran principal */
eda_global PCB_SCREEN* ScreenModule; /* Ecran de l'editeur de modules */
/****************************************************/
/* Gestion du deplacement des modules et des pistes */
/****************************************************/
/****************************************************/
/* Gestion du deplacement des modules et des pistes */
/****************************************************/
eda_global wxPoint g_Offset_Module; /* Offset de trace du modul en depl */
eda_global wxPoint g_Offset_Module;/* Offset de trace du modul en depl */
/* Pad editing */
eda_global wxString g_Current_PadName; // Last used pad name (pad num)
eda_global wxString g_Current_PadName; // Last used pad name (pad num)
#endif /* PCBNEW_H */
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