spelling errors, specctra work (eaa147c1) · Commits · Elphel / kicad-source-mirror

change_log.txt

+19 −18

Original line number	Original line	Diff line number	Diff line
	@@ -8,10 +8,11 @@ email address.
	2008-Jan-25 UPDATE Dick Hollenbeck <dick@softplc.com>		2008-Jan-25 UPDATE Dick Hollenbeck <dick@softplc.com>
	================================================================================		================================================================================
	+pcbnew:		+pcbnew:
	SPECCTRA export does padstacks ok, except that oval arcs need to be split		* SPECCTRA export does padstacks ok, except that oval pad's arcs need to be split
	into quarter circle arcs, and no consideration is given to "layer types"		into quarter circle arcs, and no consideration is given to "layer types".
	See page bottom of page 74 of the SECCTRA Design Language Reference, May 2000.		See page bottom of page 74 of the SECCTRA Design Language Reference, May 2000.
	Still working today...		* HISTORY_NUMBER was spelt with a zero.
			* Width was spelt as Widht


	2008-Jan-25 UPDATE Jean-Pierre Charras <jean-pierre.charras@inpg.fr>		2008-Jan-25 UPDATE Jean-Pierre Charras <jean-pierre.charras@inpg.fr>

include/pcbstruct.h

+13 −13

Original line number	Original line	Diff line number	Diff line
	@@ -144,7 +144,7 @@ struct CHEVELU;
	#include "class_board.h"		#include "class_board.h"

	// Class for handle current printed board design settings		// Class for handle current printed board design settings
	#define HIST0RY_NUMBER 8		#define HISTORY_NUMBER 8
	class EDA_BoardDesignSettings		class EDA_BoardDesignSettings
	{		{
	public:		public:
	@@ -154,10 +154,10 @@ public:
	int m_CurrentViaSize; // Current via size		int m_CurrentViaSize; // Current via size
	int m_CurrentMicroViaSize; // Current micro via size		int m_CurrentMicroViaSize; // Current micro via size
	bool m_MicroViasAllowed; // true to allow micro vias		bool m_MicroViasAllowed; // true to allow micro vias
	int m_ViaSizeHistory[HIST0RY_NUMBER]; // Last HIST0RY_NUMBER used via sizes		int m_ViaSizeHistory[HISTORY_NUMBER]; // Last HISTORY_NUMBER used via sizes
	int m_CurrentViaType; // via type (BLIND, TROUGHT ...), bits 1 and 2 (not 0 and 1)		int m_CurrentViaType; // via type (BLIND, TROUGHT ...), bits 1 and 2 (not 0 and 1)
	int m_CurrentTrackWidth; // current track width		int m_CurrentTrackWidth; // current track width
	int m_TrackWidhtHistory[HIST0RY_NUMBER]; // Last HIST0RY_NUMBER used track widths		int m_TrackWidthHistory[HISTORY_NUMBER]; // Last HISTORY_NUMBER used track widths
	int m_DrawSegmentWidth; // current graphic line width (not EDGE layer)		int m_DrawSegmentWidth; // current graphic line width (not EDGE layer)
	int m_EdgeSegmentWidth; // current graphic line width (EDGE layer only)		int m_EdgeSegmentWidth; // current graphic line width (EDGE layer only)
	int m_PcbTextWidth; // current Pcb (not module) Text width		int m_PcbTextWidth; // current Pcb (not module) Text width

pcbnew/classpcb.cpp

+5 −4

Original line number	Original line	Diff line number	Diff line
	@@ -127,7 +127,8 @@ EDA_BoardDesignSettings::EDA_BoardDesignSettings()
	// Default values for designing boards		// Default values for designing boards
	{		{
	int ii;		int ii;
	int default_layer_color[32] = {
			static const int default_layer_color[32] = {
	GREEN, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,		GREEN, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
	LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,		LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
	LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,		LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
	@@ -150,10 +151,10 @@ EDA_BoardDesignSettings::EDA_BoardDesignSettings()
	m_CurrentViaSize = 450; // Current via size		m_CurrentViaSize = 450; // Current via size
	m_CurrentViaType = VIA_THROUGH; /* via type (BLIND, TROUGHT ...), bits 1 and 2 (not 0 and 1)*/		m_CurrentViaType = VIA_THROUGH; /* via type (BLIND, TROUGHT ...), bits 1 and 2 (not 0 and 1)*/
	m_CurrentTrackWidth = 170; // current track width		m_CurrentTrackWidth = 170; // current track width
	for( ii = 0; ii < HIST0RY_NUMBER; ii++ )		for( ii = 0; ii < HISTORY_NUMBER; ii++ )
	{		{
	m_TrackWidhtHistory[ii] = 0; // Last HIST0RY_NUMBER used track widths		m_TrackWidthHistory[ii] = 0; // Last HISTORY_NUMBER used track widths
	m_ViaSizeHistory[ii] = 0; // Last HIST0RY_NUMBER used via sizes		m_ViaSizeHistory[ii] = 0; // Last HISTORY_NUMBER used via sizes
	}		}

	m_DrawSegmentWidth = 100; // current graphic line width (not EDGE layer)		m_DrawSegmentWidth = 100; // current graphic line width (not EDGE layer)

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