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Commit b1d1a711 authored by charras's avatar charras
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Finished code cleaning about ratsnets calculations and handling. 

Minor others changes.
parent 8f36c1fc
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Showing with 5564 additions and 4787 deletions
3d-viewer/3d_canvas.cpp
View file @ b1d1a711
...@@ -78,7 +78,7 @@ Pcb3D_GLCanvas::~Pcb3D_GLCanvas() ...@@ -78,7 +78,7 @@ Pcb3D_GLCanvas::~Pcb3D_GLCanvas()
/*************************************/ /*************************************/
{ {
ClearLists(); ClearLists();
m_init = FALSE; m_init = FALSE;
} }
...@@ -224,7 +224,7 @@ void Pcb3D_GLCanvas::OnMouseEvent( wxMouseEvent& event ) ...@@ -224,7 +224,7 @@ void Pcb3D_GLCanvas::OnMouseEvent( wxMouseEvent& event )
/********************************************************/ /********************************************************/
{ {
wxSize size( GetClientSize() ); wxSize size( GetClientSize() );
double spin_quat[4]; double spin_quat[4];
if( event.RightDown() ) if( event.RightDown() )
...@@ -474,6 +474,7 @@ void Pcb3D_GLCanvas::OnPaint( wxPaintEvent& event ) ...@@ -474,6 +474,7 @@ void Pcb3D_GLCanvas::OnPaint( wxPaintEvent& event )
/*************************************************/ /*************************************************/
{ {
wxPaintDC dc( this ); wxPaintDC dc( this );
// Set the OpenGL viewport according to the client size of this canvas. // Set the OpenGL viewport according to the client size of this canvas.
// This is done here rather than in a wxSizeEvent handler because our // This is done here rather than in a wxSizeEvent handler because our
// OpenGL rendering context (and thus viewport setting) is used with // OpenGL rendering context (and thus viewport setting) is used with
...@@ -482,13 +483,12 @@ void Pcb3D_GLCanvas::OnPaint( wxPaintEvent& event ) ...@@ -482,13 +483,12 @@ void Pcb3D_GLCanvas::OnPaint( wxPaintEvent& event )
// is wrong when next another canvas is repainted. // is wrong when next another canvas is repainted.
const wxSize ClientSize = GetClientSize(); const wxSize ClientSize = GetClientSize();
glViewport(0, 0, ClientSize.x, ClientSize.y); glViewport( 0, 0, ClientSize.x, ClientSize.y );
Redraw(); Redraw();
event.Skip(); event.Skip();
} }
/***********************************************************/ /***********************************************************/
void Pcb3D_GLCanvas::OnEraseBackground( wxEraseEvent& event ) void Pcb3D_GLCanvas::OnEraseBackground( wxEraseEvent& event )
/***********************************************************/ /***********************************************************/
...@@ -518,7 +518,7 @@ void Pcb3D_GLCanvas::InitGL() ...@@ -518,7 +518,7 @@ void Pcb3D_GLCanvas::InitGL()
glMatrixMode( GL_PROJECTION ); glMatrixMode( GL_PROJECTION );
glLoadIdentity(); glLoadIdentity();
#define MAX_VIEW_ANGLE 160.0 / 45.0 #define MAX_VIEW_ANGLE 160.0 / 45.0
if( g_Parm_3D_Visu.m_Zoom > MAX_VIEW_ANGLE ) if( g_Parm_3D_Visu.m_Zoom > MAX_VIEW_ANGLE )
g_Parm_3D_Visu.m_Zoom = MAX_VIEW_ANGLE; g_Parm_3D_Visu.m_Zoom = MAX_VIEW_ANGLE;
gluPerspective( 45.0 * g_Parm_3D_Visu.m_Zoom, ratio_HV, 1, 10 ); gluPerspective( 45.0 * g_Parm_3D_Visu.m_Zoom, ratio_HV, 1, 10 );
...@@ -599,9 +599,9 @@ void Pcb3D_GLCanvas::TakeScreenshot( wxCommandEvent& event ) ...@@ -599,9 +599,9 @@ void Pcb3D_GLCanvas::TakeScreenshot( wxCommandEvent& event )
*/ */
{ {
wxFileName fn( m_Parent->m_Parent->GetScreen()->m_FileName ); wxFileName fn( m_Parent->m_Parent->GetScreen()->m_FileName );
wxString FullFileName; wxString FullFileName;
wxString file_ext, mask; wxString file_ext, mask;
bool fmt_is_jpeg = FALSE; bool fmt_is_jpeg = FALSE;
if( event.GetId() == ID_MENU_SCREENCOPY_JPEG ) if( event.GetId() == ID_MENU_SCREENCOPY_JPEG )
fmt_is_jpeg = TRUE; fmt_is_jpeg = TRUE;
...@@ -627,13 +627,26 @@ void Pcb3D_GLCanvas::TakeScreenshot( wxCommandEvent& event ) ...@@ -627,13 +627,26 @@ void Pcb3D_GLCanvas::TakeScreenshot( wxCommandEvent& event )
} }
Redraw( true ); Redraw( true );
wxSize image_size = GetClientSize();
wxClientDC dc( this ); struct vieport_params
wxBitmap bitmap( image_size.x, image_size.y ); {
wxMemoryDC memdc; GLint originx;
memdc.SelectObject( bitmap ); GLint originy;
memdc.Blit( 0, 0, image_size.x, image_size.y, &dc, 0, 0 ); GLint x;
memdc.SelectObject( wxNullBitmap ); GLint y;
} viewport;
glGetIntegerv( GL_VIEWPORT, (GLint*) &viewport );
unsigned char* pixelbuffer = (unsigned char*) malloc( 3 * viewport.x * viewport.y );
glReadPixels( 0, 0, viewport.x, viewport.y, GL_RGB, GL_UNSIGNED_BYTE, pixelbuffer );
wxImage image( viewport.x, viewport.y );
image.SetData( pixelbuffer );
image = image.Mirror();
image = image.Rotate90().Rotate90();
wxBitmap bitmap( image, -1 );
if( event.GetId() == ID_TOOL_SCREENCOPY_TOCLIBBOARD ) if( event.GetId() == ID_TOOL_SCREENCOPY_TOCLIBBOARD )
{ {
...@@ -650,8 +663,6 @@ void Pcb3D_GLCanvas::TakeScreenshot( wxCommandEvent& event ) ...@@ -650,8 +663,6 @@ void Pcb3D_GLCanvas::TakeScreenshot( wxCommandEvent& event )
} }
else else
{ {
wxImage image = bitmap.ConvertToImage();
if( !image.SaveFile( FullFileName, if( !image.SaveFile( FullFileName,
fmt_is_jpeg ? wxBITMAP_TYPE_JPEG : wxBITMAP_TYPE_PNG ) ) fmt_is_jpeg ? wxBITMAP_TYPE_JPEG : wxBITMAP_TYPE_PNG ) )
wxLogError( wxT( "Can't save file" ) ); wxLogError( wxT( "Can't save file" ) );
......
3d-viewer/3d_draw.cpp
View file @ b1d1a711
////////////////////////////////////// //////////////////////////////////////
// Name: 3d_draw.cpp // Name: 3d_draw.cpp
////////////////////////////////////// //////////////////////////////////////
#ifdef __GNUG__
#pragma implementation
#pragma interface
#endif
#include "fctsys.h" #include "fctsys.h"
#include "common.h"
#include "trigo.h" #include "trigo.h"
#if !wxUSE_GLCANVAS
#error Please set wxUSE_GLCANVAS to 1 in setup.h.
#endif
#include "pcbstruct.h" #include "pcbstruct.h"
#include "macros.h" #include "macros.h"
#include "drawtxt.h" #include "drawtxt.h"
...@@ -27,6 +15,11 @@ ...@@ -27,6 +15,11 @@
#include "3d_struct.h" #include "3d_struct.h"
#if !wxUSE_GLCANVAS
#error Please set wxUSE_GLCANVAS to 1 in setup.h.
#endif
static void Draw3D_FilledCircle( double posx, double posy, static void Draw3D_FilledCircle( double posx, double posy,
double rayon, double hole_rayon, double zpos ); double rayon, double hole_rayon, double zpos );
static void Draw3D_FilledSegment( double startx, double starty, static void Draw3D_FilledSegment( double startx, double starty,
...@@ -108,7 +101,7 @@ GLuint Pcb3D_GLCanvas::CreateDrawGL_List() ...@@ -108,7 +101,7 @@ GLuint Pcb3D_GLCanvas::CreateDrawGL_List()
g_Parm_3D_Visu.m_BoardPos = pcb->m_BoundaryBox.Centre(); g_Parm_3D_Visu.m_BoardPos = pcb->m_BoundaryBox.Centre();
g_Parm_3D_Visu.m_BoardPos.y = -g_Parm_3D_Visu.m_BoardPos.y; g_Parm_3D_Visu.m_BoardPos.y = -g_Parm_3D_Visu.m_BoardPos.y;
g_Parm_3D_Visu.m_Layers = pcb->m_BoardSettings->m_CopperLayerCount; g_Parm_3D_Visu.m_Layers = pcb->m_BoardSettings->m_CopperLayerCount;
// Ensure the board has 2 sides for 3D views, because it is hard to find a *really* single side board in the true life... // Ensure the board has 2 sides for 3D views, because it is hard to find a *really* single side board in the true life...
if ( g_Parm_3D_Visu.m_Layers < 2 ) if ( g_Parm_3D_Visu.m_Layers < 2 )
g_Parm_3D_Visu.m_Layers = 2; g_Parm_3D_Visu.m_Layers = 2;
...@@ -489,7 +482,31 @@ void Pcb3D_GLCanvas::Draw3D_DrawText( TEXTE_PCB* text ) ...@@ -489,7 +482,31 @@ void Pcb3D_GLCanvas::Draw3D_DrawText( TEXTE_PCB* text )
s_Text3DZPos = g_Parm_3D_Visu.m_LayerZcoord[layer]; s_Text3DZPos = g_Parm_3D_Visu.m_LayerZcoord[layer];
s_Text3DWidth = text->m_Width * g_Parm_3D_Visu.m_BoardScale; s_Text3DWidth = text->m_Width * g_Parm_3D_Visu.m_BoardScale;
glNormal3f( 0.0, 0.0, Get3DLayerSide( layer ) ); glNormal3f( 0.0, 0.0, Get3DLayerSide( layer ) );
DrawGraphicText( NULL, NULL, text->m_Pos, (EDA_Colors) color, if( text->m_MultilineAllowed )
{
wxPoint pos = text->m_Pos;
wxArrayString* list = wxStringSplit( text->m_Text, '\n' );
wxPoint offset;
offset.y = text->GetInterline();
RotatePoint( &offset, text->m_Orient );
for( unsigned i = 0; i<list->Count(); i++ )
{
wxString txt = list->Item( i );
DrawGraphicText( NULL, NULL, pos, (EDA_Colors) color,
txt, text->m_Orient, text->m_Size,
text->m_HJustify, text->m_VJustify,
text->m_Width, text->m_Italic,
true,
Draw3dTextSegm );
pos += offset;
}
delete (list);
}
else
DrawGraphicText( NULL, NULL, text->m_Pos, (EDA_Colors) color,
text->m_Text, text->m_Orient, text->m_Size, text->m_Text, text->m_Orient, text->m_Size,
text->m_HJustify, text->m_VJustify, text->m_HJustify, text->m_VJustify,
text->m_Width, text->m_Italic, text->m_Width, text->m_Italic,
......
3d-viewer/3d_toolbar.cpp
View file @ b1d1a711
...@@ -31,7 +31,7 @@ void WinEDA3D_DrawFrame::ReCreateHToolbar() ...@@ -31,7 +31,7 @@ void WinEDA3D_DrawFrame::ReCreateHToolbar()
m_HToolBar->AddTool( ID_RELOAD3D_BOARD, wxEmptyString, m_HToolBar->AddTool( ID_RELOAD3D_BOARD, wxEmptyString,
wxBitmap( import3d_xpm ), wxBitmap( import3d_xpm ),
_( "Reload board" ) ); _( "Reload board" ) );
#ifdef __WINDOWS__ // do not work properly under linux #if (defined(__WINDOWS__) || defined(__APPLE__)) // do not work properly under linux
m_HToolBar-> AddSeparator(); m_HToolBar-> AddSeparator();
m_HToolBar->AddTool( ID_TOOL_SCREENCOPY_TOCLIBBOARD, wxEmptyString, m_HToolBar->AddTool( ID_TOOL_SCREENCOPY_TOCLIBBOARD, wxEmptyString,
......
CHANGELOG.txt
View file @ b1d1a711
...@@ -4,6 +4,14 @@ KiCad ChangeLog 2009 ...@@ -4,6 +4,14 @@ KiCad ChangeLog 2009
Please add newer entries at the top, list the date and your name with Please add newer entries at the top, list the date and your name with
email address. email address.
2009-may-28 UPDATE Jean-Pierre Charras <jean-pierre.charras@gipsa-lab.inpg.fr>
================================================================================
++Pcbnew:
Finished code cleaning about ratsnets calculations and handling
Obscure code removed ( I hope)
Better names for some members of BOARD class.
2009-may-24 UPDATE Jean-Pierre Charras <jean-pierre.charras@gipsa-lab.inpg.fr> 2009-may-24 UPDATE Jean-Pierre Charras <jean-pierre.charras@gipsa-lab.inpg.fr>
================================================================================ ================================================================================
++Pcbnew: ++Pcbnew:
......
common/about_kicad.cpp
View file @ b1d1a711
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
#include "appl_wxstruct.h" #include "appl_wxstruct.h"
#define BUILD_VERSION wxT("(20090513-unstable)") #define BUILD_VERSION wxT("(20090525-unstable)")
wxString g_BuildVersion wxString g_BuildVersion
......
eeschema/plugins/netlist_form_pads-pcb.cpp
View file @ b1d1a711
...@@ -25,7 +25,7 @@ ...@@ -25,7 +25,7 @@
* C4 CHIP_B * C4 CHIP_B
* D1 CHIP_B * D1 CHIP_B
* JP1 unknown * JP1 unknown
* *
*NET* *NET*
*SIGNAL* N03791 *SIGNAL* N03791
* C3.1 R1.1 JP2.7 U1.3 * C3.1 R1.1 JP2.7 U1.3
...@@ -42,7 +42,7 @@ ...@@ -42,7 +42,7 @@
/* Generic netlist sample: /* Generic netlist sample:
* $BeginNetlist * $BeginNetlist
* $BeginComponentList * $BeginComponentList
* *
* $BeginComponent * $BeginComponent
* TimeStamp=32568D1E * TimeStamp=32568D1E
* Footprint= * Footprint=
...@@ -68,7 +68,7 @@ ...@@ -68,7 +68,7 @@
* 16=REF5_1 * 16=REF5_1
* $EndPinList * $EndPinList
* $EndComponent * $EndComponent
* *
* $BeginComponent * $BeginComponent
* TimeStamp=325679C1 * TimeStamp=325679C1
* Footprint= * Footprint=
...@@ -89,7 +89,7 @@ ...@@ -89,7 +89,7 @@
* $EndPinList * $EndPinList
* $EndComponent * $EndComponent
* $EndComponentList * $EndComponentList
* *
* $BeginNets * $BeginNets
* Net 0 "" * Net 0 ""
* Net 1 "GND" * Net 1 "GND"
...@@ -102,7 +102,7 @@ ...@@ -102,7 +102,7 @@
* Net 173 "" * Net 173 ""
* BUS1 30 * BUS1 30
* $EndNets * $EndNets
* *
* $EndNetlist * $EndNetlist
*/ */
......
gerbview/initpcb.cpp
View file @ b1d1a711
...@@ -60,8 +60,6 @@ bool WinEDA_GerberFrame::Clear_Pcb( bool query ) ...@@ -60,8 +60,6 @@ bool WinEDA_GerberFrame::Clear_Pcb( bool query )
GetBoard()->m_BoundaryBox.SetOrigin( 0, 0 ); GetBoard()->m_BoundaryBox.SetOrigin( 0, 0 );
GetBoard()->m_BoundaryBox.SetSize( 0, 0 ); GetBoard()->m_BoundaryBox.SetSize( 0, 0 );
GetBoard()->m_Status_Pcb = 0; GetBoard()->m_Status_Pcb = 0;
GetBoard()->m_NbLoclinks = 0;
GetBoard()->m_NbLinks = 0;
GetBoard()->m_NbNodes = 0; GetBoard()->m_NbNodes = 0;
GetBoard()->m_NbNoconnect = 0; GetBoard()->m_NbNoconnect = 0;
......
include/wxPcbStruct.h
View file @ b1d1a711
...@@ -281,7 +281,7 @@ public: ...@@ -281,7 +281,7 @@ public:
void Compile_Ratsnest( wxDC* DC, bool affiche ); /* Recalcul complet du chevelu */ void Compile_Ratsnest( wxDC* DC, bool affiche ); /* Recalcul complet du chevelu */
void ReCompile_Ratsnest_After_Changes( wxDC* DC ); void ReCompile_Ratsnest_After_Changes( wxDC* DC );
int Test_1_Net_Ratsnest( wxDC* DC, int net_code ); int Test_1_Net_Ratsnest( wxDC* DC, int net_code );
char* build_ratsnest_module( wxDC* DC, MODULE* Module ); void build_ratsnest_module( wxDC* DC, MODULE* Module );
void trace_ratsnest_module( wxDC* DC ); void trace_ratsnest_module( wxDC* DC );
void Build_Board_Ratsnest( wxDC* DC ); void Build_Board_Ratsnest( wxDC* DC );
void DrawGeneralRatsnest( wxDC* DC, int net_code = 0 ); void DrawGeneralRatsnest( wxDC* DC, int net_code = 0 );
...@@ -521,7 +521,14 @@ public: ...@@ -521,7 +521,14 @@ public:
/* Fonctions specifiques */ /* Fonctions specifiques */
MODULE* ListAndSelectModuleName(); MODULE* ListAndSelectModuleName();
void Liste_Equipot( wxCommandEvent& event );
/** Function ListNetsAndSelect
* called by a command event
* displays the sorted list of nets in a dialog frame
* If a net is selected, it is hightlighted
*/
void ListNetsAndSelect( wxCommandEvent& event );
void Swap_Layers( wxCommandEvent& event ); void Swap_Layers( wxCommandEvent& event );
void Install_Test_DRC_Frame( wxDC* DC ); void Install_Test_DRC_Frame( wxDC* DC );
......
internat/fr/kicad.mo
View file @ b1d1a711
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internat/fr/kicad.po
View file @ b1d1a711
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pcbnew/ar_protos.h
View file @ b1d1a711
...@@ -69,7 +69,7 @@ int CalcDist( int, int, int ,int ); ...@@ -69,7 +69,7 @@ int CalcDist( int, int, int ,int );
/* BOARD.CPP */ /* BOARD.CPP */
bool ComputeMatriceSize(WinEDA_BasePcbFrame * frame, int pas_route); bool ComputeMatriceSize(WinEDA_BasePcbFrame * frame, int pas_route);
int Build_Work(BOARD * Pcb, RATSNEST_ITEM* pt_chevelus); int Build_Work(BOARD * Pcb);
void PlaceCells(BOARD * Pcb, int net_code, int flag = 0); void PlaceCells(BOARD * Pcb, int net_code, int flag = 0);
BoardCell GetCell( int, int, int ); BoardCell GetCell( int, int, int );
......
pcbnew/autoplac.cpp
View file @ b1d1a711
...@@ -61,10 +61,6 @@ static void TracePenaliteRectangle( BOARD* Pcb, int ux0, int uy0, int ux1, i ...@@ -61,10 +61,6 @@ static void TracePenaliteRectangle( BOARD* Pcb, int ux0, int uy0, int ux1, i
int marge, int Penalite, int masque_layer ); int marge, int Penalite, int masque_layer );
static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC ); static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC );
/* variables importees */
extern RATSNEST_ITEM* local_liste_chevelu; // adresse de base du buffer des chevelus locaux
extern int nb_local_chevelu; // nbr de links du module en deplacement
/********************************************************************************/ /********************************************************************************/
void WinEDA_PcbFrame::AutoPlaceModule( MODULE* Module, int place_mode, wxDC* DC ) void WinEDA_PcbFrame::AutoPlaceModule( MODULE* Module, int place_mode, wxDC* DC )
...@@ -866,22 +862,18 @@ float WinEDA_PcbFrame::Compute_Ratsnest_PlaceModule( wxDC* DC ) ...@@ -866,22 +862,18 @@ float WinEDA_PcbFrame::Compute_Ratsnest_PlaceModule( wxDC* DC )
* penalite pour les inclinaisons se rapprochant de 45 degre * penalite pour les inclinaisons se rapprochant de 45 degre
*/ */
{ {
RATSNEST_ITEM* pt_local_chevelu; double cout, icout;
int ii;
float cout, icout;
int ox, oy; int ox, oy;
int fx, fy; int fx, fy;
int dx, dy; int dx, dy;
if( (GetBoard()->m_Status_Pcb & RATSNEST_ITEM_LOCAL_OK) == 0 ) if( (GetBoard()->m_Status_Pcb & RATSNEST_ITEM_LOCAL_OK) == 0 )
return -1; return -1;
pt_local_chevelu = local_liste_chevelu;
ii = nb_local_chevelu;
cout = 0; cout = 0;
while( ii-- > 0 ) for( unsigned ii = 0; ii < GetBoard()->m_LocalRatsnest.size(); ii++ )
{ {
RATSNEST_ITEM* pt_local_chevelu = &GetBoard()->m_LocalRatsnest[ii];
if( !(pt_local_chevelu->m_Status & LOCAL_RATSNEST_ITEM) ) if( !(pt_local_chevelu->m_Status & LOCAL_RATSNEST_ITEM) )
{ {
ox = pt_local_chevelu->m_PadStart->GetPosition().x - g_Offset_Module.x; ox = pt_local_chevelu->m_PadStart->GetPosition().x - g_Offset_Module.x;
...@@ -913,11 +905,9 @@ float WinEDA_PcbFrame::Compute_Ratsnest_PlaceModule( wxDC* DC ) ...@@ -913,11 +905,9 @@ float WinEDA_PcbFrame::Compute_Ratsnest_PlaceModule( wxDC* DC )
icout = sqrt( icout ); icout = sqrt( icout );
cout += icout; /* cout total = somme des couts de chaque chevelu */ cout += icout; /* cout total = somme des couts de chaque chevelu */
} }
pt_local_chevelu++;
} }
return cout; return (float)cout;
} }
...@@ -1102,8 +1092,7 @@ static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC ) ...@@ -1102,8 +1092,7 @@ static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC )
{ {
MODULE** BaseListeModules, ** pt_Dmod; MODULE** BaseListeModules, ** pt_Dmod;
MODULE* Module = NULL, * AltModule = NULL; MODULE* Module = NULL, * AltModule = NULL;
RATSNEST_ITEM* pt_local_chevelu; int NbModules;
int NbModules, ii;
BaseListeModules = GenListeModules( pcbframe->GetBoard(), &NbModules ); BaseListeModules = GenListeModules( pcbframe->GetBoard(), &NbModules );
if( BaseListeModules == NULL ) if( BaseListeModules == NULL )
...@@ -1127,13 +1116,10 @@ static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC ) ...@@ -1127,13 +1116,10 @@ static MODULE* PickModule( WinEDA_PcbFrame* pcbframe, wxDC* DC )
pcbframe->build_ratsnest_module( DC, *pt_Dmod ); pcbframe->build_ratsnest_module( DC, *pt_Dmod );
/* calcul du nombre de chevelus externes */ /* calcul du nombre de chevelus externes */
pt_local_chevelu = local_liste_chevelu; for( unsigned ii = 0; ii < pcbframe->GetBoard()->m_LocalRatsnest.size(); ii++ )
ii = nb_local_chevelu;
while( ii-- > 0 )
{ {
if( (pt_local_chevelu->m_Status & LOCAL_RATSNEST_ITEM) == 0 ) if( (pcbframe->GetBoard()->m_LocalRatsnest[ii].m_Status & LOCAL_RATSNEST_ITEM) == 0 )
(*pt_Dmod)->flag++; (*pt_Dmod)->flag++;
pt_local_chevelu++;
} }
} }
......
pcbnew/autorout.cpp
View file @ b1d1a711
...@@ -33,8 +33,7 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode ) ...@@ -33,8 +33,7 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode )
/********************************************************/ /********************************************************/
/* init board, route traces*/ /* init board, route traces*/
{ {
int ii, start, stop; int start, stop;
RATSNEST_ITEM* ptmp;
MODULE* Module = NULL; MODULE* Module = NULL;
D_PAD* Pad = NULL; D_PAD* Pad = NULL;
int autoroute_net_code = -1; int autoroute_net_code = -1;
...@@ -94,9 +93,9 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode ) ...@@ -94,9 +93,9 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode )
Compile_Ratsnest( DC, TRUE ); Compile_Ratsnest( DC, TRUE );
/* Placement du flag CH_ROUTE_REQ sur les chevelus demandes */ /* Placement du flag CH_ROUTE_REQ sur les chevelus demandes */
ptmp = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest; for( unsigned ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; ii--, ptmp++ )
{ {
RATSNEST_ITEM* ptmp = &GetBoard()->m_FullRatsnest[ii];
ptmp->m_Status &= ~CH_ROUTE_REQ; ptmp->m_Status &= ~CH_ROUTE_REQ;
switch( mode ) switch( mode )
...@@ -130,8 +129,6 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode ) ...@@ -130,8 +129,6 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode )
} }
} }
ptmp = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
start = time( NULL ); start = time( NULL );
/* Calcul du pas de routage fixe a 5 mils et plus */ /* Calcul du pas de routage fixe a 5 mils et plus */
...@@ -162,7 +159,7 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode ) ...@@ -162,7 +159,7 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode )
PlaceCells( GetBoard(), -1, FORCE_PADS ); PlaceCells( GetBoard(), -1, FORCE_PADS );
/* Construction de la liste des pistes a router */ /* Construction de la liste des pistes a router */
Build_Work( GetBoard(), ptmp ); Build_Work( GetBoard() );
// DisplayBoard(DrawPanel, DC); // DisplayBoard(DrawPanel, DC);
...@@ -190,19 +187,12 @@ void WinEDA_PcbFrame::Reset_Noroutable( wxDC* DC ) ...@@ -190,19 +187,12 @@ void WinEDA_PcbFrame::Reset_Noroutable( wxDC* DC )
* Si ce flag est a 1 il n'est pas reroute * Si ce flag est a 1 il n'est pas reroute
*/ */
{ {
int ii;
RATSNEST_ITEM* pt_rats;
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK )== 0 ) if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK )== 0 )
Compile_Ratsnest( DC, TRUE ); Compile_Ratsnest( DC, TRUE );
pt_rats = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest; for( unsigned ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
if( pt_rats == NULL )
return;
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; ii--, pt_rats++ )
{ {
pt_rats->m_Status &= ~CH_UNROUTABLE; GetBoard()->m_FullRatsnest[ii].m_Status &= ~CH_UNROUTABLE;
} }
} }
......
pcbnew/board.cpp
View file @ b1d1a711
...@@ -14,7 +14,7 @@ ...@@ -14,7 +14,7 @@
/* routines externes : */ /* routines externes : */
/* Routines definies ici: */ /* Routines definies ici: */
int Build_Work( BOARD* Pcb, RATSNEST_ITEM* pt_base_chevelu ); int Build_Work( BOARD* Pcb );
void PlaceCells( BOARD* Pcb, int net_code, int flag ); void PlaceCells( BOARD* Pcb, int net_code, int flag );
int InitBoard(); int InitBoard();
BoardCell GetCell( int, int, int ); BoardCell GetCell( int, int, int );
...@@ -336,12 +336,11 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag ) ...@@ -336,12 +336,11 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
/******************************************************/ /******************************************************/
int Build_Work( BOARD* Pcb, RATSNEST_ITEM* pt_base_chevelu ) int Build_Work( BOARD* Pcb )
/*****************************************************/ /*****************************************************/
/* Build liste conn */ /* Build liste conn */
{ {
int ii; RATSNEST_ITEM* pt_rats;
RATSNEST_ITEM* pt_rats = pt_base_chevelu;
D_PAD* pt_pad; D_PAD* pt_pad;
int r1, r2, c1, c2, current_net_code; int r1, r2, c1, c2, current_net_code;
RATSNEST_ITEM* pt_ch; RATSNEST_ITEM* pt_ch;
...@@ -350,8 +349,9 @@ int Build_Work( BOARD* Pcb, RATSNEST_ITEM* pt_base_chevelu ) ...@@ -350,8 +349,9 @@ int Build_Work( BOARD* Pcb, RATSNEST_ITEM* pt_base_chevelu )
InitWork(); /* clear work list */ InitWork(); /* clear work list */
Ntotal = 0; Ntotal = 0;
for( ii = Pcb->GetNumRatsnests(); ii > 0; ii--, pt_rats++ ) for( unsigned ii = 0;Pcb->GetRatsnestsCount(); ii++ )
{ {
pt_rats = &Pcb->m_FullRatsnest[ii];
/* On ne route que les chevelus actifs et routables */ /* On ne route que les chevelus actifs et routables */
if( (pt_rats->m_Status & CH_ACTIF) == 0 ) if( (pt_rats->m_Status & CH_ACTIF) == 0 )
continue; continue;
......
pcbnew/class_board.cpp
View file @ b1d1a711
...@@ -8,9 +8,9 @@ ...@@ -8,9 +8,9 @@
/* This is an odd place for this, but cvpcb won't link if it is /* This is an odd place for this, but cvpcb won't link if it is
in class_board_item.cpp like I first tried it. * in class_board_item.cpp like I first tried it.
*/ */
wxPoint BOARD_ITEM::ZeroOffset(0,0); wxPoint BOARD_ITEM::ZeroOffset( 0, 0 );
/*****************/ /*****************/
...@@ -19,24 +19,19 @@ wxPoint BOARD_ITEM::ZeroOffset(0,0); ...@@ -19,24 +19,19 @@ wxPoint BOARD_ITEM::ZeroOffset(0,0);
/* Constructor */ /* Constructor */
BOARD::BOARD( EDA_BaseStruct* parent, WinEDA_BasePcbFrame* frame ) : BOARD::BOARD( EDA_BaseStruct* parent, WinEDA_BasePcbFrame* frame ) :
BOARD_ITEM( (BOARD_ITEM*) parent, TYPE_PCB ) BOARD_ITEM( (BOARD_ITEM*)parent, TYPE_PCB )
{ {
m_PcbFrame = frame; m_PcbFrame = frame;
m_Status_Pcb = 0; // Mot d'etat: Bit 1 = Chevelu calcule m_Status_Pcb = 0; // Mot d'etat: Bit 1 = Chevelu calcule
m_BoardSettings = &g_DesignSettings; m_BoardSettings = &g_DesignSettings;
m_NbNodes = 0; // nombre de pads connectes m_NbNodes = 0; // nombre de pads connectes
m_NbLinks = 0; // nombre de chevelus (donc aussi nombre m_NbNoconnect = 0; // nombre de chevelus actifs
// minimal de pistes a tracer
m_NbNoconnect = 0; // nombre de chevelus actifs
m_NbLoclinks = 0; // nb ratsnest local
m_Ratsnest = NULL; // pointeur liste rats m_CurrentZoneContour = NULL; // This ZONE_CONTAINER handle the zone contour cuurently in progress
m_LocalRatsnest = NULL; // pointeur liste rats local m_NetInfo = new NETINFO_LIST( this ); // handle nets info list (name, design constraints ..
m_CurrentZoneContour = NULL; // This ZONE_CONTAINER handle the zone contour cuurently in progress
m_NetInfo = new NETINFO_LIST( this) ; // handle nets info list (name, design constraints ..
for( int layer=0; layer<NB_COPPER_LAYERS; ++layer ) for( int layer = 0; layer<NB_COPPER_LAYERS; ++layer )
{ {
m_Layer[layer].m_Name = ReturnPcbLayerName( layer, true ); m_Layer[layer].m_Name = ReturnPcbLayerName( layer, true );
m_Layer[layer].m_Type = LT_SIGNAL; m_Layer[layer].m_Type = LT_SIGNAL;
...@@ -49,17 +44,15 @@ BOARD::BOARD( EDA_BaseStruct* parent, WinEDA_BasePcbFrame* frame ) : ...@@ -49,17 +44,15 @@ BOARD::BOARD( EDA_BaseStruct* parent, WinEDA_BasePcbFrame* frame ) :
/***************/ /***************/
BOARD::~BOARD() BOARD::~BOARD()
{ {
while ( m_ZoneDescriptorList.size() ) while( m_ZoneDescriptorList.size() )
{ {
ZONE_CONTAINER* area_to_remove = m_ZoneDescriptorList[0]; ZONE_CONTAINER* area_to_remove = m_ZoneDescriptorList[0];
Delete( area_to_remove ); Delete( area_to_remove );
} }
MyFree( m_Ratsnest ); m_FullRatsnest.clear();
m_Ratsnest = 0;
MyFree( m_LocalRatsnest ); m_LocalRatsnest.clear();
m_LocalRatsnest = 0;
DeleteMARKERs(); DeleteMARKERs();
DeleteZONEOutlines(); DeleteZONEOutlines();
...@@ -95,11 +88,11 @@ bool BOARD::SetLayerName( int aLayerIndex, const wxString& aLayerName ) ...@@ -95,11 +88,11 @@ bool BOARD::SetLayerName( int aLayerIndex, const wxString& aLayerName )
return false; return false;
// no quote chars in the name allowed // no quote chars in the name allowed
if( aLayerName.Find( wxChar('"') ) != wxNOT_FOUND ) if( aLayerName.Find( wxChar( '"' ) ) != wxNOT_FOUND )
return false; return false;
// ensure unique-ness of layer names // ensure unique-ness of layer names
for( int layer=0; layer<GetCopperLayerCount() || layer==LAST_COPPER_LAYER; ) for( int layer = 0; layer<GetCopperLayerCount() || layer==LAST_COPPER_LAYER; )
{ {
if( layer!=aLayerIndex && aLayerName == m_Layer[layer].m_Name ) if( layer!=aLayerIndex && aLayerName == m_Layer[layer].m_Name )
return false; return false;
...@@ -111,7 +104,7 @@ bool BOARD::SetLayerName( int aLayerIndex, const wxString& aLayerName ) ...@@ -111,7 +104,7 @@ bool BOARD::SetLayerName( int aLayerIndex, const wxString& aLayerName )
m_Layer[aLayerIndex].m_Name = aLayerName; m_Layer[aLayerIndex].m_Name = aLayerName;
// replace any spaces with underscores // replace any spaces with underscores
m_Layer[aLayerIndex].m_Name.Replace( wxT(" "), wxT("_") ); m_Layer[aLayerIndex].m_Name.Replace( wxT( " " ), wxT( "_" ) );
return true; return true;
} }
...@@ -146,10 +139,17 @@ const char* LAYER::ShowType( LAYER_T aType ) ...@@ -146,10 +139,17 @@ const char* LAYER::ShowType( LAYER_T aType )
switch( aType ) switch( aType )
{ {
default: default:
case LT_SIGNAL: cp = "signal"; break; case LT_SIGNAL:
case LT_POWER: cp = "power"; break; cp = "signal"; break;
case LT_MIXED: cp = "mixed"; break;
case LT_JUMPER: cp = "jumper"; break; case LT_POWER:
cp = "power"; break;
case LT_MIXED:
cp = "mixed"; break;
case LT_JUMPER:
cp = "jumper"; break;
} }
return cp; return cp;
...@@ -167,7 +167,7 @@ LAYER_T LAYER::ParseType( const char* aType ) ...@@ -167,7 +167,7 @@ LAYER_T LAYER::ParseType( const char* aType )
else if( strcmp( aType, "jumper" ) == 0 ) else if( strcmp( aType, "jumper" ) == 0 )
return LT_JUMPER; return LT_JUMPER;
else else
return LAYER_T(-1); return LAYER_T( -1 );
} }
...@@ -179,16 +179,17 @@ int BOARD::GetCopperLayerCount() const ...@@ -179,16 +179,17 @@ int BOARD::GetCopperLayerCount() const
wxPoint& BOARD::GetPosition() wxPoint& BOARD::GetPosition()
{ {
static wxPoint dummy(0,0); static wxPoint dummy( 0, 0 );
return dummy; // a reference return dummy; // a reference
} }
void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl ) void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl )
{ {
if ( aBoardItem == NULL ) if( aBoardItem == NULL )
{ {
wxFAIL_MSG( wxT("BOARD::Add() param error: aBoardItem NULL") ); wxFAIL_MSG( wxT( "BOARD::Add() param error: aBoardItem NULL" ) );
return; return;
} }
...@@ -208,11 +209,11 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl ) ...@@ -208,11 +209,11 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl )
case TYPE_TRACK: case TYPE_TRACK:
case TYPE_VIA: case TYPE_VIA:
{ {
TRACK* insertAid = ((TRACK*)aBoardItem)->GetBestInsertPoint( this ); TRACK* insertAid = ( (TRACK*) aBoardItem )->GetBestInsertPoint( this );
m_Track.Insert( (TRACK*)aBoardItem, insertAid ); m_Track.Insert( (TRACK*) aBoardItem, insertAid );
} }
break; break;
case TYPE_ZONE: case TYPE_ZONE:
if( aControl & ADD_APPEND ) if( aControl & ADD_APPEND )
...@@ -242,9 +243,9 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl ) ...@@ -242,9 +243,9 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl )
aBoardItem->SetParent( this ); aBoardItem->SetParent( this );
break; break;
// other types may use linked list // other types may use linked list
default: default:
wxFAIL_MSG( wxT("BOARD::Add() needs work: BOARD_ITEM type not handled") ); wxFAIL_MSG( wxT( "BOARD::Add() needs work: BOARD_ITEM type not handled" ) );
} }
} }
...@@ -257,8 +258,9 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem ) ...@@ -257,8 +258,9 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
switch( aBoardItem->Type() ) switch( aBoardItem->Type() )
{ {
case TYPE_MARKER: case TYPE_MARKER:
// find the item in the vector, then remove it // find the item in the vector, then remove it
for( unsigned i=0; i<m_markers.size(); ++i ) for( unsigned i = 0; i<m_markers.size(); ++i )
{ {
if( m_markers[i] == (MARKER*) aBoardItem ) if( m_markers[i] == (MARKER*) aBoardItem )
{ {
...@@ -266,11 +268,12 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem ) ...@@ -266,11 +268,12 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
break; break;
} }
} }
break; break;
case TYPE_ZONE_CONTAINER: // this one uses a vector case TYPE_ZONE_CONTAINER: // this one uses a vector
// find the item in the vector, then delete then erase it. // find the item in the vector, then delete then erase it.
for( unsigned i=0; i<m_ZoneDescriptorList.size(); ++i ) for( unsigned i = 0; i<m_ZoneDescriptorList.size(); ++i )
{ {
if( m_ZoneDescriptorList[i] == (ZONE_CONTAINER*) aBoardItem ) if( m_ZoneDescriptorList[i] == (ZONE_CONTAINER*) aBoardItem )
{ {
...@@ -278,6 +281,7 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem ) ...@@ -278,6 +281,7 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
break; break;
} }
} }
break; break;
case TYPE_MODULE: case TYPE_MODULE:
...@@ -303,7 +307,7 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem ) ...@@ -303,7 +307,7 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
// other types may use linked list // other types may use linked list
default: default:
wxFAIL_MSG( wxT("BOARD::Remove() needs more ::Type() support") ); wxFAIL_MSG( wxT( "BOARD::Remove() needs more ::Type() support" ) );
} }
return aBoardItem; return aBoardItem;
...@@ -313,16 +317,17 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem ) ...@@ -313,16 +317,17 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
void BOARD::DeleteMARKERs() void BOARD::DeleteMARKERs()
{ {
// the vector does not know how to delete the MARKER, it holds pointers // the vector does not know how to delete the MARKER, it holds pointers
for( unsigned i=0; i<m_markers.size(); ++i ) for( unsigned i = 0; i<m_markers.size(); ++i )
delete m_markers[i]; delete m_markers[i];
m_markers.clear(); m_markers.clear();
} }
void BOARD::DeleteZONEOutlines() void BOARD::DeleteZONEOutlines()
{ {
// the vector does not know how to delete the ZONE Outlines, it holds pointers // the vector does not know how to delete the ZONE Outlines, it holds pointers
for( unsigned i=0; i<m_ZoneDescriptorList.size(); ++i ) for( unsigned i = 0; i<m_ZoneDescriptorList.size(); ++i )
delete m_ZoneDescriptorList[i]; delete m_ZoneDescriptorList[i];
m_ZoneDescriptorList.clear(); m_ZoneDescriptorList.clear();
...@@ -344,14 +349,14 @@ int BOARD::GetNumSegmZone() ...@@ -344,14 +349,14 @@ int BOARD::GetNumSegmZone()
// return the unconnection count // return the unconnection count
int BOARD::GetNumNoconnect() unsigned BOARD::GetNoconnectCount()
{ {
return m_NbNoconnect; return m_NbNoconnect;
} }
// return the active pad count ( pads with a netcode > 0 ) // return the active pad count ( pads with a netcode > 0 )
int BOARD::GetNumNodes() unsigned BOARD::GetNodesCount()
{ {
return m_NbNodes; return m_NbNodes;
} }
...@@ -389,25 +394,25 @@ bool BOARD::ComputeBoundaryBox() ...@@ -389,25 +394,25 @@ bool BOARD::ComputeBoundaryBox()
if( ptr->m_Shape == S_CIRCLE ) if( ptr->m_Shape == S_CIRCLE )
{ {
cx = ptr->m_Start.x; cy = ptr->m_Start.y; cx = ptr->m_Start.x; cy = ptr->m_Start.y;
rayon = (int) hypot( (double) (ptr->m_End.x - cx), (double) (ptr->m_End.y - cy) ); rayon = (int) hypot( (double) ( ptr->m_End.x - cx ), (double) ( ptr->m_End.y - cy ) );
rayon += d; rayon += d;
xmin = MIN( xmin, cx - rayon ); xmin = MIN( xmin, cx - rayon );
ymin = MIN( ymin, cy - rayon ); ymin = MIN( ymin, cy - rayon );
xmax = MAX( xmax, cx + rayon ); xmax = MAX( xmax, cx + rayon );
ymax = MAX( ymax, cy + rayon ); ymax = MAX( ymax, cy + rayon );
hasItems = TRUE; hasItems = TRUE;
} }
else else
{ {
cx = MIN( ptr->m_Start.x, ptr->m_End.x ); cx = MIN( ptr->m_Start.x, ptr->m_End.x );
cy = MIN( ptr->m_Start.y, ptr->m_End.y ); cy = MIN( ptr->m_Start.y, ptr->m_End.y );
xmin = MIN( xmin, cx - d ); xmin = MIN( xmin, cx - d );
ymin = MIN( ymin, cy - d ); ymin = MIN( ymin, cy - d );
cx = MAX( ptr->m_Start.x, ptr->m_End.x ); cx = MAX( ptr->m_Start.x, ptr->m_End.x );
cy = MAX( ptr->m_Start.y, ptr->m_End.y ); cy = MAX( ptr->m_Start.y, ptr->m_End.y );
xmax = MAX( xmax, cx + d ); xmax = MAX( xmax, cx + d );
ymax = MAX( ymax, cy + d ); ymax = MAX( ymax, cy + d );
hasItems = TRUE; hasItems = TRUE;
} }
} }
...@@ -417,10 +422,10 @@ bool BOARD::ComputeBoundaryBox() ...@@ -417,10 +422,10 @@ bool BOARD::ComputeBoundaryBox()
for( MODULE* module = m_Modules; module; module = module->Next() ) for( MODULE* module = m_Modules; module; module = module->Next() )
{ {
hasItems = TRUE; hasItems = TRUE;
xmin = MIN( xmin, ( module->m_Pos.x + module->m_BoundaryBox.GetX() ) ); xmin = MIN( xmin, ( module->m_Pos.x + module->m_BoundaryBox.GetX() ) );
ymin = MIN( ymin, ( module->m_Pos.y + module->m_BoundaryBox.GetY() ) ); ymin = MIN( ymin, ( module->m_Pos.y + module->m_BoundaryBox.GetY() ) );
xmax = MAX( xmax, module->m_Pos.x + module->m_BoundaryBox.GetRight() ); xmax = MAX( xmax, module->m_Pos.x + module->m_BoundaryBox.GetRight() );
ymax = MAX( ymax, module->m_Pos.y + module->m_BoundaryBox.GetBottom() ); ymax = MAX( ymax, module->m_Pos.y + module->m_BoundaryBox.GetBottom() );
for( D_PAD* pt_pad = module->m_Pads; pt_pad; pt_pad = pt_pad->Next() ) for( D_PAD* pt_pad = module->m_Pads; pt_pad; pt_pad = pt_pad->Next() )
...@@ -438,29 +443,29 @@ bool BOARD::ComputeBoundaryBox() ...@@ -438,29 +443,29 @@ bool BOARD::ComputeBoundaryBox()
/* Analyse track and zones */ /* Analyse track and zones */
for( TRACK* track = m_Track; track; track = track->Next() ) for( TRACK* track = m_Track; track; track = track->Next() )
{ {
d = (track->m_Width / 2) + 1; d = (track->m_Width / 2) + 1;
cx = MIN( track->m_Start.x, track->m_End.x ); cx = MIN( track->m_Start.x, track->m_End.x );
cy = MIN( track->m_Start.y, track->m_End.y ); cy = MIN( track->m_Start.y, track->m_End.y );
xmin = MIN( xmin, cx - d ); xmin = MIN( xmin, cx - d );
ymin = MIN( ymin, cy - d ); ymin = MIN( ymin, cy - d );
cx = MAX( track->m_Start.x, track->m_End.x ); cx = MAX( track->m_Start.x, track->m_End.x );
cy = MAX( track->m_Start.y, track->m_End.y ); cy = MAX( track->m_Start.y, track->m_End.y );
xmax = MAX( xmax, cx + d ); xmax = MAX( xmax, cx + d );
ymax = MAX( ymax, cy + d ); ymax = MAX( ymax, cy + d );
hasItems = TRUE; hasItems = TRUE;
} }
for( TRACK* track = m_Zone; track; track = track->Next() ) for( TRACK* track = m_Zone; track; track = track->Next() )
{ {
d = (track->m_Width / 2) + 1; d = (track->m_Width / 2) + 1;
cx = MIN( track->m_Start.x, track->m_End.x ); cx = MIN( track->m_Start.x, track->m_End.x );
cy = MIN( track->m_Start.y, track->m_End.y ); cy = MIN( track->m_Start.y, track->m_End.y );
xmin = MIN( xmin, cx - d ); xmin = MIN( xmin, cx - d );
ymin = MIN( ymin, cy - d ); ymin = MIN( ymin, cy - d );
cx = MAX( track->m_Start.x, track->m_End.x ); cx = MAX( track->m_Start.x, track->m_End.x );
cy = MAX( track->m_Start.y, track->m_End.y ); cy = MAX( track->m_Start.y, track->m_End.y );
xmax = MAX( xmax, cx + d ); xmax = MAX( xmax, cx + d );
ymax = MAX( ymax, cy + d ); ymax = MAX( ymax, cy + d );
hasItems = TRUE; hasItems = TRUE;
} }
...@@ -497,56 +502,63 @@ void BOARD::DisplayInfo( WinEDA_DrawFrame* frame ) ...@@ -497,56 +502,63 @@ void BOARD::DisplayInfo( WinEDA_DrawFrame* frame )
#define POS_AFF_NBPADS 1 #define POS_AFF_NBPADS 1
#define POS_AFF_NBVIAS 8 #define POS_AFF_NBVIAS 8
#define POS_AFF_NBNODES 16 #define POS_AFF_NBNODES 16
#define POS_AFF_NBLINKS 24 #define POS_AFF_NBNETS 24
#define POS_AFF_NBNETS 32 #define POS_AFF_NBLINKS 32
#define POS_AFF_NBCONNECT 40 #define POS_AFF_NBCONNECT 40
#define POS_AFF_NBNOCONNECT 48 #define POS_AFF_NBNOCONNECT 48
wxString txt; wxString txt;
frame->MsgPanel->EraseMsgBox(); frame->MsgPanel->EraseMsgBox();
txt.Printf( wxT( "%d" ), m_Pads.size() );
Affiche_1_Parametre( frame, POS_AFF_NBPADS, _( "Pads" ), txt, DARKGREEN );
int nb_vias = 0; int viasCount = 0;
for( BOARD_ITEM* item = m_Track; item; item = item->Next() ) for( BOARD_ITEM* item = m_Track; item; item = item->Next() )
{ {
if( item->Type() == TYPE_VIA ) if( item->Type() == TYPE_VIA )
nb_vias++; viasCount++;
} }
txt.Printf( wxT( "%d" ), nb_vias ); txt.Printf( wxT( "%d" ), m_Pads.size() );
Affiche_1_Parametre( frame, POS_AFF_NBPADS, _( "Pads" ), txt, DARKGREEN );
txt.Printf( wxT( "%d" ), viasCount );
Affiche_1_Parametre( frame, POS_AFF_NBVIAS, _( "Vias" ), txt, DARKGREEN ); Affiche_1_Parametre( frame, POS_AFF_NBVIAS, _( "Vias" ), txt, DARKGREEN );
txt.Printf( wxT( "%d" ), GetNumNodes() ); txt.Printf( wxT( "%d" ), GetNodesCount() );
Affiche_1_Parametre( frame, POS_AFF_NBNODES, _( "Nodes" ), txt, DARKCYAN ); Affiche_1_Parametre( frame, POS_AFF_NBNODES, _( "Nodes" ), txt, DARKCYAN );
txt.Printf( wxT( "%d" ), m_NbLinks );
Affiche_1_Parametre( frame, POS_AFF_NBLINKS, _( "Links" ), txt, DARKGREEN );
txt.Printf( wxT( "%d" ), m_NetInfo->GetCount() ); txt.Printf( wxT( "%d" ), m_NetInfo->GetCount() );
Affiche_1_Parametre( frame, POS_AFF_NBNETS, _( "Nets" ), txt, RED ); Affiche_1_Parametre( frame, POS_AFF_NBNETS, _( "Nets" ), txt, RED );
txt.Printf( wxT( "%d" ), m_NbLinks - GetNumNoconnect() ); /* These parameters are known only if the full ratsnest is available,
Affiche_1_Parametre( frame, POS_AFF_NBCONNECT, _( "Connect" ), txt, DARKGREEN ); * so, display them only if this is the case
*/
if( (m_Status_Pcb & NET_CODES_OK) )
{
txt.Printf( wxT( "%d" ), GetRatsnestsCount() );
Affiche_1_Parametre( frame, POS_AFF_NBLINKS, _( "Links" ), txt, DARKGREEN );
txt.Printf( wxT( "%d" ), GetRatsnestsCount() - GetNoconnectCount() );
Affiche_1_Parametre( frame, POS_AFF_NBCONNECT, _( "Connect" ), txt, DARKGREEN );
txt.Printf( wxT( "%d" ), GetNumNoconnect() ); txt.Printf( wxT( "%d" ), GetNoconnectCount() );
Affiche_1_Parametre( frame, POS_AFF_NBNOCONNECT, _( "NoConn" ), txt, BLUE ); Affiche_1_Parametre( frame, POS_AFF_NBNOCONNECT, _( "NoConn" ), txt, BLUE );
}
} }
// virtual, see pcbstruct.h // virtual, see pcbstruct.h
SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
const KICAD_T scanTypes[] ) const KICAD_T scanTypes[] )
{ {
KICAD_T stype; KICAD_T stype;
SEARCH_RESULT result = SEARCH_CONTINUE; SEARCH_RESULT result = SEARCH_CONTINUE;
const KICAD_T* p = scanTypes; const KICAD_T* p = scanTypes;
bool done=false; bool done = false;
#if 0 && defined(DEBUG) #if 0 && defined(DEBUG)
std::cout << GetClass().mb_str() << ' '; std::cout << GetClass().mb_str() << ' ';
#endif #endif
while( !done ) while( !done )
...@@ -561,20 +573,22 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, ...@@ -561,20 +573,22 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
break; break;
/* Instances of the requested KICAD_T live in a list, either one /* Instances of the requested KICAD_T live in a list, either one
that I manage, or that my modules manage. If it's a type managed * that I manage, or that my modules manage. If it's a type managed
by class MODULE, then simply pass it on to each module's * by class MODULE, then simply pass it on to each module's
MODULE::Visit() function by way of the * MODULE::Visit() function by way of the
IterateForward( m_Modules, ... ) call. * IterateForward( m_Modules, ... ) call.
*/ */
case TYPE_MODULE: case TYPE_MODULE:
case TYPE_PAD: case TYPE_PAD:
case TYPE_TEXTE_MODULE: case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE: case TYPE_EDGE_MODULE:
// this calls MODULE::Visit() on each module. // this calls MODULE::Visit() on each module.
result = IterateForward( m_Modules, inspector, testData, p ); result = IterateForward( m_Modules, inspector, testData, p );
// skip over any types handled in the above call. // skip over any types handled in the above call.
for(;;) for( ; ; )
{ {
switch( stype = *++p ) switch( stype = *++p )
{ {
...@@ -583,10 +597,14 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, ...@@ -583,10 +597,14 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
case TYPE_TEXTE_MODULE: case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE: case TYPE_EDGE_MODULE:
continue; continue;
default:;
default:
;
} }
break; break;
} }
break; break;
case TYPE_DRAWSEGMENT: case TYPE_DRAWSEGMENT:
...@@ -594,8 +612,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, ...@@ -594,8 +612,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
case TYPE_COTATION: case TYPE_COTATION:
case TYPE_MIRE: case TYPE_MIRE:
result = IterateForward( m_Drawings, inspector, testData, p ); result = IterateForward( m_Drawings, inspector, testData, p );
// skip over any types handled in the above call. // skip over any types handled in the above call.
for(;;) for( ; ; )
{ {
switch( stype = *++p ) switch( stype = *++p )
{ {
...@@ -604,14 +623,18 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, ...@@ -604,14 +623,18 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
case TYPE_COTATION: case TYPE_COTATION:
case TYPE_MIRE: case TYPE_MIRE:
continue; continue;
default:;
default:
;
} }
break; break;
} }
;
;
break; break;
#if 0 // both these are on same list, so we must scan it twice in order to get VIA priority, #if 0 // both these are on same list, so we must scan it twice in order to get VIA priority,
// using new #else code below. // using new #else code below.
// But we are not using separte lists for TRACKs and SEGVIAs, because items are ordered (sortered) in the linked // But we are not using separte lists for TRACKs and SEGVIAs, because items are ordered (sortered) in the linked
// list by netcode AND by physical distance: // list by netcode AND by physical distance:
...@@ -627,19 +650,25 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, ...@@ -627,19 +650,25 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
case TYPE_VIA: case TYPE_VIA:
case TYPE_TRACK: case TYPE_TRACK:
result = IterateForward( m_Track, inspector, testData, p ); result = IterateForward( m_Track, inspector, testData, p );
// skip over any types handled in the above call. // skip over any types handled in the above call.
for(;;) for( ; ; )
{ {
switch( stype = *++p ) switch( stype = *++p )
{ {
case TYPE_VIA: case TYPE_VIA:
case TYPE_TRACK: case TYPE_TRACK:
continue; continue;
default:;
default:
;
} }
break; break;
} }
break; break;
#else #else
case TYPE_VIA: case TYPE_VIA:
result = IterateForward( m_Track, inspector, testData, p ); result = IterateForward( m_Track, inspector, testData, p );
...@@ -653,24 +682,28 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, ...@@ -653,24 +682,28 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
#endif #endif
case TYPE_MARKER: case TYPE_MARKER:
// MARKERS are in the m_markers std::vector // MARKERS are in the m_markers std::vector
for( unsigned i=0; i<m_markers.size(); ++i ) for( unsigned i = 0; i<m_markers.size(); ++i )
{ {
result = m_markers[i]->Visit( inspector, testData, p ); result = m_markers[i]->Visit( inspector, testData, p );
if( result == SEARCH_QUIT ) if( result == SEARCH_QUIT )
break; break;
} }
++p; ++p;
break; break;
case TYPE_ZONE_CONTAINER: case TYPE_ZONE_CONTAINER:
// TYPE_ZONE_CONTAINER are in the m_ZoneDescriptorList std::vector // TYPE_ZONE_CONTAINER are in the m_ZoneDescriptorList std::vector
for( unsigned i=0; i< m_ZoneDescriptorList.size(); ++i ) for( unsigned i = 0; i< m_ZoneDescriptorList.size(); ++i )
{ {
result = m_ZoneDescriptorList[i]->Visit( inspector, testData, p ); result = m_ZoneDescriptorList[i]->Visit( inspector, testData, p );
if( result == SEARCH_QUIT ) if( result == SEARCH_QUIT )
break; break;
} }
++p; ++p;
break; break;
...@@ -679,7 +712,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, ...@@ -679,7 +712,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
++p; ++p;
break; break;
case TYPE_ZONE_UNUSED: // Unused type case TYPE_ZONE_UNUSED: // Unused type
break; break;
default: // catch EOT or ANY OTHER type here and return. default: // catch EOT or ANY OTHER type here and return.
...@@ -696,82 +729,82 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData, ...@@ -696,82 +729,82 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
/* now using PcbGeneralLocateAndDisplay(), but this remains a useful example /* now using PcbGeneralLocateAndDisplay(), but this remains a useful example
of how the INSPECTOR can be used in a lightweight way. * of how the INSPECTOR can be used in a lightweight way.
// see pcbstruct.h * // see pcbstruct.h
BOARD_ITEM* BOARD::FindPadOrModule( const wxPoint& refPos, int layer ) * BOARD_ITEM* BOARD::FindPadOrModule( const wxPoint& refPos, int layer )
{ * {
class PadOrModule : public INSPECTOR * class PadOrModule : public INSPECTOR
{ * {
public: * public:
BOARD_ITEM* found; * BOARD_ITEM* found;
int layer; * int layer;
int layer_mask; * int layer_mask;
*
PadOrModule( int alayer ) : * PadOrModule( int alayer ) :
found(0), layer(alayer), layer_mask( g_TabOneLayerMask[alayer] ) * found(0), layer(alayer), layer_mask( g_TabOneLayerMask[alayer] )
{} * {}
*
SEARCH_RESULT Inspect( EDA_BaseStruct* testItem, const void* testData ) * SEARCH_RESULT Inspect( EDA_BaseStruct* testItem, const void* testData )
{ * {
BOARD_ITEM* item = (BOARD_ITEM*) testItem; * BOARD_ITEM* item = (BOARD_ITEM*) testItem;
const wxPoint& refPos = *(const wxPoint*) testData; * const wxPoint& refPos = *(const wxPoint*) testData;
*
if( item->Type() == TYPE_PAD ) * if( item->Type() == TYPE_PAD )
{ * {
D_PAD* pad = (D_PAD*) item; * D_PAD* pad = (D_PAD*) item;
if( pad->HitTest( refPos ) ) * if( pad->HitTest( refPos ) )
{ * {
if( layer_mask & pad->m_Masque_Layer ) * if( layer_mask & pad->m_Masque_Layer )
{ * {
found = item; * found = item;
return SEARCH_QUIT; * return SEARCH_QUIT;
} * }
else if( !found ) * else if( !found )
{ * {
MODULE* parent = (MODULE*) pad->m_Parent; * MODULE* parent = (MODULE*) pad->m_Parent;
if( IsModuleLayerVisible( parent->GetLayer() ) ) * if( IsModuleLayerVisible( parent->GetLayer() ) )
found = item; * found = item;
} * }
} * }
} * }
*
else if( item->Type() == TYPE_MODULE ) * else if( item->Type() == TYPE_MODULE )
{ * {
MODULE* module = (MODULE*) item; * MODULE* module = (MODULE*) item;
*
// consider only visible modules * // consider only visible modules
if( IsModuleLayerVisible( module->GetLayer() ) ) * if( IsModuleLayerVisible( module->GetLayer() ) )
{ * {
if( module->HitTest( refPos ) ) * if( module->HitTest( refPos ) )
{ * {
if( layer == module->GetLayer() ) * if( layer == module->GetLayer() )
{ * {
found = item; * found = item;
return SEARCH_QUIT; * return SEARCH_QUIT;
} * }
*
// layer mismatch, save in case we don't find a * // layer mismatch, save in case we don't find a
// future layer match hit. * // future layer match hit.
if( !found ) * if( !found )
found = item; * found = item;
} * }
} * }
} * }
return SEARCH_CONTINUE; * return SEARCH_CONTINUE;
} * }
}; * };
*
PadOrModule inspector( layer ); * PadOrModule inspector( layer );
*
// search only for PADs first, then MODULES, and preferably a layer match * // search only for PADs first, then MODULES, and preferably a layer match
static const KICAD_T scanTypes[] = { TYPE_PAD, TYPE_MODULE, EOT }; * static const KICAD_T scanTypes[] = { TYPE_PAD, TYPE_MODULE, EOT };
*
// visit this BOARD with the above inspector * // visit this BOARD with the above inspector
Visit( &inspector, &refPos, scanTypes ); * Visit( &inspector, &refPos, scanTypes );
*
return inspector.found; * return inspector.found;
} * }
*/ */
/** /**
...@@ -785,7 +818,10 @@ NETINFO_ITEM* BOARD::FindNet( int anetcode ) const ...@@ -785,7 +818,10 @@ NETINFO_ITEM* BOARD::FindNet( int anetcode ) const
// the first valid netcode is 1. // the first valid netcode is 1.
// zero is reserved for "no connection" and is not used. // zero is reserved for "no connection" and is not used.
if( anetcode > 0 ) if( anetcode > 0 )
{
wxASSERT( anetcode == m_NetInfo->GetItem( anetcode )->GetNet() );
return m_NetInfo->GetItem( anetcode ); return m_NetInfo->GetItem( anetcode );
}
return NULL; return NULL;
} }
...@@ -796,13 +832,13 @@ NETINFO_ITEM* BOARD::FindNet( int anetcode ) const ...@@ -796,13 +832,13 @@ NETINFO_ITEM* BOARD::FindNet( int anetcode ) const
* @param aNetname A Netname to search for. * @param aNetname A Netname to search for.
* @return EQUIPOT* - the net or NULL if not found. * @return EQUIPOT* - the net or NULL if not found.
*/ */
NETINFO_ITEM* BOARD::FindNet( const wxString & aNetname ) const NETINFO_ITEM* BOARD::FindNet( const wxString& aNetname ) const
{ {
// the first valid netcode is 1. // the first valid netcode is 1.
// zero is reserved for "no connection" and is not used. // zero is reserved for "no connection" and is not used.
if( ! aNetname.IsEmpty() ) if( !aNetname.IsEmpty() )
{ {
for(unsigned ii = 1; ii < m_NetInfo->GetCount(); ii++ ) for( unsigned ii = 1; ii < m_NetInfo->GetCount(); ii++ )
{ {
if( m_NetInfo->GetItem( ii )->GetNetname() == aNetname ) if( m_NetInfo->GetItem( ii )->GetNetname() == aNetname )
return m_NetInfo->GetItem( ii ); return m_NetInfo->GetItem( ii );
...@@ -816,14 +852,14 @@ MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const ...@@ -816,14 +852,14 @@ MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const
{ {
struct FindModule : public INSPECTOR struct FindModule : public INSPECTOR
{ {
MODULE* found; MODULE* found;
FindModule() : found(0) {} FindModule() : found( 0 ) {}
// implement interface INSPECTOR // implement interface INSPECTOR
SEARCH_RESULT Inspect( EDA_BaseStruct* item, const void* data ) SEARCH_RESULT Inspect( EDA_BaseStruct* item, const void* data )
{ {
MODULE* module = (MODULE*) item; MODULE* module = (MODULE*) item;
const wxString& ref = *(const wxString*) data; const wxString& ref = *(const wxString*) data;
if( ref == module->GetReference() ) if( ref == module->GetReference() )
{ {
...@@ -846,9 +882,9 @@ MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const ...@@ -846,9 +882,9 @@ MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const
// Sort nets by decreasing pad count // Sort nets by decreasing pad count
static bool s_SortByNodes(const NETINFO_ITEM* a, const NETINFO_ITEM* b) static bool s_SortByNodes( const NETINFO_ITEM* a, const NETINFO_ITEM* b )
{ {
return a->GetNodesCount() < b->GetNodesCount(); return a->GetNodesCount() < b->GetNodesCount();
} }
...@@ -858,29 +894,31 @@ static bool s_SortByNodes(const NETINFO_ITEM* a, const NETINFO_ITEM* b) ...@@ -858,29 +894,31 @@ static bool s_SortByNodes(const NETINFO_ITEM* a, const NETINFO_ITEM* b)
* @param aSortbyPadsCount : true = sort by active pads count, false = no sort (i.e. leave the sort by net names) * @param aSortbyPadsCount : true = sort by active pads count, false = no sort (i.e. leave the sort by net names)
* @return int - net names count. * @return int - net names count.
*/ */
int BOARD::ReturnSortedNetnamesList( wxArrayString & aNames, bool aSortbyPadsCount) int BOARD::ReturnSortedNetnamesList( wxArrayString& aNames, bool aSortbyPadsCount )
{ {
if ( m_NetInfo->GetCount() == 0 ) return 0; if( m_NetInfo->GetCount() == 0 )
return 0;
/* Build the list */ /* Build the list */
std::vector <NETINFO_ITEM*> netBuffer; std::vector <NETINFO_ITEM*> netBuffer;
netBuffer.reserve(m_NetInfo->GetCount()); netBuffer.reserve( m_NetInfo->GetCount() );
for( unsigned ii = 1; ii < m_NetInfo->GetCount(); ii++ ) for( unsigned ii = 1; ii < m_NetInfo->GetCount(); ii++ )
{ {
if ( m_NetInfo->GetItem(ii)->GetNet() > 0 ) if( m_NetInfo->GetItem( ii )->GetNet() > 0 )
netBuffer.push_back(m_NetInfo->GetItem(ii)); netBuffer.push_back( m_NetInfo->GetItem( ii ) );
} }
/* sort the list */ /* sort the list */
if ( aSortbyPadsCount ) if( aSortbyPadsCount )
sort (netBuffer.begin(), netBuffer.end(), s_SortByNodes); sort( netBuffer.begin(), netBuffer.end(), s_SortByNodes );
for( unsigned ii = 0; ii < netBuffer.size(); ii++ ) for( unsigned ii = 0; ii < netBuffer.size(); ii++ )
aNames.Add(netBuffer[ii]->GetNetname()); aNames.Add( netBuffer[ii]->GetNetname() );
return netBuffer.size(); return netBuffer.size();
} }
/************************************/ /************************************/
bool BOARD::Save( FILE* aFile ) const bool BOARD::Save( FILE* aFile ) const
/************************************/ /************************************/
...@@ -890,15 +928,15 @@ bool BOARD::Save( FILE* aFile ) const ...@@ -890,15 +928,15 @@ bool BOARD::Save( FILE* aFile ) const
// save the nets // save the nets
for( unsigned ii = 0; ii < m_NetInfo->GetCount(); ii++ ) for( unsigned ii = 0; ii < m_NetInfo->GetCount(); ii++ )
if( !m_NetInfo->GetItem(ii)->Save( aFile ) ) if( !m_NetInfo->GetItem( ii )->Save( aFile ) )
goto out; goto out;
// save the modules // save the modules
for( item = m_Modules; item; item=item->Next() ) for( item = m_Modules; item; item = item->Next() )
if( !item->Save( aFile ) ) if( !item->Save( aFile ) )
goto out; goto out;
for( item = m_Drawings; item; item=item->Next() ) for( item = m_Drawings; item; item = item->Next() )
{ {
switch( item->Type() ) switch( item->Type() )
{ {
...@@ -911,6 +949,7 @@ bool BOARD::Save( FILE* aFile ) const ...@@ -911,6 +949,7 @@ bool BOARD::Save( FILE* aFile ) const
break; break;
default: default:
// future: throw exception here // future: throw exception here
#if defined(DEBUG) #if defined(DEBUG)
printf( "BOARD::Save() ignoring m_Drawings type %d\n", item->Type() ); printf( "BOARD::Save() ignoring m_Drawings type %d\n", item->Type() );
...@@ -923,16 +962,18 @@ bool BOARD::Save( FILE* aFile ) const ...@@ -923,16 +962,18 @@ bool BOARD::Save( FILE* aFile ) const
// save the tracks & vias // save the tracks & vias
fprintf( aFile, "$TRACK\n" ); fprintf( aFile, "$TRACK\n" );
for( item = m_Track; item; item=item->Next() ) for( item = m_Track; item; item = item->Next() )
if( !item->Save( aFile ) ) if( !item->Save( aFile ) )
goto out; goto out;
fprintf( aFile, "$EndTRACK\n" ); fprintf( aFile, "$EndTRACK\n" );
// save the zones // save the zones
fprintf( aFile, "$ZONE\n" ); fprintf( aFile, "$ZONE\n" );
for( item = m_Zone; item; item=item->Next() ) for( item = m_Zone; item; item = item->Next() )
if( !item->Save( aFile ) ) if( !item->Save( aFile ) )
goto out; goto out;
fprintf( aFile, "$EndZONE\n" ); fprintf( aFile, "$EndZONE\n" );
// save the zone edges // save the zone edges
...@@ -943,7 +984,7 @@ bool BOARD::Save( FILE* aFile ) const ...@@ -943,7 +984,7 @@ bool BOARD::Save( FILE* aFile ) const
} }
if( fprintf( aFile, "$EndBOARD\n" ) != sizeof("$EndBOARD\n")-1 ) if( fprintf( aFile, "$EndBOARD\n" ) != sizeof("$EndBOARD\n") - 1 )
goto out; goto out;
rc = true; // wrote all OK rc = true; // wrote all OK
...@@ -953,39 +994,43 @@ out: ...@@ -953,39 +994,43 @@ out:
} }
/***********************************************************************************************/ /***********************************************************************************************/
void BOARD::RedrawAreasOutlines(WinEDA_DrawPanel* panel, wxDC * aDC, int aDrawMode, int aLayer) void BOARD::RedrawAreasOutlines( WinEDA_DrawPanel* panel, wxDC* aDC, int aDrawMode, int aLayer )
/***********************************************************************************************/ /***********************************************************************************************/
/** /**
* Function RedrawAreasOutlines * Function RedrawAreasOutlines
* Redraw all areas outlines on layer aLayer ( redraw all if aLayer < 0 ) * Redraw all areas outlines on layer aLayer ( redraw all if aLayer < 0 )
*/ */
{ {
if ( ! aDC ) return; if( !aDC )
return;
for( int ii = 0; ii < GetAreaCount(); ii++ ) for( int ii = 0; ii < GetAreaCount(); ii++ )
{ {
ZONE_CONTAINER* edge_zone = GetArea(ii); ZONE_CONTAINER* edge_zone = GetArea( ii );
if( (aLayer < 0) || (aLayer == edge_zone->GetLayer()) ) if( (aLayer < 0) || ( aLayer == edge_zone->GetLayer() ) )
edge_zone->Draw( panel, aDC, aDrawMode ); edge_zone->Draw( panel, aDC, aDrawMode );
} }
} }
/***********************************************************************************************/ /***********************************************************************************************/
void BOARD::RedrawFilledAreas(WinEDA_DrawPanel* panel, wxDC * aDC, int aDrawMode, int aLayer) void BOARD::RedrawFilledAreas( WinEDA_DrawPanel* panel, wxDC* aDC, int aDrawMode, int aLayer )
/***********************************************************************************************/ /***********************************************************************************************/
/** /**
* Function RedrawFilledAreas * Function RedrawFilledAreas
* Redraw all areas outlines on layer aLayer ( redraw all if aLayer < 0 ) * Redraw all areas outlines on layer aLayer ( redraw all if aLayer < 0 )
*/ */
{ {
if ( ! aDC ) return; if( !aDC )
return;
for( int ii = 0; ii < GetAreaCount(); ii++ ) for( int ii = 0; ii < GetAreaCount(); ii++ )
{ {
ZONE_CONTAINER* edge_zone = GetArea(ii); ZONE_CONTAINER* edge_zone = GetArea( ii );
if( (aLayer < 0) || (aLayer == edge_zone->GetLayer()) ) if( (aLayer < 0) || ( aLayer == edge_zone->GetLayer() ) )
edge_zone->DrawFilledArea( panel, aDC, aDrawMode ); edge_zone->DrawFilledArea( panel, aDC, aDrawMode );
} }
} }
...@@ -1001,20 +1046,22 @@ void BOARD::RedrawFilledAreas(WinEDA_DrawPanel* panel, wxDC * aDC, int aDrawMode ...@@ -1001,20 +1046,22 @@ void BOARD::RedrawFilledAreas(WinEDA_DrawPanel* panel, wxDC * aDC, int aDrawMode
* @param aEndLayer the last layer (-1 to ignore it) to test * @param aEndLayer the last layer (-1 to ignore it) to test
* @return ZONE_CONTAINER* return a pointer to the ZONE_CONTAINER found, else NULL * @return ZONE_CONTAINER* return a pointer to the ZONE_CONTAINER found, else NULL
*/ */
ZONE_CONTAINER* BOARD::HitTestForAnyFilledArea( const wxPoint& aRefPos, int aStartLayer, int aEndLayer ) ZONE_CONTAINER* BOARD::HitTestForAnyFilledArea( const wxPoint& aRefPos,
int aStartLayer,
int aEndLayer )
{ {
if( aEndLayer < 0 ) if( aEndLayer < 0 )
aEndLayer = aStartLayer; aEndLayer = aStartLayer;
if( aEndLayer < aStartLayer) if( aEndLayer < aStartLayer )
EXCHG (aEndLayer, aStartLayer); EXCHG( aEndLayer, aStartLayer );
for( unsigned ia = 0; ia < m_ZoneDescriptorList.size(); ia++ ) for( unsigned ia = 0; ia < m_ZoneDescriptorList.size(); ia++ )
{ {
ZONE_CONTAINER* area = m_ZoneDescriptorList[ia]; ZONE_CONTAINER* area = m_ZoneDescriptorList[ia];
int layer = area->GetLayer(); int layer = area->GetLayer();
if ( (layer < aStartLayer) || (layer > aEndLayer) ) if( (layer < aStartLayer) || (layer > aEndLayer) )
continue; continue;
if ( area->GetState( BUSY ) ) // In locate functions we must skip tagged items with BUSY flag set. if( area->GetState( BUSY ) ) // In locate functions we must skip tagged items with BUSY flag set.
continue; continue;
if( area->HitTestFilledArea( aRefPos ) ) if( area->HitTestFilledArea( aRefPos ) )
return area; return area;
...@@ -1023,6 +1070,7 @@ ZONE_CONTAINER* BOARD::HitTestForAnyFilledArea( const wxPoint& aRefPos, int aSt ...@@ -1023,6 +1070,7 @@ ZONE_CONTAINER* BOARD::HitTestForAnyFilledArea( const wxPoint& aRefPos, int aSt
return NULL; return NULL;
} }
/** /**
* Function SetAreasNetCodesFromNetNames * Function SetAreasNetCodesFromNetNames
* Set the .m_NetCode member of all copper areas, according to the area Net Name * Set the .m_NetCode member of all copper areas, according to the area Net Name
...@@ -1039,13 +1087,13 @@ int BOARD::SetAreasNetCodesFromNetNames( void ) ...@@ -1039,13 +1087,13 @@ int BOARD::SetAreasNetCodesFromNetNames( void )
for( int ii = 0; ii < GetAreaCount(); ii++ ) for( int ii = 0; ii < GetAreaCount(); ii++ )
{ {
if ( ! GetArea( ii )->IsOnCopperLayer() ) if( !GetArea( ii )->IsOnCopperLayer() )
{ {
GetArea( ii )->SetNet( 0 ); GetArea( ii )->SetNet( 0 );
continue; continue;
} }
if ( GetArea( ii )->GetNet() != 0 ) // i.e. if this zone is connected to a net if( GetArea( ii )->GetNet() != 0 ) // i.e. if this zone is connected to a net
{ {
const NETINFO_ITEM* net = FindNet( GetArea( ii )->m_Netname ); const NETINFO_ITEM* net = FindNet( GetArea( ii )->m_Netname );
if( net ) if( net )
...@@ -1081,40 +1129,45 @@ void BOARD::Show( int nestLevel, std::ostream& os ) ...@@ -1081,40 +1129,45 @@ void BOARD::Show( int nestLevel, std::ostream& os )
NestedSpace( nestLevel, os ) << '<' << GetClass().Lower().mb_str() << ">\n"; NestedSpace( nestLevel, os ) << '<' << GetClass().Lower().mb_str() << ">\n";
// specialization of the output: // specialization of the output:
NestedSpace( nestLevel+1, os ) << "<modules>\n"; NestedSpace( nestLevel + 1, os ) << "<modules>\n";
p = m_Modules; p = m_Modules;
for( ; p; p = p->Next() ) for( ; p; p = p->Next() )
p->Show( nestLevel+2, os ); p->Show( nestLevel + 2, os );
NestedSpace( nestLevel+1, os ) << "</modules>\n";
NestedSpace( nestLevel + 1, os ) << "</modules>\n";
NestedSpace( nestLevel+1, os ) << "<pdrawings>\n"; NestedSpace( nestLevel + 1, os ) << "<pdrawings>\n";
p = m_Drawings; p = m_Drawings;
for( ; p; p = p->Next() ) for( ; p; p = p->Next() )
p->Show( nestLevel+2, os ); p->Show( nestLevel + 2, os );
NestedSpace( nestLevel+1, os ) << "</pdrawings>\n";
NestedSpace( nestLevel + 1, os ) << "</pdrawings>\n";
NestedSpace( nestLevel+1, os ) << "<tracks>\n"; NestedSpace( nestLevel + 1, os ) << "<tracks>\n";
p = m_Track; p = m_Track;
for( ; p; p = p->Next() ) for( ; p; p = p->Next() )
p->Show( nestLevel+2, os ); p->Show( nestLevel + 2, os );
NestedSpace( nestLevel+1, os ) << "</tracks>\n";
NestedSpace( nestLevel+1, os ) << "<zones>\n"; NestedSpace( nestLevel + 1, os ) << "</tracks>\n";
NestedSpace( nestLevel + 1, os ) << "<zones>\n";
p = m_Zone; p = m_Zone;
for( ; p; p = p->Next() ) for( ; p; p = p->Next() )
p->Show( nestLevel+2, os ); p->Show( nestLevel + 2, os );
NestedSpace( nestLevel+1, os ) << "</zones>\n";
NestedSpace( nestLevel + 1, os ) << "</zones>\n";
/* /*
NestedSpace( nestLevel+1, os ) << "<zone_container>\n"; * NestedSpace( nestLevel+1, os ) << "<zone_container>\n";
for( ZONE_CONTAINERS::iterator i=m_ZoneDescriptorList.begin(); i!=m_ZoneDescriptorList.end(); ++i ) * for( ZONE_CONTAINERS::iterator i=m_ZoneDescriptorList.begin(); i!=m_ZoneDescriptorList.end(); ++i )
(*i)->Show( nestLevel+2, os ); * (*i)->Show( nestLevel+2, os );
NestedSpace( nestLevel+1, os ) << "</zone_container>\n"; * NestedSpace( nestLevel+1, os ) << "</zone_container>\n";
*/ */
p = (BOARD_ITEM*) m_Son; p = (BOARD_ITEM*) m_Son;
for( ; p; p = p->Next() ) for( ; p; p = p->Next() )
{ {
p->Show( nestLevel+1, os ); p->Show( nestLevel + 1, os );
} }
NestedSpace( nestLevel, os ) << "</" << GetClass().Lower().mb_str() << ">\n"; NestedSpace( nestLevel, os ) << "</" << GetClass().Lower().mb_str() << ">\n";
......
pcbnew/class_board.h
View file @ b1d1a711
...@@ -82,12 +82,9 @@ private: ...@@ -82,12 +82,9 @@ private:
public: public:
WinEDA_BasePcbFrame* m_PcbFrame; // Window de visualisation WinEDA_BasePcbFrame* m_PcbFrame; // Window de visualisation
EDA_Rect m_BoundaryBox; // Board size and position EDA_Rect m_BoundaryBox; // Board size and position
int m_Unused;
int m_Status_Pcb; // Flags used in ratsnet calculation and update int m_Status_Pcb; // Flags used in ratsnet calculation and update
EDA_BoardDesignSettings* m_BoardSettings; // Link to current design settings EDA_BoardDesignSettings* m_BoardSettings; // Link to current design settings
int m_NbNodes; // Active pads (pads attached to a net ) count int m_NbNodes; // Active pads (pads attached to a net ) count
int m_NbLinks; // Ratsnest count
int m_NbLoclinks; // Number of ratsnests from mouse cursor to pads to show while creating a track
int m_NbNoconnect; // Active ratsnet count (rastnests not alraedy connected by tracks) int m_NbNoconnect; // Active ratsnet count (rastnests not alraedy connected by tracks)
DLIST<BOARD_ITEM> m_Drawings; // linked list of lines & texts DLIST<BOARD_ITEM> m_Drawings; // linked list of lines & texts
...@@ -98,8 +95,9 @@ public: ...@@ -98,8 +95,9 @@ public:
std::vector<D_PAD*> m_Pads; // Entry for a sorted pad list (used in ratsnest calculations) std::vector<D_PAD*> m_Pads; // Entry for a sorted pad list (used in ratsnest calculations)
NETINFO_LIST* m_NetInfo; // nets info list (name, design constraints .. NETINFO_LIST* m_NetInfo; // nets info list (name, design constraints ..
RATSNEST_ITEM* m_Ratsnest; // Rastnest list std::vector<RATSNEST_ITEM> m_FullRatsnest; // Rastnest list for the BOARD
RATSNEST_ITEM* m_LocalRatsnest; // Rastnest list used while moving a footprint std::vector<RATSNEST_ITEM> m_LocalRatsnest; /* Rastnest list relative to a given footprint
(used while moving a footprint) */
ZONE_CONTAINER* m_CurrentZoneContour; // zone contour currently in progress ZONE_CONTAINER* m_CurrentZoneContour; // zone contour currently in progress
...@@ -233,27 +231,26 @@ public: ...@@ -233,27 +231,26 @@ public:
/* Routines de calcul des nombres de segments pistes et zones */ /* Routines de calcul des nombres de segments pistes et zones */
int GetNumSegmTrack(); int GetNumSegmTrack();
int GetNumSegmZone(); int GetNumSegmZone();
int GetNumNoconnect(); // retourne le nombre de connexions manquantes unsigned GetNoconnectCount(); // retourne le nombre de connexions manquantes
/** /**
* Function GetNumRatsnests * Function GetNumRatsnests
* @return int - The number of rats * @return int - The number of rats
*/ */
int GetNumRatsnests() unsigned GetRatsnestsCount()
{ {
return m_NbLinks; return m_FullRatsnest.size();
} }
int GetNumNodes(); // retourne le nombre de pads a netcode > 0 unsigned GetNodesCount(); // retourne le nombre de pads a netcode > 0
/** Function Build_Pads_Full_List /** Function Build_Pads_Full_List
* Create the pad list * Create the pad list
* initialise: * initialise:
* m_Pads (list of pads) * m_Pads (list of pads)
* m_NbNodes = 0
* set m_Status_Pcb = LISTE_PAD_OK; * set m_Status_Pcb = LISTE_PAD_OK;
* and clear for all pads the m_SubRatsnest member; * and clear for all pads in list the m_SubRatsnest member;
* delete ( free memory) m_Pcb->m_Ratsnest and set m_Pcb->m_Ratsnest to NULL * clear m_Pcb->m_FullRatsnest
*/ */
void Build_Pads_Full_List(); void Build_Pads_Full_List();
......
pcbnew/class_netinfo.h
View file @ b1d1a711
...@@ -81,10 +81,10 @@ public: ...@@ -81,10 +81,10 @@ public:
*/ */
void Append( NETINFO_ITEM* aNewElement ); void Append( NETINFO_ITEM* aNewElement );
/** Function Clear /** Function DeleteData
* delete the list of nets (and free memory) * delete the list of nets (and free memory)
*/ */
void Clear(); void DeleteData();
/** Function BuildListOfNets /** Function BuildListOfNets
* initialize the list of NETINFO_ITEM m_NetBuffer * initialize the list of NETINFO_ITEM m_NetBuffer
...@@ -112,9 +112,8 @@ public: ...@@ -112,9 +112,8 @@ public:
int m_NbNoconn; // Ratsnets remaining to route count int m_NbNoconn; // Ratsnets remaining to route count
int m_ForceWidth; // specific width (O = default width) int m_ForceWidth; // specific width (O = default width)
std::vector <D_PAD*> m_ListPad; // List of pads connected to this net std::vector <D_PAD*> m_ListPad; // List of pads connected to this net
RATSNEST_ITEM* m_RatsnestStart; // pointeur sur debut de liste ratsnests du net unsigned m_RatsnestStart; // debut de liste ratsnests du net (included)
RATSNEST_ITEM* m_RatsnestEnd; // pointeur sur fin de liste ratsnests du net unsigned m_RatsnestEnd; // fin de liste ratsnests du net (excluded)
std::vector <RATSNEST_ITEM*> m_ListRatsnest; // List of Ratsnests for this net
NETINFO_ITEM( BOARD_ITEM* aParent ); NETINFO_ITEM( BOARD_ITEM* aParent );
~NETINFO_ITEM(); ~NETINFO_ITEM();
......
pcbnew/class_netinfo_item.cpp
View file @ b1d1a711
...@@ -19,8 +19,8 @@ NETINFO_ITEM::NETINFO_ITEM( BOARD_ITEM* aParent ) ...@@ -19,8 +19,8 @@ NETINFO_ITEM::NETINFO_ITEM( BOARD_ITEM* aParent )
SetNet( 0 ); SetNet( 0 );
m_NbNodes = m_NbLink = m_NbNoconn = 0; m_NbNodes = m_NbLink = m_NbNoconn = 0;
m_ForceWidth = 0; m_ForceWidth = 0;
m_RatsnestStart = NULL; // pointeur sur debut de liste ratsnests du net m_RatsnestStart = 0; // debut de liste ratsnests du net
m_RatsnestEnd = NULL; // pointeur sur fin de liste ratsnests du net m_RatsnestEnd = 0; // fin de liste ratsnests du net
} }
......
pcbnew/class_netinfolist.cpp
View file @ b1d1a711
...@@ -19,7 +19,7 @@ NETINFO_LIST::NETINFO_LIST( BOARD* aParent ) ...@@ -19,7 +19,7 @@ NETINFO_LIST::NETINFO_LIST( BOARD* aParent )
NETINFO_LIST::~NETINFO_LIST() NETINFO_LIST::~NETINFO_LIST()
{ {
Clear(); DeleteData();
} }
...@@ -35,10 +35,10 @@ NETINFO_ITEM* NETINFO_LIST::GetItem( int aNetcode ) ...@@ -35,10 +35,10 @@ NETINFO_ITEM* NETINFO_LIST::GetItem( int aNetcode )
} }
/** Function Clear /** Function DeleteData
* delete the list of nets (and free memory) * delete the list of nets (and free memory)
*/ */
void NETINFO_LIST::Clear() void NETINFO_LIST::DeleteData()
{ {
for( unsigned ii = 0; ii < GetCount(); ii++ ) for( unsigned ii = 0; ii < GetCount(); ii++ )
delete m_NetBuffer[ii]; delete m_NetBuffer[ii];
...@@ -83,7 +83,7 @@ void NETINFO_LIST::BuildListOfNets() ...@@ -83,7 +83,7 @@ void NETINFO_LIST::BuildListOfNets()
int nodes_count = 0; int nodes_count = 0;
NETINFO_ITEM* net_item; NETINFO_ITEM* net_item;
Clear(); // Remove all nets info and free memory DeleteData(); // Remove all nets info and free memory
// Create and add the "unconnected net" // Create and add the "unconnected net"
net_item = new NETINFO_ITEM( m_Parent ); net_item = new NETINFO_ITEM( m_Parent );
...@@ -135,13 +135,12 @@ void BOARD::Build_Pads_Full_List() ...@@ -135,13 +135,12 @@ void BOARD::Build_Pads_Full_List()
/**********************************/ /**********************************/
/** Function Build_Pads_Full_List /** Function Build_Pads_Full_List
* Create the pad list * Create the pad list, sorted by net names
* initialise: * initialise:
* m_Pads (list of pads) * m_Pads (list of pads)
* m_NbNodes = 0
* set m_Status_Pcb = LISTE_PAD_OK; * set m_Status_Pcb = LISTE_PAD_OK;
* and clear for all pads the m_SubRatsnest member; * also clear m_Pcb->m_FullRatsnest that could have bad data
* delete ( free memory) m_Pcb->m_Ratsnest and set m_Pcb->m_Ratsnest to NULL * (m_Pcb->m_FullRatsnest uses pointer to pads)
*/ */
{ {
if( m_Status_Pcb & LISTE_PAD_OK ) if( m_Status_Pcb & LISTE_PAD_OK )
...@@ -149,8 +148,7 @@ void BOARD::Build_Pads_Full_List() ...@@ -149,8 +148,7 @@ void BOARD::Build_Pads_Full_List()
// empty the old list // empty the old list
m_Pads.clear(); m_Pads.clear();
m_FullRatsnest.clear();
m_NbNodes = 0;
/* Clear variables used in rastnest computation */ /* Clear variables used in rastnest computation */
for( MODULE* module = m_Modules; module; module = module->Next() ) for( MODULE* module = m_Modules; module; module = module->Next() )
...@@ -161,20 +159,11 @@ void BOARD::Build_Pads_Full_List() ...@@ -161,20 +159,11 @@ void BOARD::Build_Pads_Full_List()
pad->SetSubRatsnest( 0 ); pad->SetSubRatsnest( 0 );
pad->SetParent( module ); pad->SetParent( module );
if( pad->GetNet() )
m_NbNodes++;
} }
} }
// Sort pad list per net // Sort pad list per net
sort( m_Pads.begin(), m_Pads.end(), PadlistSortByNetnames ); sort( m_Pads.begin(), m_Pads.end(), PadlistSortByNetnames );
if( m_Ratsnest )
{
MyFree( m_Ratsnest );
m_Ratsnest = NULL;
}
m_Status_Pcb = LISTE_PAD_OK; m_Status_Pcb = LISTE_PAD_OK;
} }
pcbnew/class_track.cpp
View file @ b1d1a711
...@@ -886,10 +886,10 @@ void TRACK::DisplayInfo( WinEDA_DrawFrame* frame ) ...@@ -886,10 +886,10 @@ void TRACK::DisplayInfo( WinEDA_DrawFrame* frame )
{ {
/* Display NetName pour les segments de piste type cuivre */ /* Display NetName pour les segments de piste type cuivre */
NETINFO_ITEM* equipot = board->FindNet( GetNet() ); NETINFO_ITEM* net = board->FindNet( GetNet() );
if( equipot ) if( net )
msg = equipot->GetNetname(); msg = net->GetNetname();
else else
msg = wxT( "<noname>" ); msg = wxT( "<noname>" );
......
pcbnew/connect.cpp
View file @ b1d1a711
...@@ -363,7 +363,7 @@ void WinEDA_BasePcbFrame::test_1_net_connexion( wxDC* DC, int net_code ) ...@@ -363,7 +363,7 @@ void WinEDA_BasePcbFrame::test_1_net_connexion( wxDC* DC, int net_code )
/* Display results */ /* Display results */
msg.Printf( wxT( "links %d nc %d net:nc %d" ), msg.Printf( wxT( "links %d nc %d net:nc %d" ),
m_Pcb->m_NbLinks, m_Pcb->GetNumNoconnect(), m_Pcb->GetRatsnestsCount(), m_Pcb->GetNoconnectCount(),
nb_net_noconnect ); nb_net_noconnect );
Affiche_Message( msg ); Affiche_Message( msg );
......
pcbnew/drc.cpp
View file @ b1d1a711
...@@ -302,12 +302,12 @@ void DRC::testUnconnected() ...@@ -302,12 +302,12 @@ void DRC::testUnconnected()
m_mainWindow->Compile_Ratsnest( &dc, TRUE ); m_mainWindow->Compile_Ratsnest( &dc, TRUE );
} }
if( m_pcb->m_Ratsnest == NULL ) if( m_pcb->GetRatsnestsCount() == 0 )
return; return;
RATSNEST_ITEM* rat = m_pcb->m_Ratsnest; for( unsigned ii = 0; ii < m_pcb->GetRatsnestsCount(); ++ii )
for( int i = 0; i<m_pcb->GetNumRatsnests(); ++i, ++rat )
{ {
RATSNEST_ITEM* rat = &m_pcb->m_FullRatsnest[ii];
if( (rat->m_Status & CH_ACTIF) == 0 ) if( (rat->m_Status & CH_ACTIF) == 0 )
continue; continue;
......
pcbnew/editrack-part2.cpp
View file @ b1d1a711
...@@ -43,8 +43,7 @@ void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC ) ...@@ -43,8 +43,7 @@ void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC )
/* Affiche ou efface le chevelu selon l'etat du bouton d'appel */ /* Affiche ou efface le chevelu selon l'etat du bouton d'appel */
{ {
int ii; unsigned ii;
RATSNEST_ITEM* pt_chevelu;
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 ) if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
{ {
...@@ -55,24 +54,23 @@ void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC ) ...@@ -55,24 +54,23 @@ void WinEDA_PcbFrame::Ratsnest_On_Off( wxDC* DC )
DrawGeneralRatsnest( DC, 0 ); /* effacement eventuel du chevelu affiche */ DrawGeneralRatsnest( DC, 0 ); /* effacement eventuel du chevelu affiche */
pt_chevelu = GetBoard()->m_Ratsnest; if( GetBoard()->GetRatsnestsCount() == 0 )
if( pt_chevelu == NULL )
return; return;
if( g_Show_Ratsnest ) if( g_Show_Ratsnest )
{ {
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- ) for( ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
{ {
pt_chevelu->m_Status |= CH_VISIBLE; GetBoard()->m_FullRatsnest[ii].m_Status |= CH_VISIBLE;
} }
DrawGeneralRatsnest( DC, 0 ); DrawGeneralRatsnest( DC, 0 );
} }
else else
{ {
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- ) for( ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
{ {
pt_chevelu->m_Status &= ~CH_VISIBLE; GetBoard()->m_FullRatsnest[ii].m_Status &= ~CH_VISIBLE;
} }
} }
} }
...@@ -344,18 +342,14 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) ...@@ -344,18 +342,14 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
* Efface le chevelu affiche si aucun module ou pad n'est selectionne * Efface le chevelu affiche si aucun module ou pad n'est selectionne
*/ */
{ {
int ii;
RATSNEST_ITEM* pt_chevelu;
D_PAD* pt_pad = NULL; D_PAD* pt_pad = NULL;
MODULE* Module = NULL; MODULE* Module = NULL;
if( g_Show_Ratsnest ) if( g_Show_Ratsnest )
return; // Deja Affich� return;
if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 ) if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
{
Compile_Ratsnest( DC, TRUE ); Compile_Ratsnest( DC, TRUE );
}
if( item ) if( item )
{ {
...@@ -368,24 +362,18 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) ...@@ -368,24 +362,18 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
if( pt_pad ) /* Affichage du chevelu du net correspondant */ if( pt_pad ) /* Affichage du chevelu du net correspondant */
{ {
pt_pad->DisplayInfo( this ); pt_pad->DisplayInfo( this );
pt_chevelu = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest; for( unsigned ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{ {
if( pt_chevelu->GetNet() == pt_pad->GetNet() ) RATSNEST_ITEM* net = &GetBoard()->m_FullRatsnest[ii];
if( net->GetNet() == pt_pad->GetNet() )
{ {
if( (pt_chevelu->m_Status & CH_VISIBLE) != 0 ) if( (net->m_Status & CH_VISIBLE) != 0 )
continue; continue;
pt_chevelu->m_Status |= CH_VISIBLE; net->m_Status |= CH_VISIBLE;
if( (pt_chevelu->m_Status & CH_ACTIF) == 0 ) if( (net->m_Status & CH_ACTIF) == 0 )
continue; continue;
GRSetDrawMode( DC, GR_XOR ); net->Draw( DrawPanel, DC, GR_XOR, wxPoint(0,0) );
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->m_PadStart->m_Pos.x,
pt_chevelu->m_PadStart->m_Pos.y,
pt_chevelu->m_PadEnd->m_Pos.x,
pt_chevelu->m_PadEnd->m_Pos.y,
0,
g_DesignSettings.m_RatsnestColor );
} }
} }
} }
...@@ -407,26 +395,19 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) ...@@ -407,26 +395,19 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
pt_pad = Module->m_Pads; pt_pad = Module->m_Pads;
for( ; pt_pad != NULL; pt_pad = (D_PAD*) pt_pad->Next() ) for( ; pt_pad != NULL; pt_pad = (D_PAD*) pt_pad->Next() )
{ {
pt_chevelu = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest; for( unsigned ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{ {
if( (pt_chevelu->m_PadStart == pt_pad) RATSNEST_ITEM* net = &GetBoard()->m_FullRatsnest[ii];
|| (pt_chevelu->m_PadEnd == pt_pad) ) if( (net->m_PadStart == pt_pad) || (net->m_PadEnd == pt_pad) )
{ {
if( pt_chevelu->m_Status & CH_VISIBLE ) if( net->m_Status & CH_VISIBLE )
continue; continue;
pt_chevelu->m_Status |= CH_VISIBLE; net->m_Status |= CH_VISIBLE;
if( (pt_chevelu->m_Status & CH_ACTIF) == 0 ) if( (net->m_Status & CH_ACTIF) == 0 )
continue; continue;
GRSetDrawMode( DC, GR_XOR ); net->Draw( DrawPanel, DC, GR_XOR, wxPoint(0,0) );
GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->m_PadStart->m_Pos.x,
pt_chevelu->m_PadStart->m_Pos.y,
pt_chevelu->m_PadEnd->m_Pos.x,
pt_chevelu->m_PadEnd->m_Pos.y,
0,
g_DesignSettings.m_RatsnestColor );
} }
} }
} }
...@@ -436,15 +417,13 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) ...@@ -436,15 +417,13 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
} }
} }
/* Effacement complet des selections /* Effacement complet des selections si aucun pad ou module n'a ete localise */
* si aucun pad ou module n'a ete localise */
if( (pt_pad == NULL) && (Module == NULL) ) if( (pt_pad == NULL) && (Module == NULL) )
{ {
DrawGeneralRatsnest( DC ); DrawGeneralRatsnest( DC );
pt_chevelu = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
for( ii = GetBoard()->GetNumRatsnests(); (ii > 0) && pt_chevelu; pt_chevelu++, ii-- ) for( unsigned ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
pt_chevelu->m_Status &= ~CH_VISIBLE; GetBoard()->m_FullRatsnest[ii].m_Status &= ~CH_VISIBLE;
} }
} }
...@@ -453,27 +432,16 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC ) ...@@ -453,27 +432,16 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
void WinEDA_PcbFrame::Affiche_PadsNoConnect( wxDC* DC ) void WinEDA_PcbFrame::Affiche_PadsNoConnect( wxDC* DC )
/*****************************************************/ /*****************************************************/
/* Met en surbrillance les pads non encore connectes ( correspondants aux /* Hight light the unconnected pads
* chevelus actifs
*/ */
{ {
int ii; for( unsigned ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
RATSNEST_ITEM* pt_chevelu;
D_PAD* pt_pad;
pt_chevelu = (RATSNEST_ITEM*) GetBoard()->m_Ratsnest;
for( ii = GetBoard()->GetNumRatsnests(); ii > 0; pt_chevelu++, ii-- )
{ {
if( (pt_chevelu->m_Status & CH_ACTIF) == 0 ) RATSNEST_ITEM* net = &GetBoard()->m_FullRatsnest[ii];
if( (net->m_Status & CH_ACTIF) == 0 )
continue; continue;
pt_pad = pt_chevelu->m_PadStart; net->m_PadStart->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
net->m_PadEnd->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
if( pt_pad )
pt_pad->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
pt_pad = pt_chevelu->m_PadEnd;
if( pt_pad )
pt_pad->Draw( DrawPanel, DC, GR_OR | GR_SURBRILL );
} }
} }
pcbnew/files.cpp
View file @ b1d1a711
...@@ -263,10 +263,11 @@ int WinEDA_PcbFrame::LoadOnePcbFile( const wxString& FullFileName, bool Append ) ...@@ -263,10 +263,11 @@ int WinEDA_PcbFrame::LoadOnePcbFile( const wxString& FullFileName, bool Append )
/* Rebuild the new pad list (for drc and ratsnet control ...) */ /* Rebuild the new pad list (for drc and ratsnet control ...) */
GetBoard()->m_Status_Pcb = 0; GetBoard()->m_Status_Pcb = 0;
GetBoard()->Build_Pads_Full_List();
DrawPanel->Refresh( true);
Compile_Ratsnest( NULL, true );
GetBoard()->DisplayInfo( this ); GetBoard()->DisplayInfo( this );
DrawPanel->Refresh( true);
/* reset the auto save timer */ /* reset the auto save timer */
g_SaveTime = time( NULL ); g_SaveTime = time( NULL );
......
pcbnew/initpcb.cpp
View file @ b1d1a711
...@@ -279,10 +279,12 @@ void WinEDA_PcbFrame::Erase_Modules( bool query ) ...@@ -279,10 +279,12 @@ void WinEDA_PcbFrame::Erase_Modules( bool query )
GetBoard()->m_Modules.DeleteAll(); GetBoard()->m_Modules.DeleteAll();
GetBoard()->m_Status_Pcb = 0; GetBoard()->m_Status_Pcb = 0;
m_Pcb->m_Pads.clear(); // empty the pad list pointers
m_Pcb->m_NetInfo->DeleteData();
m_Pcb->m_FullRatsnest.clear(); // empty the pad list pointers
m_Pcb->m_LocalRatsnest.clear(); // empty the pad list pointers
GetBoard()->m_NbNodes = 0; GetBoard()->m_NbNodes = 0;
GetBoard()->m_NbLinks = 0;
GetBoard()->m_NbNoconnect = 0; GetBoard()->m_NbNoconnect = 0;
m_Pcb->m_Pads.clear(); // empty the pad list pointers
GetScreen()->SetModify(); GetScreen()->SetModify();
} }
......
pcbnew/ioascii.cpp
View file @ b1d1a711
...@@ -208,8 +208,7 @@ int WinEDA_BasePcbFrame::ReadGeneralDescrPcb( FILE* File, int* LineNum ) ...@@ -208,8 +208,7 @@ int WinEDA_BasePcbFrame::ReadGeneralDescrPcb( FILE* File, int* LineNum )
if( strnicmp( data, "Links", 5 ) == 0 ) if( strnicmp( data, "Links", 5 ) == 0 )
{ {
data = strtok( NULL, " =\n\r" ); // Info only, do nothing
GetBoard()->m_NbLinks = atoi( data );
continue; continue;
} }
...@@ -571,7 +570,7 @@ bool WinEDA_PcbFrame::WriteGeneralDescrPcb( FILE* File ) ...@@ -571,7 +570,7 @@ bool WinEDA_PcbFrame::WriteGeneralDescrPcb( FILE* File )
// Write old format for Layer count (for compatibility with old versions of pcbnew // Write old format for Layer count (for compatibility with old versions of pcbnew
fprintf( File, "Ly %8X\n", g_TabAllCopperLayerMask[NbLayers - 1] | ALL_NO_CU_LAYERS ); // For compatibility with old version of pcbnew fprintf( File, "Ly %8X\n", g_TabAllCopperLayerMask[NbLayers - 1] | ALL_NO_CU_LAYERS ); // For compatibility with old version of pcbnew
fprintf( File, "Links %d\n", GetBoard()->m_NbLinks ); fprintf( File, "Links %d\n", GetBoard()->GetRatsnestsCount() );
fprintf( File, "NoConn %d\n", GetBoard()->m_NbNoconnect ); fprintf( File, "NoConn %d\n", GetBoard()->m_NbNoconnect );
/* Write Bounding box info */ /* Write Bounding box info */
...@@ -872,10 +871,7 @@ int WinEDA_PcbFrame::ReadPcbFile( FILE* File, bool Append ) ...@@ -872,10 +871,7 @@ int WinEDA_PcbFrame::ReadPcbFile( FILE* File, bool Append )
BestZoom(); BestZoom();
#ifdef PCBNEW GetBoard()->m_Status_Pcb = 0;
// Build connectivity info
Compile_Ratsnest( NULL, TRUE );
#endif
return 1; return 1;
} }
......
pcbnew/pcbframe.cpp
View file @ b1d1a711
...@@ -102,7 +102,7 @@ BEGIN_EVENT_TABLE( WinEDA_PcbFrame, WinEDA_BasePcbFrame ) ...@@ -102,7 +102,7 @@ BEGIN_EVENT_TABLE( WinEDA_PcbFrame, WinEDA_BasePcbFrame )
EVT_MENU( ID_PCB_GEN_BOM_FILE_FROM_BOARD, WinEDA_PcbFrame::RecreateBOMFileFromBoard ) EVT_MENU( ID_PCB_GEN_BOM_FILE_FROM_BOARD, WinEDA_PcbFrame::RecreateBOMFileFromBoard )
// menu Miscellaneous // menu Miscellaneous
EVT_MENU( ID_MENU_LIST_NETS, WinEDA_PcbFrame::Liste_Equipot ) EVT_MENU( ID_MENU_LIST_NETS, WinEDA_PcbFrame::ListNetsAndSelect )
EVT_MENU( ID_PCB_GLOBAL_DELETE, WinEDA_PcbFrame::Process_Special_Functions ) EVT_MENU( ID_PCB_GLOBAL_DELETE, WinEDA_PcbFrame::Process_Special_Functions )
EVT_MENU( ID_MENU_PCB_CLEAN, WinEDA_PcbFrame::Process_Special_Functions ) EVT_MENU( ID_MENU_PCB_CLEAN, WinEDA_PcbFrame::Process_Special_Functions )
EVT_MENU( ID_MENU_PCB_SWAP_LAYERS, EVT_MENU( ID_MENU_PCB_SWAP_LAYERS,
......
pcbnew/pcbnew.cpp
View file @ b1d1a711
...@@ -40,11 +40,6 @@ bool g_TwoSegmentTrackBuild = TRUE; ...@@ -40,11 +40,6 @@ bool g_TwoSegmentTrackBuild = TRUE;
bool g_HightLigt_Status; bool g_HightLigt_Status;
extern PARAM_CFG_BASE* ParamCfgList[]; extern PARAM_CFG_BASE* ParamCfgList[];
/* A buffer used in some computations (will be removed in next cleanup code,
* DO NOT use) */
#define BUFMEMSIZE 256000 /* buffer size (in bytes) */
char* adr_lowmem = NULL;
int Angle_Rot_Module; int Angle_Rot_Module;
int ModuleSegmentWidth; int ModuleSegmentWidth;
int ModuleTextWidth; int ModuleTextWidth;
...@@ -140,15 +135,6 @@ Changing extension to .brd." ), ...@@ -140,15 +135,6 @@ Changing extension to .brd." ),
* real hotkeys in menus or tool tips */ * real hotkeys in menus or tool tips */
/* allocation de la memoire pour le fichier et autres buffers: */
/* On reserve BUFMEMSIZE octets de ram pour calcul */
adr_lowmem = (char*) MyZMalloc( BUFMEMSIZE ); /* adresse de la zone de calcul */
if( adr_lowmem == NULL )
{
printf( "No Memory, Fatal err Memory alloc\n" );
return FALSE;
}
frame = new WinEDA_PcbFrame( NULL, wxT( "PcbNew" ), frame = new WinEDA_PcbFrame( NULL, wxT( "PcbNew" ),
wxPoint( 0, 0 ), wxSize( 600, 400 ) ); wxPoint( 0, 0 ), wxSize( 600, 400 ) );
frame->SetTitle( GetTitle() + wxT( " " ) + GetBuildVersion() ); frame->SetTitle( GetTitle() + wxT( " " ) + GetBuildVersion() );
......
pcbnew/ratsnest.cpp
View file @ b1d1a711
...@@ -13,20 +13,11 @@ ...@@ -13,20 +13,11 @@
#include "protos.h" #include "protos.h"
extern char* adr_lowmem; /* adresse de base memoire de calcul disponible */
/* exported variables */
RATSNEST_ITEM* g_pt_chevelu;
RATSNEST_ITEM* local_liste_chevelu; // Buffer address for local ratsnest
// (ratnest relative to one footprint while moving it
int nb_local_chevelu; // link count (active ratnest count) for the footprint beeing moved
/* local variables */ /* local variables */
static int nb_pads_ref; // node count (node = pad with a net code) for the footprint beeing moved static std::vector <D_PAD*> s_localPadBuffer; // for local ratsnest calculations when moving a footprint: buffer of pads to consider
static int nb_pads_externes; // Connected pads count ( pads which are
// in other footprints and connected to a pad of the footprint beeing moved static bool DisplayRastnestInProgress; // Enable the display of the ratsnest during the ratsnest computations
static bool DisplayRastnestInProgress; // Enable the display of the ratsnest during the ratsnest computations
/* Note about the ratsnest computation: /* Note about the ratsnest computation:
* Building the general ratsnest: * Building the general ratsnest:
...@@ -152,7 +143,7 @@ void WinEDA_BasePcbFrame::Compile_Ratsnest( wxDC* DC, bool display_status_pcb ) ...@@ -152,7 +143,7 @@ void WinEDA_BasePcbFrame::Compile_Ratsnest( wxDC* DC, bool display_status_pcb )
Tst_Ratsnest( DC, 0 ); Tst_Ratsnest( DC, 0 );
// Redraw the active ratsnest ( if enabled ) // Redraw the active ratsnest ( if enabled )
if( g_Show_Ratsnest ) if( g_Show_Ratsnest && DC )
DrawGeneralRatsnest( DC, 0 ); DrawGeneralRatsnest( DC, 0 );
if( display_status_pcb ) if( display_status_pcb )
...@@ -161,7 +152,7 @@ void WinEDA_BasePcbFrame::Compile_Ratsnest( wxDC* DC, bool display_status_pcb ) ...@@ -161,7 +152,7 @@ void WinEDA_BasePcbFrame::Compile_Ratsnest( wxDC* DC, bool display_status_pcb )
/*****************************************************************/ /*****************************************************************/
static int tri_par_net( const void* o1, const void* o2 ) static int sortByNetcode( const void* o1, const void* o2 )
/****************************************************************/ /****************************************************************/
/* Sort function used by QSORT /* Sort function used by QSORT
...@@ -191,8 +182,10 @@ static int sort_by_length( const void* o1, const void* o2 ) ...@@ -191,8 +182,10 @@ static int sort_by_length( const void* o1, const void* o2 )
/*****************************************************************************/ /*****************************************************************************/
static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, static int gen_rats_block_to_block( WinEDA_DrawPanel* aDrawPanel,
D_PAD** pt_liste_pad, D_PAD** pt_limite, int* nblinks ) std::vector<RATSNEST_ITEM>& aRatsnestBuffer,
D_PAD** aPadList,
D_PAD** aPadMax )
/*****************************************************************************/ /*****************************************************************************/
/** /**
...@@ -203,11 +196,9 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -203,11 +196,9 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
* the block n ( n > 1 ) it connected to block 1 by their 2 nearest pads. * the block n ( n > 1 ) it connected to block 1 by their 2 nearest pads.
* When the block is found, it is merged with the block 1 * When the block is found, it is merged with the block 1
* the D_PAD member m_SubRatsnest handles the block number * the D_PAD member m_SubRatsnest handles the block number
* @param pt_liste_pad = starting address (within the pad list) for search * @param aPadList = starting address (within the pad list) for search
* @param pt_limite = ending address (within the pad list) for search * @param aPadMax = ending address (within the pad list) for search
* return in global variables: * @param aRatsnestBuffer = a std::vector<RATSNEST_ITEM> buffer to fill with new ratsnest items
* ratsnest list in buffer
* g_pt_chevelu updated to the first free memory location
* @return blocks not connected count * @return blocks not connected count
*/ */
{ {
...@@ -222,15 +213,12 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -222,15 +213,12 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
dist_min = 0x7FFFFFFF; dist_min = 0x7FFFFFFF;
pt_start_liste = pt_liste_pad; pt_start_liste = aPadList;
if( DC )
GRSetDrawMode( DC, GR_XOR );
/* Search the nearest pad from block 1 */ /* Search the nearest pad from block 1 */
for( ; pt_liste_pad < pt_limite; pt_liste_pad++ ) for( ; aPadList < aPadMax; aPadList++ )
{ {
D_PAD* ref_pad = *pt_liste_pad; D_PAD* ref_pad = *aPadList;
/* search a pad which is in the block 1 */ /* search a pad which is in the block 1 */
if( ref_pad->GetSubRatsnest() != 1 ) if( ref_pad->GetSubRatsnest() != 1 )
...@@ -241,7 +229,7 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -241,7 +229,7 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
{ {
D_PAD* curr_pad = *pt_liste_pad_aux; D_PAD* curr_pad = *pt_liste_pad_aux;
if( pt_liste_pad_aux >= pt_limite ) if( pt_liste_pad_aux >= aPadMax )
break; break;
if( curr_pad->GetSubRatsnest() == 1 ) // not in an other block if( curr_pad->GetSubRatsnest() == 1 ) // not in an other block
...@@ -259,7 +247,7 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -259,7 +247,7 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
dist_min = current_dist; dist_min = current_dist;
pt_liste_pad_tmp = pt_liste_pad_aux; pt_liste_pad_tmp = pt_liste_pad_aux;
pt_liste_pad_block1 = pt_liste_pad; pt_liste_pad_block1 = aPadList;
} }
} }
} }
...@@ -274,35 +262,33 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -274,35 +262,33 @@ static int gen_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
/* The block n is merged with the bloc 1 : /* The block n is merged with the bloc 1 :
* to do that, we set the m_SubRatsnest member to 1 for all pads in block n * to do that, we set the m_SubRatsnest member to 1 for all pads in block n
*/ */
for( pt_liste_pad = pt_start_liste; pt_liste_pad < pt_limite; pt_liste_pad++ ) for( aPadList = pt_start_liste; aPadList < aPadMax; aPadList++ )
{ {
if( (*pt_liste_pad)->GetSubRatsnest() == current_num_block ) if( (*aPadList)->GetSubRatsnest() == current_num_block )
(*pt_liste_pad)->SetSubRatsnest( 1 ); (*aPadList)->SetSubRatsnest( 1 );
} }
pt_liste_pad = pt_liste_pad_block1; aPadList = pt_liste_pad_block1;
/* Create the new ratsnet */ /* Create the new ratsnet */
(*nblinks)++; RATSNEST_ITEM net;
g_pt_chevelu->SetNet( (*pt_liste_pad)->GetNet() ); net.SetNet( (*aPadList)->GetNet() );
g_pt_chevelu->m_Status = CH_ACTIF | CH_VISIBLE; net.m_Status = CH_ACTIF | CH_VISIBLE;
g_pt_chevelu->m_Lenght = dist_min; net.m_Lenght = dist_min;
g_pt_chevelu->m_PadStart = *pt_liste_pad; net.m_PadStart = *aPadList;
g_pt_chevelu->m_PadEnd = *pt_liste_pad_tmp; net.m_PadEnd = *pt_liste_pad_tmp;
aRatsnestBuffer.push_back( net );
if( DisplayRastnestInProgress && DC )
g_pt_chevelu->Draw( DrawPanel, DC, GR_XOR, wxPoint( 0, 0 ) );
g_pt_chevelu++;
} }
return current_num_block; return current_num_block;
} }
/*****************************************************************************/ /*****************************************************************************/
static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC, static int gen_rats_pad_to_pad( WinEDA_DrawPanel* aDrawPanel,
D_PAD** pt_liste_pad, vector<RATSNEST_ITEM>& aRatsnestBuffer,
D_PAD** pt_limite, int current_num_block, int* nblinks ) D_PAD** aPadList,
D_PAD** aPadMax,
int current_num_block )
/*****************************************************************************/ /*****************************************************************************/
/** /**
...@@ -317,14 +303,10 @@ static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -317,14 +303,10 @@ static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
* @param pt_liste_pad = starting address in the pad buffer * @param pt_liste_pad = starting address in the pad buffer
* @param pt_limite = ending address * @param pt_limite = ending address
* @param current_num_block = Last existing block number de pads * @param current_num_block = Last existing block number de pads
* These block are created by the existing tracks analysis * These block are created by the existing tracks analysis
* @param aRatsnestBuffer = a std::vector<RATSNEST_ITEM> buffer to fill with new ratsnest items
* *
* output: * @return the last block number used
* Ratsnest list
* g_pt_chevelu updated to the first free memory address
*
* @return:
* last block number used
*/ */
{ {
int dist_min, current_dist; int dist_min, current_dist;
...@@ -333,11 +315,11 @@ static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -333,11 +315,11 @@ static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
D_PAD** pt_start_liste; D_PAD** pt_start_liste;
D_PAD* ref_pad, * pad; D_PAD* ref_pad, * pad;
pt_start_liste = pt_liste_pad; pt_start_liste = aPadList;
for( ; pt_liste_pad < pt_limite; pt_liste_pad++ ) for( ; aPadList < aPadMax; aPadList++ )
{ {
ref_pad = *pt_liste_pad; ref_pad = *aPadList;
if( ref_pad->GetSubRatsnest() ) if( ref_pad->GetSubRatsnest() )
continue; // Pad already connected continue; // Pad already connected
...@@ -347,10 +329,10 @@ static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -347,10 +329,10 @@ static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
for( pt_liste_pad_aux = pt_start_liste; ; pt_liste_pad_aux++ ) for( pt_liste_pad_aux = pt_start_liste; ; pt_liste_pad_aux++ )
{ {
if( pt_liste_pad_aux >= pt_limite ) if( pt_liste_pad_aux >= aPadMax )
break; break;
if( pt_liste_pad_aux == pt_liste_pad ) if( pt_liste_pad_aux == aPadList )
continue; continue;
pad = *pt_liste_pad_aux; pad = *pt_liste_pad_aux;
...@@ -385,17 +367,14 @@ static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC, ...@@ -385,17 +367,14 @@ static int gen_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC,
ref_pad->SetSubRatsnest( pad->GetSubRatsnest() ); ref_pad->SetSubRatsnest( pad->GetSubRatsnest() );
} }
(*nblinks)++; /* Create the new ratsnet item */
g_pt_chevelu->SetNet( ref_pad->GetNet() ); RATSNEST_ITEM rast;
g_pt_chevelu->m_Status = CH_ACTIF | CH_VISIBLE; rast.SetNet( ref_pad->GetNet() );
g_pt_chevelu->m_Lenght = dist_min; rast.m_Status = CH_ACTIF | CH_VISIBLE;
g_pt_chevelu->m_PadStart = ref_pad; rast.m_Lenght = dist_min;
g_pt_chevelu->m_PadEnd = pad; rast.m_PadStart = ref_pad;
rast.m_PadEnd = pad;
if( DisplayRastnestInProgress && DC ) aRatsnestBuffer.push_back( rast );
g_pt_chevelu->Draw( DrawPanel, DC, GR_XOR, wxPoint( 0, 0 ) );
g_pt_chevelu++;
} }
} }
...@@ -437,12 +416,8 @@ void WinEDA_BasePcbFrame::Build_Board_Ratsnest( wxDC* DC ) ...@@ -437,12 +416,8 @@ void WinEDA_BasePcbFrame::Build_Board_Ratsnest( wxDC* DC )
int noconn; int noconn;
m_Pcb->m_NbNoconnect = 0; m_Pcb->m_NbNoconnect = 0;
m_Pcb->m_NbLinks = 0;
if( m_Pcb->m_Ratsnest )
MyFree( m_Pcb->m_Ratsnest );
m_Pcb->m_Ratsnest = NULL;
m_Pcb->m_FullRatsnest.clear();
if( m_Pcb->m_Pads.size() == 0 ) if( m_Pcb->m_Pads.size() == 0 )
return; return;
...@@ -457,22 +432,11 @@ void WinEDA_BasePcbFrame::Build_Board_Ratsnest( wxDC* DC ) ...@@ -457,22 +432,11 @@ void WinEDA_BasePcbFrame::Build_Board_Ratsnest( wxDC* DC )
pad->SetSubRatsnest( 0 ); pad->SetSubRatsnest( 0 );
} }
/* Allocate memory for buffer ratsnest: there are nb_nodes - 1 ratsnest if( m_Pcb->GetNodesCount() == 0 )
* maximum ( 1 node = 1 active pad ).
* Memory is allocated for nb_nodes ratsnests... (+ a bit more, just in case)
* The real ratsnests count nb_links < nb_nodes
*/
if( m_Pcb->m_NbNodes == 0 )
return; /* pas de connexions utiles */ return; /* pas de connexions utiles */
m_Pcb->m_Ratsnest =
(RATSNEST_ITEM*) MyZMalloc( (m_Pcb->m_NbNodes + 10 ) * sizeof(RATSNEST_ITEM) );
if( m_Pcb->m_Ratsnest == NULL )
return;
/* Ratsnest computation */ /* Ratsnest computation */
DisplayRastnestInProgress = TRUE; DisplayRastnestInProgress = TRUE;
g_pt_chevelu = m_Pcb->m_Ratsnest;
unsigned current_net_code = 1; // 1er net_code a analyser (net_code = 0 -> no connect) unsigned current_net_code = 1; // 1er net_code a analyser (net_code = 0 -> no connect)
noconn = 0; noconn = 0;
...@@ -480,10 +444,14 @@ void WinEDA_BasePcbFrame::Build_Board_Ratsnest( wxDC* DC ) ...@@ -480,10 +444,14 @@ void WinEDA_BasePcbFrame::Build_Board_Ratsnest( wxDC* DC )
for( ; current_net_code < m_Pcb->m_NetInfo->GetCount(); current_net_code++ ) for( ; current_net_code < m_Pcb->m_NetInfo->GetCount(); current_net_code++ )
{ {
NETINFO_ITEM* net = m_Pcb->FindNet( current_net_code ); NETINFO_ITEM* net = m_Pcb->FindNet( current_net_code );
net->m_RatsnestStart = g_pt_chevelu; if ( net == NULL ) //Should not occur
m_Pcb->m_NbLinks += net->m_ListPad.size() - 1; {
DisplayError(this,wxT("Build_Board_Ratsnest() error: net not found") );
return;
}
net->m_RatsnestStart = m_Pcb->GetRatsnestsCount();
int num_block = 0; int num_block = 0;
for( unsigned ii = 0; ii < net->m_ListPad.size(); ii++ ) for( unsigned ii = 0; ii < net->m_ListPad.size(); ii++ )
{ {
pad = net->m_ListPad[ii]; pad = net->m_ListPad[ii];
...@@ -496,36 +464,38 @@ void WinEDA_BasePcbFrame::Build_Board_Ratsnest( wxDC* DC ) ...@@ -496,36 +464,38 @@ void WinEDA_BasePcbFrame::Build_Board_Ratsnest( wxDC* DC )
/* a - first pass : create the blocks from not already in block pads */ /* a - first pass : create the blocks from not already in block pads */
D_PAD** pstart = &net->m_ListPad[0]; D_PAD** pstart = &net->m_ListPad[0];
D_PAD** pend = pstart + net->m_ListPad.size(); D_PAD** pend = pstart + net->m_ListPad.size();
int icnt = gen_rats_pad_to_pad( DrawPanel, DC, pstart, pend, int icnt = gen_rats_pad_to_pad( DrawPanel, m_Pcb->m_FullRatsnest, pstart, pend,
num_block, &noconn ); num_block );
/* b - blocks connection (Iteration) */ /* b - blocks connection (Iteration) */
while( icnt > 1 ) while( icnt > 1 )
{ {
icnt = gen_rats_block_to_block( DrawPanel, DC, pstart, pend, &noconn ); icnt = gen_rats_block_to_block( DrawPanel, m_Pcb->m_FullRatsnest, pstart, pend );
} }
net->m_RatsnestEnd = g_pt_chevelu; net->m_RatsnestEnd = m_Pcb->GetRatsnestsCount();
/* sort by lenght */ /* sort by lenght */
qsort( net->m_RatsnestStart, if( (net->m_RatsnestEnd - net->m_RatsnestStart) > 1 )
net->m_RatsnestEnd - net->m_RatsnestStart, {
sizeof(RATSNEST_ITEM), RATSNEST_ITEM* rats = &m_Pcb->m_FullRatsnest[0];
sort_by_length ); qsort( rats + net->m_RatsnestStart,
net->m_RatsnestEnd - net->m_RatsnestStart,
sizeof(RATSNEST_ITEM), sort_by_length );
}
} }
m_Pcb->m_NbNoconnect = noconn; m_Pcb->m_NbNoconnect = noconn;
m_Pcb->m_Status_Pcb |= LISTE_RATSNEST_ITEM_OK; m_Pcb->m_Status_Pcb |= LISTE_RATSNEST_ITEM_OK;
// erase the ratsnest displayed on screen if needed // erase the ratsnest displayed on screen if needed
RATSNEST_ITEM* Chevelu = m_Pcb->m_Ratsnest; for( unsigned ii = 0; ii < m_Pcb->GetRatsnestsCount(); ii++ )
for( int ii = m_Pcb->GetNumRatsnests(); ii > 0 && Chevelu; ii--, Chevelu++ )
{ {
if( !g_Show_Ratsnest ) if( !g_Show_Ratsnest ) // Clear VISIBLE flag
Chevelu->m_Status &= ~CH_VISIBLE; m_Pcb->m_FullRatsnest[ii].m_Status &= ~CH_VISIBLE;
if( DC ) if( DC )
Chevelu->Draw( DrawPanel, DC, GR_XOR, wxPoint( 0, 0 ) ); m_Pcb->m_FullRatsnest[ii].Draw( DrawPanel, DC, GR_XOR, wxPoint( 0, 0 ) );
} }
} }
...@@ -552,9 +522,6 @@ void WinEDA_BasePcbFrame::DrawGeneralRatsnest( wxDC* DC, int net_code ) ...@@ -552,9 +522,6 @@ void WinEDA_BasePcbFrame::DrawGeneralRatsnest( wxDC* DC, int net_code )
* @param netcode if > 0, Display only the ratsnest relative to the correponding net_code * @param netcode if > 0, Display only the ratsnest relative to the correponding net_code
*/ */
{ {
int ii;
RATSNEST_ITEM* Chevelu;
if( (m_Pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 ) if( (m_Pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
return; return;
if( (m_Pcb->m_Status_Pcb & DO_NOT_SHOW_GENERAL_RASTNEST) ) if( (m_Pcb->m_Status_Pcb & DO_NOT_SHOW_GENERAL_RASTNEST) )
...@@ -562,23 +529,19 @@ void WinEDA_BasePcbFrame::DrawGeneralRatsnest( wxDC* DC, int net_code ) ...@@ -562,23 +529,19 @@ void WinEDA_BasePcbFrame::DrawGeneralRatsnest( wxDC* DC, int net_code )
if( DC == NULL ) if( DC == NULL )
return; return;
Chevelu = m_Pcb->m_Ratsnest; for( unsigned ii = 0; ii < m_Pcb->GetRatsnestsCount(); ii++ )
if( Chevelu == NULL )
return;
for( ii = m_Pcb->GetNumRatsnests(); ii > 0; Chevelu++, ii-- )
{ {
if( ( Chevelu->m_Status & (CH_VISIBLE | CH_ACTIF) ) != (CH_VISIBLE | CH_ACTIF) ) if( ( m_Pcb->m_FullRatsnest[ii].m_Status & (CH_VISIBLE | CH_ACTIF) ) != (CH_VISIBLE | CH_ACTIF) )
continue; continue;
if( (net_code <= 0) || ( net_code == Chevelu->GetNet() ) ) if( (net_code <= 0) || ( net_code == m_Pcb->m_FullRatsnest[ii].GetNet() ) )
Chevelu->Draw( DrawPanel, DC, GR_XOR, wxPoint( 0, 0 ) ); m_Pcb->m_FullRatsnest[ii].Draw( DrawPanel, DC, GR_XOR, wxPoint( 0, 0 ) );
} }
} }
/**********************************************************************************************/ /**********************************************************************************************/
static int tst_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, NETINFO_ITEM* net ) static int tst_rats_block_to_block( NETINFO_ITEM* net, vector<RATSNEST_ITEM>& aRatsnestBuffer )
/**********************************************************************************************/ /**********************************************************************************************/
/** /**
...@@ -599,30 +562,31 @@ static int tst_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, NETIN ...@@ -599,30 +562,31 @@ static int tst_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, NETIN
*/ */
{ {
int current_num_block, min_block; int current_num_block, min_block;
RATSNEST_ITEM* chevelu, * min_chevelu; RATSNEST_ITEM* rats, * min_rats;
/* Search a link from a block to an other block */ /* Search a link from a block to an other block */
min_chevelu = NULL; min_rats = NULL;
for( chevelu = net->m_RatsnestStart; chevelu < net->m_RatsnestEnd; chevelu++ ) for( unsigned ii = net->m_RatsnestStart; ii < net->m_RatsnestEnd; ii++ )
{ {
if( chevelu->m_PadStart->GetSubRatsnest() == chevelu->m_PadEnd->GetSubRatsnest() ) // Same block rats = &aRatsnestBuffer[ii];
if( rats->m_PadStart->GetSubRatsnest() == rats->m_PadEnd->GetSubRatsnest() ) // Same block
continue; continue;
if( min_chevelu == NULL ) if( min_rats == NULL )
min_chevelu = chevelu; min_rats = rats;
else if( min_chevelu->m_Lenght > chevelu->m_Lenght ) else if( min_rats->m_Lenght > rats->m_Lenght )
min_chevelu = chevelu; min_rats = rats;
} }
if( min_chevelu == NULL ) if( min_rats == NULL )
return 1; return 1;
/* At this point we have found a link between 2 differents blocks (clusters) : /* At this point we have found a link between 2 differents blocks (clusters) :
* we must set its status to ACTIVE and merge the 2 blocks * we must set its status to ACTIVE and merge the 2 blocks
*/ */
min_chevelu->m_Status |= CH_ACTIF; min_rats->m_Status |= CH_ACTIF;
current_num_block = min_chevelu->m_PadStart->GetSubRatsnest(); current_num_block = min_rats->m_PadStart->GetSubRatsnest();
min_block = min_chevelu->m_PadEnd->GetSubRatsnest(); min_block = min_rats->m_PadEnd->GetSubRatsnest();
if( min_block > current_num_block ) if( min_block > current_num_block )
EXCHG( min_block, current_num_block ); EXCHG( min_block, current_num_block );
...@@ -641,8 +605,7 @@ static int tst_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, NETIN ...@@ -641,8 +605,7 @@ static int tst_rats_block_to_block( WinEDA_DrawPanel* DrawPanel, wxDC* DC, NETIN
/*********************************************************************/ /*********************************************************************/
static int tst_rats_pad_to_pad( WinEDA_DrawPanel* DrawPanel, wxDC* DC, static int tst_rats_pad_to_pad( int current_num_block,
int current_num_block,
RATSNEST_ITEM* start_rat_list, RATSNEST_ITEM* end_rat_list ) RATSNEST_ITEM* start_rat_list, RATSNEST_ITEM* end_rat_list )
/**********************************************************************/ /**********************************************************************/
...@@ -709,9 +672,8 @@ void WinEDA_BasePcbFrame::Tst_Ratsnest( wxDC* DC, int ref_netcode ) ...@@ -709,9 +672,8 @@ void WinEDA_BasePcbFrame::Tst_Ratsnest( wxDC* DC, int ref_netcode )
* if ref_netcode == 0, test all nets, else test only ref_netcode * if ref_netcode == 0, test all nets, else test only ref_netcode
*/ */
{ {
RATSNEST_ITEM* chevelu; RATSNEST_ITEM* rats;
D_PAD* pad; D_PAD* pad;
int net_code;
NETINFO_ITEM* net; NETINFO_ITEM* net;
if( m_Pcb->m_Pads.size() == 0 ) if( m_Pcb->m_Pads.size() == 0 )
...@@ -719,11 +681,14 @@ void WinEDA_BasePcbFrame::Tst_Ratsnest( wxDC* DC, int ref_netcode ) ...@@ -719,11 +681,14 @@ void WinEDA_BasePcbFrame::Tst_Ratsnest( wxDC* DC, int ref_netcode )
if( (m_Pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 ) if( (m_Pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
Build_Board_Ratsnest( DC ); Build_Board_Ratsnest( DC );
for( net_code = 1; ; net_code++ ) for( int net_code = 1; net_code < (int) m_Pcb->m_NetInfo->GetCount(); net_code++ )
{ {
net = m_Pcb->FindNet( net_code ); net = m_Pcb->FindNet( net_code );
if( net == NULL ) if ( net == NULL ) //Should not occur
break; {
DisplayError(this, wxT("Tst_Ratsnest() error: net not found") );
return;
}
if( ref_netcode && (net_code != ref_netcode) ) if( ref_netcode && (net_code != ref_netcode) )
continue; continue;
...@@ -737,27 +702,26 @@ void WinEDA_BasePcbFrame::Tst_Ratsnest( wxDC* DC, int ref_netcode ) ...@@ -737,27 +702,26 @@ void WinEDA_BasePcbFrame::Tst_Ratsnest( wxDC* DC, int ref_netcode )
num_block = MAX( num_block, subnet ); num_block = MAX( num_block, subnet );
} }
for( chevelu = net->m_RatsnestStart; chevelu < net->m_RatsnestEnd; chevelu++ ) for( unsigned ii = net->m_RatsnestStart; ii < net->m_RatsnestEnd; ii++ )
{ {
chevelu->m_Status &= ~CH_ACTIF; m_Pcb->m_FullRatsnest[ii].m_Status &= ~CH_ACTIF;
} }
/* a - tst connection between pads */ /* a - tst connection between pads */
int ii = tst_rats_pad_to_pad( DrawPanel, DC, num_block, rats = &m_Pcb->m_FullRatsnest[0];
net->m_RatsnestStart, net->m_RatsnestEnd ); int icnt = tst_rats_pad_to_pad( num_block, rats + net->m_RatsnestStart, rats + net->m_RatsnestEnd );
/* b - test connexion between blocks (Iteration) */ /* b - test connexion between blocks (Iteration) */
while( ii > 1 ) while( icnt > 1 )
{ {
ii = tst_rats_block_to_block( DrawPanel, DC, net ); icnt = tst_rats_block_to_block( net, m_Pcb->m_FullRatsnest );
} }
} }
m_Pcb->m_NbNoconnect = 0; m_Pcb->m_NbNoconnect = 0;
RATSNEST_ITEM* Chevelu = m_Pcb->m_Ratsnest; for( unsigned ii = 0; ii < m_Pcb->GetRatsnestsCount(); ii++ )
for( int ii = m_Pcb->GetNumRatsnests(); ii > 0; ii--, Chevelu++ )
{ {
if( Chevelu->m_Status & CH_ACTIF ) if( m_Pcb->m_FullRatsnest[ii].m_Status & CH_ACTIF )
m_Pcb->m_NbNoconnect++; m_Pcb->m_NbNoconnect++;
} }
} }
...@@ -777,12 +741,12 @@ int WinEDA_BasePcbFrame::Test_1_Net_Ratsnest( wxDC* DC, int ref_netcode ) ...@@ -777,12 +741,12 @@ int WinEDA_BasePcbFrame::Test_1_Net_Ratsnest( wxDC* DC, int ref_netcode )
Tst_Ratsnest( DC, ref_netcode ); Tst_Ratsnest( DC, ref_netcode );
DrawGeneralRatsnest( DC, ref_netcode ); DrawGeneralRatsnest( DC, ref_netcode );
return m_Pcb->GetNumRatsnests(); return m_Pcb->GetRatsnestsCount();
} }
/*****************************************************************************/ /*****************************************************************************/
char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module ) void WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module )
/*****************************************************************************/ /*****************************************************************************/
/** /**
...@@ -792,7 +756,6 @@ char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module ) ...@@ -792,7 +756,6 @@ char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module )
* It shows the connections from a pad to the nearest conected pad * It shows the connections from a pad to the nearest conected pad
* @param Module = module to consider. * @param Module = module to consider.
* *
* the general buffer adr_lowmem is used to store the local footprint ratnest (to do: better to allocate memory)
* The ratsnest has 2 sections: * The ratsnest has 2 sections:
* - An "internal" ratsnet relative to pads of this footprint which are in the same net. * - An "internal" ratsnet relative to pads of this footprint which are in the same net.
* this ratsnest section is computed once. * this ratsnest section is computed once.
...@@ -800,21 +763,14 @@ char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module ) ...@@ -800,21 +763,14 @@ char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module )
* The ratsnest section must be computed for each new position * The ratsnest section must be computed for each new position
*/ */
{ {
D_PAD** pt_liste_pad; static unsigned pads_module_count; // node count (node = pad with a net code) for the footprint beeing moved
D_PAD** pt_liste_ref; static unsigned internalRatsCount; // number of internal links (links between pads of the module)
D_PAD** pt_liste_generale; D_PAD** baseListePad;
D_PAD* pad_ref; D_PAD* pad_ref;
D_PAD* pad_externe; D_PAD* pad_externe;
D_PAD** pt_liste_pad_limite; int current_net_code;
D_PAD** pt_start_liste; int distance; // variables de calcul de ratsnest
D_PAD** pt_end_liste; wxPoint pad_pos; // True pad position according to the current footprint position
int ii, jj;
RATSNEST_ITEM* local_chevelu;
static RATSNEST_ITEM* pt_fin_int_chevelu; // End list for "internal" ratsnest
static int nb_int_chevelu; // "internal" ratsnest count
int current_net_code;
int increment, distance; // variables de calcul de ratsnest
int pad_pos_X, pad_pos_Y; // True pad position according to the current footprint position
if( (GetBoard()->m_Status_Pcb & LISTE_PAD_OK) == 0 ) if( (GetBoard()->m_Status_Pcb & LISTE_PAD_OK) == 0 )
...@@ -827,120 +783,108 @@ char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module ) ...@@ -827,120 +783,108 @@ char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module )
* a pad in the current footprint * a pad in the current footprint
*/ */
if( (m_Pcb->m_Status_Pcb & RATSNEST_ITEM_LOCAL_OK) != 0 ) if( (m_Pcb->m_Status_Pcb & RATSNEST_ITEM_LOCAL_OK) != 0 )
goto calcul_chevelu_ext; goto CalculateExternalRatsnest;
/* Compute the "internal" ratsnest, i.e the links between the curent footprint pads */ /* Compute the "internal" ratsnest, i.e the links between the curent footprint pads */
pt_liste_pad = (D_PAD**) adr_lowmem; s_localPadBuffer.clear();
nb_pads_ref = 0; m_Pcb->m_LocalRatsnest.clear();
pad_ref = Module->m_Pads; for( pad_ref = Module->m_Pads; pad_ref != NULL; pad_ref = pad_ref->Next() )
for( ; pad_ref != NULL; pad_ref = pad_ref->Next() )
{ {
if( pad_ref->GetNet() == 0 ) if( pad_ref->GetNet() == 0 )
continue; continue;
*pt_liste_pad = pad_ref; s_localPadBuffer.push_back( pad_ref );
pad_ref->SetSubRatsnest( 0 ); pad_ref->SetSubRatsnest( 0 );
pad_ref->SetSubNet( 0 ); pad_ref->SetSubNet( 0 );
pt_liste_pad++; nb_pads_ref++;
} }
if( nb_pads_ref == 0 ) pads_module_count = s_localPadBuffer.size();
return (char*) pt_liste_pad; /* pas de connexions! */ if( pads_module_count == 0 )
return; /* no connection! */
qsort( adr_lowmem, nb_pads_ref, sizeof(D_PAD*), tri_par_net ); qsort( &s_localPadBuffer[0], pads_module_count, sizeof(D_PAD*), sortByNetcode );
/* Build the list of pads linked to the current footprint pads */ /* Build the list of pads linked to the current footprint pads */
DisplayRastnestInProgress = FALSE; DisplayRastnestInProgress = FALSE;
pt_liste_ref = (D_PAD**) adr_lowmem;
nb_pads_externes = 0;
current_net_code = 0; current_net_code = 0;
for( ii = 0; ii < nb_pads_ref; ii++ ) for( unsigned ii = 0; ii < pads_module_count; ii++ )
{ {
pad_ref = pt_liste_ref[ii]; pad_ref = s_localPadBuffer[ii];
if( pad_ref->GetNet() == current_net_code ) if( pad_ref->GetNet() == current_net_code )
continue; continue;
current_net_code = pad_ref->GetNet(); // A new net was found, load all pads of others modules members of this net:
NETINFO_ITEM* net = m_Pcb->FindNet( pad_ref->GetNet() );
pt_liste_generale = &m_Pcb->m_Pads[0]; if ( net == NULL ) //Should not occur
for( jj = m_Pcb->m_Pads.size(); jj > 0; jj-- )
{ {
pad_externe = *pt_liste_generale; pt_liste_generale++; DisplayError(this,wxT("build_ratsnest_module() error: net not found") );
if( pad_externe->GetNet() != current_net_code ) return;
continue; }
for( unsigned jj = 0; jj < net->m_ListPad.size(); jj++ )
{
pad_externe = net->m_ListPad[jj];
if( pad_externe->GetParent() == Module ) if( pad_externe->GetParent() == Module )
continue; continue;
pad_externe->SetSubRatsnest( 0 ); pad_externe->SetSubRatsnest( 0 );
pad_externe->SetSubNet( 0 ); pad_externe->SetSubNet( 0 );
*pt_liste_pad = pad_externe; s_localPadBuffer.push_back( pad_externe );
pt_liste_pad++;
nb_pads_externes++;
} }
} }
/* Sort the pad list by net_code */ /* Sort the pad list by net_code */
qsort( pt_liste_ref + nb_pads_ref, nb_pads_externes, sizeof(D_PAD*), baseListePad = &s_localPadBuffer[0];
tri_par_net ); qsort( baseListePad + pads_module_count,
s_localPadBuffer.size() - pads_module_count,
sizeof(D_PAD*), sortByNetcode );
/* Compute the internal rats nest: /* Compute the internal rats nest:
* this is the same as general ratsnest, but considers only the current footprint pads * this is the same as general ratsnest, but considers only the current footprint pads
* it is therefore not time consuming, and it is made only once * it is therefore not time consuming, and it is made only once
*/ */
local_liste_chevelu = (RATSNEST_ITEM*) pt_liste_pad; // buffer chevelu a la suite de la liste des pads current_net_code = s_localPadBuffer[0]->GetNet();
nb_local_chevelu = 0;
pt_liste_ref = (D_PAD**) adr_lowmem;
g_pt_chevelu = local_liste_chevelu;
pt_liste_pad = pt_start_liste = (D_PAD**) adr_lowmem;
pt_liste_pad_limite = pt_liste_pad + nb_pads_ref;
current_net_code = (*pt_liste_pad)->GetNet();
for( ; pt_liste_pad < pt_liste_pad_limite; ) for( unsigned ii = 0; ii < pads_module_count; ii++ )
{ {
/* Search the end of pad list relative to the current net */ /* Search the end of pad list relative to the current net */
unsigned jj = ii + 1;
for( pt_end_liste = pt_liste_pad + 1; ; pt_end_liste++ ) for( ; jj <= pads_module_count; jj++ )
{ {
if( pt_end_liste >= pt_liste_pad_limite ) if( jj >= pads_module_count )
break; break;
if( (*pt_end_liste)->GetNet() != current_net_code ) if( s_localPadBuffer[jj]->GetNet() != current_net_code )
break; break;
} }
/* End of list found: */ /* End of list found: */
/* a - first step of lee algorithm : build the pad to pad link list */ /* a - first step of lee algorithm : build the pad to pad link list */
ii = gen_rats_pad_to_pad( DrawPanel, DC, pt_start_liste, pt_end_liste, int icnt = gen_rats_pad_to_pad( DrawPanel, m_Pcb->m_LocalRatsnest,
0, &nb_local_chevelu ); baseListePad + ii, baseListePad + jj,
0 );
/* b - second step of lee algorithm : build the block to block link list (Iteration) */ /* b - second step of lee algorithm : build the block to block link list (Iteration) */
while( ii > 1 ) while( icnt > 1 )
{ {
ii = gen_rats_block_to_block( DrawPanel, DC, pt_liste_pad, icnt = gen_rats_block_to_block( DrawPanel, m_Pcb->m_LocalRatsnest,
pt_end_liste, &nb_local_chevelu ); baseListePad + ii, baseListePad + jj );
} }
pt_liste_pad = pt_start_liste = pt_end_liste; ii = jj;
if( pt_start_liste < pt_liste_pad_limite ) if( ii < s_localPadBuffer.size() )
current_net_code = (*pt_start_liste)->GetNet(); current_net_code = s_localPadBuffer[ii]->GetNet();
} }
pt_fin_int_chevelu = local_chevelu = g_pt_chevelu; internalRatsCount = m_Pcb->m_LocalRatsnest.size();
nb_int_chevelu = nb_local_chevelu;
/* set the ratsnets status, flag LOCAL_RATSNEST_ITEM */ /* set the ratsnets status, flag LOCAL_RATSNEST_ITEM */
g_pt_chevelu = local_liste_chevelu; for( unsigned ii = 0; ii < m_Pcb->m_LocalRatsnest.size(); ii++ )
while( g_pt_chevelu < pt_fin_int_chevelu )
{ {
g_pt_chevelu->m_Status = LOCAL_RATSNEST_ITEM; g_pt_chevelu++; m_Pcb->m_LocalRatsnest[ii].m_Status = LOCAL_RATSNEST_ITEM;
} }
m_Pcb->m_Status_Pcb |= RATSNEST_ITEM_LOCAL_OK; m_Pcb->m_Status_Pcb |= RATSNEST_ITEM_LOCAL_OK;
...@@ -948,77 +892,69 @@ char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module ) ...@@ -948,77 +892,69 @@ char* WinEDA_BasePcbFrame::build_ratsnest_module( wxDC* DC, MODULE* Module )
/* /*
* This section computes the "external" ratsnest: must be done when the footprint position changes * This section computes the "external" ratsnest: must be done when the footprint position changes
*/ */
calcul_chevelu_ext: CalculateExternalRatsnest:
/* This section search: /* This section search:
* for each current module pad the nearest neighbour external pad (of course for the same net code). * for each current module pad the nearest neighbour external pad (of course for the same net code).
* For each current footprint cluster of pad (pads having the same net code), * For each current footprint cluster of pad (pads having the same net code),
* we keep the smaller ratsnest. * we search the smaller rats nest.
* so, for each net, only one rats nest item is created
*/ */
local_chevelu = pt_fin_int_chevelu; RATSNEST_ITEM local_rats;
nb_local_chevelu = nb_int_chevelu; local_rats.m_Lenght = 0x7FFFFFFF;
pt_liste_ref = (D_PAD**) adr_lowmem; local_rats.m_Status = 0;
pad_ref = *pt_liste_ref; bool addRats = false;
if( internalRatsCount < m_Pcb->m_LocalRatsnest.size() )
current_net_code = pad_ref->GetNet(); m_Pcb->m_LocalRatsnest.erase( m_Pcb->m_LocalRatsnest.begin() + internalRatsCount,
local_chevelu->m_Lenght = 0x7FFFFFFF; m_Pcb->m_LocalRatsnest.end() );
local_chevelu->m_Status = 0;
increment = 0; current_net_code = s_localPadBuffer[0]->GetNet();
for( ii = 0; ii < nb_pads_ref; ii++ ) for( unsigned ii = 0; ii < pads_module_count; ii++ )
{ {
pad_ref = *(pt_liste_ref + ii); pad_ref = s_localPadBuffer[ii];
if( pad_ref->GetNet() != current_net_code ) if( pad_ref->GetNet() != current_net_code )
{ {
/* if needed a new ratsenest for each new net */ /* if needed, creates a new ratsnest for the old net */
if( increment ) if( addRats )
{ {
nb_local_chevelu++; local_chevelu++; m_Pcb->m_LocalRatsnest.push_back( local_rats );
} }
increment = 0; addRats = false;
current_net_code = pad_ref->GetNet(); current_net_code = pad_ref->GetNet();
local_chevelu->m_Lenght = 0x7FFFFFFF; local_rats.m_Lenght = 0x7FFFFFFF;
} }
pad_pos_X = pad_ref->m_Pos.x - g_Offset_Module.x; pad_pos = pad_ref->m_Pos - g_Offset_Module;
pad_pos_Y = pad_ref->m_Pos.y - g_Offset_Module.y;
pt_liste_generale = pt_liste_ref + nb_pads_ref;
for( jj = nb_pads_externes; jj > 0; jj-- ) // Search the nearest external pad of this current pad
for( unsigned jj = pads_module_count; jj < s_localPadBuffer.size(); jj++ )
{ {
pad_externe = *pt_liste_generale; pt_liste_generale++; pad_externe = s_localPadBuffer[jj];
/* we search pads having the same net coade */ /* we search pads having the same net code */
if( pad_externe->GetNet() < pad_ref->GetNet() ) if( pad_externe->GetNet() < pad_ref->GetNet() )
continue; continue;
if( pad_externe->GetNet() > pad_ref->GetNet() ) // remember pads are sorted by net code if( pad_externe->GetNet() > pad_ref->GetNet() ) // remember pads are sorted by net code
break; break;
distance = abs( pad_externe->m_Pos.x - pad_pos_X ) + distance = abs( pad_externe->m_Pos.x - pad_pos.x ) +
abs( pad_externe->m_Pos.y - pad_pos_Y ); abs( pad_externe->m_Pos.y - pad_pos.y );
if( distance < local_chevelu->m_Lenght ) if( distance < local_rats.m_Lenght )
{ {
local_chevelu->m_PadStart = pad_ref; local_rats.m_PadStart = pad_ref;
local_chevelu->m_PadEnd = pad_externe; local_rats.m_PadEnd = pad_externe;
local_chevelu->SetNet( pad_ref->GetNet() ); local_rats.SetNet( pad_ref->GetNet() );
local_chevelu->m_Lenght = distance; local_rats.m_Lenght = distance;
local_chevelu->m_Status = 0; local_rats.m_Status = 0;
increment = 1; addRats = true;
} }
} }
} }
if( increment ) // fin de balayage : le ratsnest courant doit etre memorise if( addRats ) // Ensure the last created rats nest item is stored in buffer
{ m_Pcb->m_LocalRatsnest.push_back( local_rats );
nb_local_chevelu++;
local_chevelu++;
}
return (char*) (local_chevelu + 1); /* the struct pointed by local_chevelu is used
* in temporary computations, so we skip it
*/
} }
...@@ -1030,35 +966,28 @@ void WinEDA_BasePcbFrame::trace_ratsnest_module( wxDC* DC ) ...@@ -1030,35 +966,28 @@ void WinEDA_BasePcbFrame::trace_ratsnest_module( wxDC* DC )
* Display the rastnest of a moving footprint, computed by build_ratsnest_module() * Display the rastnest of a moving footprint, computed by build_ratsnest_module()
*/ */
{ {
RATSNEST_ITEM* local_chevelu;
int ii;
if( DC == NULL ) if( DC == NULL )
return; return;
if( (m_Pcb->m_Status_Pcb & RATSNEST_ITEM_LOCAL_OK) == 0 ) if( (m_Pcb->m_Status_Pcb & RATSNEST_ITEM_LOCAL_OK) == 0 )
return; return;
local_chevelu = local_liste_chevelu;
ii = nb_local_chevelu;
GRSetDrawMode( DC, GR_XOR );
int tmpcolor = g_DesignSettings.m_RatsnestColor; int tmpcolor = g_DesignSettings.m_RatsnestColor;
while( ii-- > 0 ) for( unsigned ii = 0; ii < m_Pcb->m_LocalRatsnest.size(); ii++ )
{ {
if( local_chevelu->m_Status & LOCAL_RATSNEST_ITEM ) RATSNEST_ITEM* rats = &m_Pcb->m_LocalRatsnest[ii];
if( rats->m_Status & LOCAL_RATSNEST_ITEM )
{ {
g_DesignSettings.m_RatsnestColor = YELLOW; g_DesignSettings.m_RatsnestColor = YELLOW;
local_chevelu->Draw( DrawPanel, DC, GR_XOR, g_Offset_Module ); rats->Draw( DrawPanel, DC, GR_XOR, g_Offset_Module );
} }
else else
{ {
g_DesignSettings.m_RatsnestColor = tmpcolor; g_DesignSettings.m_RatsnestColor = tmpcolor;
wxPoint tmp = local_chevelu->m_PadStart->m_Pos; wxPoint tmp = rats->m_PadStart->m_Pos;
local_chevelu->m_PadStart->m_Pos -= g_Offset_Module; rats->m_PadStart->m_Pos -= g_Offset_Module;
local_chevelu->Draw( DrawPanel, DC, GR_XOR, wxPoint(0,0) ); rats->Draw( DrawPanel, DC, GR_XOR, wxPoint( 0, 0 ) );
local_chevelu->m_PadStart->m_Pos = tmp; rats->m_PadStart->m_Pos = tmp;
} }
local_chevelu++;
} }
g_DesignSettings.m_RatsnestColor = tmpcolor; g_DesignSettings.m_RatsnestColor = tmpcolor;
...@@ -1106,11 +1035,12 @@ void WinEDA_BasePcbFrame::build_ratsnest_pad( BOARD_ITEM* ref, ...@@ -1106,11 +1035,12 @@ void WinEDA_BasePcbFrame::build_ratsnest_pad( BOARD_ITEM* ref,
const wxPoint& refpos, bool init ) const wxPoint& refpos, bool init )
/****************************************************************************************/ /****************************************************************************************/
{ {
int current_net_code = 0, conn_number = 0; int current_net_code = 0, conn_number = 0;
D_PAD* pad_ref = NULL; D_PAD* pad_ref = NULL;
if( ( (m_Pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 ) if( ( (m_Pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
|| ( (m_Pcb->m_Status_Pcb & LISTE_PAD_OK) == 0 ) || ( (m_Pcb->m_Status_Pcb & NET_CODES_OK) == 0 ) ) || ( (m_Pcb->m_Status_Pcb & LISTE_PAD_OK) == 0 )
|| ( (m_Pcb->m_Status_Pcb & NET_CODES_OK) == 0 ) )
{ {
s_RatsnestMouseToPads.clear(); s_RatsnestMouseToPads.clear();
return; return;
...@@ -1148,9 +1078,12 @@ void WinEDA_BasePcbFrame::build_ratsnest_pad( BOARD_ITEM* ref, ...@@ -1148,9 +1078,12 @@ void WinEDA_BasePcbFrame::build_ratsnest_pad( BOARD_ITEM* ref,
if( current_net_code <= 0 ) if( current_net_code <= 0 )
return; return;
NETINFO_ITEM * net = m_Pcb->FindNet(current_net_code); NETINFO_ITEM* net = m_Pcb->FindNet( current_net_code );
if ( net == NULL ) if ( net == NULL ) //Should not occur
{
DisplayError(this,wxT("build_ratsnest_pad() error: net not found") );
return; return;
}
// Create a list of pads candidates ( pads not already connected to the current track: // Create a list of pads candidates ( pads not already connected to the current track:
for( unsigned ii = 0; ii < net->m_ListPad.size(); ii++ ) for( unsigned ii = 0; ii < net->m_ListPad.size(); ii++ )
...@@ -1164,7 +1097,7 @@ void WinEDA_BasePcbFrame::build_ratsnest_pad( BOARD_ITEM* ref, ...@@ -1164,7 +1097,7 @@ void WinEDA_BasePcbFrame::build_ratsnest_pad( BOARD_ITEM* ref,
} }
} /* end if Init */ } /* end if Init */
if( s_RatsnestMouseToPads.size() > 1) if( s_RatsnestMouseToPads.size() > 1 )
sort( s_RatsnestMouseToPads.begin(), s_RatsnestMouseToPads.end(), sort_by_localnetlength ); sort( s_RatsnestMouseToPads.begin(), s_RatsnestMouseToPads.end(), sort_by_localnetlength );
} }
...@@ -1180,12 +1113,12 @@ void WinEDA_BasePcbFrame::trace_ratsnest_pad( wxDC* DC ) ...@@ -1180,12 +1113,12 @@ void WinEDA_BasePcbFrame::trace_ratsnest_pad( wxDC* DC )
if( DC == NULL ) if( DC == NULL )
return; return;
if( s_RatsnestMouseToPads.size() == 0) if( s_RatsnestMouseToPads.size() == 0 )
return; return;
GRSetDrawMode( DC, GR_XOR ); GRSetDrawMode( DC, GR_XOR );
for( int ii = 0; ii < (int)s_RatsnestMouseToPads.size(); ii++ ) for( int ii = 0; ii < (int) s_RatsnestMouseToPads.size(); ii++ )
{ {
if( ii >= g_MaxLinksShowed ) if( ii >= g_MaxLinksShowed )
break; break;
......
pcbnew/surbrill.cpp
View file @ b1d1a711
...@@ -17,67 +17,73 @@ ...@@ -17,67 +17,73 @@
/*********************************************************/ /*********************************************************/
void WinEDA_PcbFrame::Liste_Equipot( wxCommandEvent& event ) void WinEDA_PcbFrame::ListNetsAndSelect( wxCommandEvent& event )
/*********************************************************/ /*********************************************************/
/* Display a filtered list of equipot names /** Function ListNetsAndSelect
* if an equipot is selected the corresponding tracks and pads are highlighted * called by a command event
* displays the sorted list of nets in a dialog frame
* If a net is selected, it is hightlighted
*/ */
{ {
NETINFO_ITEM* net; NETINFO_ITEM* net;
wxString msg; wxString netFilter;
WinEDA_TextFrame* List; int selection;
unsigned ii;
netFilter = wxT( "*" );
msg = wxT( "*" ); Get_Message( _( "Filter for net names:" ), _( "Net Filter" ), netFilter, this );
Get_Message( _( "Filter for net names:" ), _("Net Filter"), msg, this ); if( netFilter.IsEmpty() )
if( msg.IsEmpty() )
return; return;
List = new WinEDA_TextFrame( this, _( "List Nets" ) ); WinEDA_TextFrame List( this, _( "List Nets" ) );
for( ii = 0; ii < GetBoard()->m_NetInfo->GetCount() ; ii++ ) for( unsigned ii = 0; ii < GetBoard()->m_NetInfo->GetCount(); ii++ )
{ {
net = GetBoard()->m_NetInfo->GetItem( ii ); net = GetBoard()->m_NetInfo->GetItem( ii );
wxString Line; wxString Line;
if( !WildCompareString( msg, net->GetNetname(), false ) ) if( !WildCompareString( netFilter, net->GetNetname(), false ) )
continue; continue;
Line.Printf( wxT( "net_code = %3.3d [%.16s] " ), net->GetNet(), Line.Printf( wxT( "net_code = %3.3d [%.16s] " ), net->GetNet(),
net->GetNetname().GetData() ); net->GetNetname().GetData() );
List->Append( Line ); List.Append( Line );
} }
ii = List->ShowModal(); selection = List.ShowModal();
List->Destroy();
if( ii < 0 ) if( selection < 0 )
return; return;
for( unsigned jj = 0; jj < GetBoard()->m_NetInfo->GetCount() ; jj++ ) bool found = false;
unsigned netcode = (unsigned) selection;
// Search for the net selected.
for( unsigned ii = 0; ii < GetBoard()->m_NetInfo->GetCount(); ii++ )
{ {
net = GetBoard()->m_NetInfo->GetItem( ii ); net = GetBoard()->m_NetInfo->GetItem( ii );
if( !WildCompareString( msg, net->GetNetname(), false ) ) if( !WildCompareString( netFilter, net->GetNetname(), false ) )
continue; continue;
if( ii == jj ) if( ii == netcode )
{ {
ii = net->GetNet(); netcode = net->GetNet();
found = true;
break; break;
} }
jj++;
} }
wxClientDC dc( DrawPanel ); if( found )
{
wxClientDC dc( DrawPanel );
DrawPanel->PrepareGraphicContext( &dc ); DrawPanel->PrepareGraphicContext( &dc );
if( g_HightLigt_Status ) if( g_HightLigt_Status )
Hight_Light( &dc ); Hight_Light( &dc );
g_HightLigth_NetCode = ii; g_HightLigth_NetCode = netcode;
Hight_Light( &dc ); Hight_Light( &dc );
}
} }
...@@ -100,7 +106,7 @@ int WinEDA_PcbFrame::Select_High_Light( wxDC* DC ) ...@@ -100,7 +106,7 @@ int WinEDA_PcbFrame::Select_High_Light( wxDC* DC )
// optionally, modify the "guide" here as needed using its member functions // optionally, modify the "guide" here as needed using its member functions
m_Collector->Collect( GetBoard(), GENERAL_COLLECTOR::PadsTracksOrZones, m_Collector->Collect( GetBoard(), GENERAL_COLLECTOR::PadsTracksOrZones,
GetScreen()->RefPos( true ), guide ); GetScreen()->RefPos( true ), guide );
BOARD_ITEM* item = (*m_Collector)[0]; BOARD_ITEM* item = (*m_Collector)[0];
...@@ -109,7 +115,7 @@ int WinEDA_PcbFrame::Select_High_Light( wxDC* DC ) ...@@ -109,7 +115,7 @@ int WinEDA_PcbFrame::Select_High_Light( wxDC* DC )
switch( item->Type() ) switch( item->Type() )
{ {
case TYPE_PAD: case TYPE_PAD:
g_HightLigth_NetCode = ((D_PAD*)item)->GetNet(); g_HightLigth_NetCode = ( (D_PAD*) item )->GetNet();
Hight_Light( DC ); Hight_Light( DC );
SendMessageToEESCHEMA( item ); SendMessageToEESCHEMA( item );
return g_HightLigth_NetCode; return g_HightLigth_NetCode;
...@@ -117,14 +123,15 @@ int WinEDA_PcbFrame::Select_High_Light( wxDC* DC ) ...@@ -117,14 +123,15 @@ int WinEDA_PcbFrame::Select_High_Light( wxDC* DC )
case TYPE_TRACK: case TYPE_TRACK:
case TYPE_VIA: case TYPE_VIA:
case TYPE_ZONE: case TYPE_ZONE:
// since these classes are all derived from TRACK, use a common // since these classes are all derived from TRACK, use a common
// GetNet() function: // GetNet() function:
g_HightLigth_NetCode = ((TRACK*)item)->GetNet(); g_HightLigth_NetCode = ( (TRACK*) item )->GetNet();
Hight_Light( DC ); Hight_Light( DC );
return g_HightLigth_NetCode; return g_HightLigth_NetCode;
case TYPE_ZONE_CONTAINER: case TYPE_ZONE_CONTAINER:
g_HightLigth_NetCode = ((ZONE_CONTAINER*)item)->GetNet(); g_HightLigth_NetCode = ( (ZONE_CONTAINER*) item )->GetNet();
Hight_Light( DC ); Hight_Light( DC );
return g_HightLigth_NetCode; return g_HightLigth_NetCode;
...@@ -151,4 +158,3 @@ void WinEDA_PcbFrame::Hight_Light( wxDC* DC ) ...@@ -151,4 +158,3 @@ void WinEDA_PcbFrame::Hight_Light( wxDC* DC )
GetBoard()->DrawHighLight( DrawPanel, DC, g_HightLigth_NetCode ); GetBoard()->DrawHighLight( DrawPanel, DC, g_HightLigth_NetCode );
} }
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