Commit 680a4407 authored by Dick Hollenbeck's avatar Dick Hollenbeck
Browse files

fix formatting problems that came about from incompatible tabbing in Lorenzo's patch

parent 40ee7265
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+0 −1
Original line number Diff line number Diff line
@@ -80,7 +80,6 @@ public:
    FOOTPRINT_EDIT_FRAME* m_ModuleEditFrame;

protected:
//    EDA_RECT            m_BoundaryBox;      // Board size and position
    BOARD*              m_Pcb;
    GENERAL_COLLECTOR*  m_Collector;

+298 −275
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ static const wxString GenCADLayerNameFlipped[32] =
static int GencadOffsetX, GencadOffsetY;

/* GerbTool chokes on units different than INCH so this is the conversion
   factor */
 *  factor */
const static double SCALE_FACTOR = 10000.0;


@@ -108,11 +108,13 @@ static double MapXTo( int aX )
    return (aX - GencadOffsetX) / SCALE_FACTOR;
}


static double MapYTo( int aY )
{
    return (GencadOffsetY - aY) / SCALE_FACTOR;
}


/* Driver function: processing starts here */
void PCB_EDIT_FRAME::ExportToGenCAD( wxCommandEvent& aEvent )
{
@@ -170,8 +172,8 @@ void PCB_EDIT_FRAME::ExportToGenCAD( wxCommandEvent& aEvent )
    }

    /* Gencad has some mandatory and some optional sections: some importer
       need the padstack section (which is optional) anyway. Also the
       order of the section *is* important */
     *  need the padstack section (which is optional) anyway. Also the
     *  order of the section *is* important */

    CreateHeaderInfoData( file, this );     // Gencad header
    CreateBoardSection( file, pcb );        // Board perimeter
@@ -180,8 +182,8 @@ void PCB_EDIT_FRAME::ExportToGenCAD( wxCommandEvent& aEvent )
    CreateArtworksSection( file );          // Empty but mandatory

    /* Gencad splits a component info in shape, component and device.
       We don't do any sharing (it would be difficult since each module is
       customizable after placement) */
     *  We don't do any sharing (it would be difficult since each module is
     *  customizable after placement) */
    CreateShapesSection( file, pcb );
    CreateComponentsSection( file, pcb );
    CreateDevicesSection( file, pcb );
@@ -205,6 +207,7 @@ void PCB_EDIT_FRAME::ExportToGenCAD( wxCommandEvent& aEvent )
    }
}


// Comparator for sorting pads with qsort
static int PadListSortByShape( const void* aRefptr, const void* aObjptr )
{
@@ -214,6 +217,7 @@ static int PadListSortByShape( const void* aRefptr, const void* aObjptr )
    return D_PAD::Compare( padref, padcmp );
}


// Sort vias for uniqueness
static int ViaSort( const void* aRefptr, const void* aObjptr )
{
@@ -232,6 +236,7 @@ static int ViaSort(const void* aRefptr, const void* aObjptr )
    return 0;
}


// The ARTWORKS section is empty but (officially) mandatory
static void CreateArtworksSection( FILE* aFile )
{
@@ -240,6 +245,7 @@ static void CreateArtworksSection( FILE* aFile )
    fputs( "$ENDARTWORKS\n\n", aFile );
}


// Emit PADS and PADSTACKS. They are sorted and emitted uniquely.
// Via name is synthesized from their attributes, pads are numbered
static void CreatePadsShapesSection( FILE* aFile, BOARD* aPcb )
@@ -273,6 +279,7 @@ static void CreatePadsShapesSection( FILE* aFile, BOARD* aPcb )
            vias.push_back( track );
        }
    }

    qsort( &vias[0], vias.size(), sizeof(TRACK*), ViaSort );

    // Emit vias pads
@@ -331,6 +338,7 @@ static void CreatePadsShapesSection( FILE* aFile, BOARD* aPcb )
        case PAD_RECT:
            fprintf( aFile, " RECTANGULAR %g\n",
                     pad->m_Drill.x / SCALE_FACTOR );

            // Rectangle is begin, size *not* begin, end!
            fprintf( aFile, "RECTANGLE %g %g %g %g\n",
                    (-dx + pad->m_Offset.x ) / SCALE_FACTOR,
@@ -353,6 +361,7 @@ static void CreatePadsShapesSection( FILE* aFile, BOARD* aPcb )
                         (-pad->m_Offset.y - radius) / SCALE_FACTOR,
                         (dr + pad->m_Offset.x ) / SCALE_FACTOR,
                         (-pad->m_Offset.y - radius) / SCALE_FACTOR );

                // GenCAD arcs are (start, end, center)
                fprintf( aFile, "ARC %g %g %g %g %g %g\n",
                         (dr + pad->m_Offset.x) / SCALE_FACTOR,
@@ -411,10 +420,12 @@ static void CreatePadsShapesSection( FILE* aFile, BOARD* aPcb )
        case PAD_TRAPEZOID:
            fprintf( aFile, " POLYGON %g\n",
                     pad->m_Drill.x / SCALE_FACTOR );

            // XXX TO BE IMPLEMENTED! and I don't know if it could be actually imported by something
            break;
        }
    }

    fputs( "\n$ENDPADS\n\n", aFile );

    // Now emit the padstacks definitions, using the combined layer masks
@@ -440,11 +451,12 @@ static void CreatePadsShapesSection( FILE* aFile, BOARD* aPcb )
            }
        }
    }

    /* Component padstacks
       CAM350 don't apply correctly the FLIP semantics for padstacks, i.e. doesn't
       swap the top and bottom layers... so I need to define the shape as MIRRORX
       and define a separate 'flipped' padstack... until it appears yet another
       noncompliant importer */
     *  CAM350 don't apply correctly the FLIP semantics for padstacks, i.e. doesn't
     *  swap the top and bottom layers... so I need to define the shape as MIRRORX
     *  and define a separate 'flipped' padstack... until it appears yet another
     *  noncompliant importer */
    for( unsigned i = 1; i < padstacks.size(); i++ )
    {
        D_PAD* pad = padstacks[i];
@@ -473,6 +485,7 @@ static void CreatePadsShapesSection( FILE* aFile, BOARD* aPcb )
            }
        }
    }

    fputs( "$ENDPADSTACKS\n\n", aFile );
}

@@ -499,10 +512,10 @@ static void CreateShapesSection( FILE* aFile, BOARD* aPcb )
        for( pad = module->m_Pads; pad != NULL; pad = pad->Next() )
        {
            /* Funny thing: GenCAD requires the pad side even if you use
           padstacks (which are theorically optional but gerbtools
             *  padstacks (which are theorically optional but gerbtools
             *requires* them). Now the trouble thing is that 'BOTTOM'
           is interpreted by someone as a padstack flip even
           if the spec explicitly says it's not... */
             *  is interpreted by someone as a padstack flip even
             *  if the spec explicitly says it's not... */
            layer = "ALL";

            if( ( pad->m_layerMask & ALL_CU_LAYERS ) == LAYER_BACK )
@@ -536,6 +549,7 @@ static void CreateShapesSection( FILE* aFile, BOARD* aPcb )
    fputs( "$ENDSHAPES\n\n", aFile );
}


/* Creates the section $COMPONENTS (Footprints placement)
 * Bottom side components are difficult to handle: shapes must be mirrored or
 * flipped, silk layers need to be handled correctly and so on. Also it seems
@@ -543,7 +557,6 @@ static void CreateShapesSection( FILE* aFile, BOARD* aPcb )
 */
static void CreateComponentsSection( FILE* aFile, BOARD* aPcb )
{

    fputs( "$COMPONENTS\n", aFile );

    for( MODULE* module = aPcb->m_Modules; module != NULL; module = module->Next() )
@@ -617,6 +630,7 @@ static void CreateComponentsSection( FILE* aFile, BOARD* aPcb )
    fputs( "$ENDCOMPONENTS\n\n", aFile );
}


/* Emit the netlist (which is actually the thing for which GenCAD is used these
 * days!); tracks are handled later */
static void CreateSignalsSection( FILE* aFile, BOARD* aPcb )
@@ -702,6 +716,7 @@ static bool CreateHeaderInfoData( FILE* aFile, PCB_EDIT_FRAME* aFrame )
    return true;
}


/*
 *  Sort function used to sort tracks segments:
 *   items are sorted by netcode, then by width then by layer
@@ -845,6 +860,7 @@ static void CreateDevicesSection( FILE* aFile, BOARD* aPcb )
        fprintf( aFile, "DEVICE \"%s\"\n", TO_UTF8( module->m_Reference->m_Text ) );
        fprintf( aFile, "PART \"%s\"\n", TO_UTF8( module->m_Value->m_Text ) );
        fprintf( aFile, "PACKAGE \"%s\"\n", TO_UTF8( module->m_LibRef ) );

        // The TYPE attribute is almost freeform
        const char* ty = "TH";
        if( module->m_Attributs & MOD_CMS )
@@ -864,6 +880,7 @@ static void CreateDevicesSection( FILE* aFile, BOARD* aPcb )
static void CreateBoardSection( FILE* aFile, BOARD* aPcb )
{
    fputs( "$BOARD\n", aFile );

    // Extract the board edges
    for( EDA_ITEM* drawing = aPcb->m_Drawings;
        drawing != 0;
@@ -881,6 +898,7 @@ static void CreateBoardSection( FILE* aFile, BOARD* aPcb )
            }
        }
    }

    fputs( "$ENDBOARD\n\n", aFile );
}

@@ -963,6 +981,7 @@ static void FootprintWriteShape( FILE* aFile, MODULE* module )
{
    EDGE_MODULE* PtEdge;
    EDA_ITEM*    PtStruct;

    // Control Y axis change sign for flipped modules
    int          Yaxis_sign = -1;

@@ -1015,6 +1034,7 @@ static void FootprintWriteShape( FILE* aFile, MODULE* module )
        switch( PtStruct->Type() )
        {
        case PCB_MODULE_TEXT_T:

            // If we wanted to export text, this is not the correct section
            break;

@@ -1053,7 +1073,8 @@ static void FootprintWriteShape( FILE* aFile, MODULE* module )
                    RotatePoint( &arcendx, &arcendy, -PtEdge->m_Angle );
                    arcendx += PtEdge->m_Start0.x;
                    arcendy += PtEdge->m_Start0.y;
            if (Yaxis_sign == -1) {
                    if( Yaxis_sign == -1 )
                    {
                        // Flipping Y flips the arc direction too
                        fprintf( aFile, "ARC %g %g %g %g %g %g\n",
                                 (arcendx) / SCALE_FACTOR,
@@ -1062,7 +1083,9 @@ static void FootprintWriteShape( FILE* aFile, MODULE* module )
                                 (Yaxis_sign * PtEdge->m_End0.y) / SCALE_FACTOR,
                                 (PtEdge->m_Start0.x) / SCALE_FACTOR,
                                 (Yaxis_sign * PtEdge->m_Start0.y) / SCALE_FACTOR );
            } else {
                    }
                    else
                    {
                        fprintf( aFile, "ARC %g %g %g %g %g %g\n",
                                 (PtEdge->m_End0.x) / SCALE_FACTOR,
                                 (Yaxis_sign * PtEdge->m_End0.y) / SCALE_FACTOR,