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Elphel
kicad-source-mirror
Commits
5c3f35c2
Commit
5c3f35c2
authored
Aug 10, 2009
by
dickelbeck
Browse files
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Plain Diff
beautification in preparation for netclass work.
parent
514de91e
Changes
9
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Showing
9 changed files
with
84 additions
and
54 deletions
+84
-54
wxPcbStruct.h
include/wxPcbStruct.h
+10
-0
class_board.cpp
pcbnew/class_board.cpp
+9
-5
class_board.h
pcbnew/class_board.h
+5
-4
class_netclass.cpp
pcbnew/class_netclass.cpp
+10
-14
class_netclass.h
pcbnew/class_netclass.h
+32
-12
class_netinfo.h
pcbnew/class_netinfo.h
+15
-11
class_netinfo_item.cpp
pcbnew/class_netinfo_item.cpp
+1
-1
edgemod.cpp
pcbnew/edgemod.cpp
+0
-7
ioascii.cpp
pcbnew/ioascii.cpp
+2
-0
No files found.
include/wxPcbStruct.h
View file @
5c3f35c2
...
@@ -743,6 +743,16 @@ public:
...
@@ -743,6 +743,16 @@ public:
void
Load_Module_From_BOARD
(
MODULE
*
Module
);
void
Load_Module_From_BOARD
(
MODULE
*
Module
);
// functions to edit footprint edges
// functions to edit footprint edges
/**
* Function Edit_Edge_Width
* changes the width of module perimeter lines, EDGE_MODULEs.
* @param ModuleSegmentWidth (global) = new width
* @param Edge = edge to edit, or NULL. If Edge == NULL change
* the width of all the footprint's edges
* @param DC = current Device Context
*/
void
Edit_Edge_Width
(
EDGE_MODULE
*
Edge
);
void
Edit_Edge_Width
(
EDGE_MODULE
*
Edge
);
void
Edit_Edge_Layer
(
EDGE_MODULE
*
Edge
);
void
Edit_Edge_Layer
(
EDGE_MODULE
*
Edge
);
void
Delete_Edge_Module
(
EDGE_MODULE
*
Edge
);
void
Delete_Edge_Module
(
EDGE_MODULE
*
Edge
);
...
...
pcbnew/class_board.cpp
View file @
5c3f35c2
...
@@ -19,7 +19,8 @@ wxPoint BOARD_ITEM::ZeroOffset( 0, 0 );
...
@@ -19,7 +19,8 @@ wxPoint BOARD_ITEM::ZeroOffset( 0, 0 );
/* Constructor */
/* Constructor */
BOARD
::
BOARD
(
EDA_BaseStruct
*
parent
,
WinEDA_BasePcbFrame
*
frame
)
:
BOARD
::
BOARD
(
EDA_BaseStruct
*
parent
,
WinEDA_BasePcbFrame
*
frame
)
:
BOARD_ITEM
(
(
BOARD_ITEM
*
)
parent
,
TYPE_PCB
)
BOARD_ITEM
(
(
BOARD_ITEM
*
)
parent
,
TYPE_PCB
),
m_NetClassesList
(
this
)
{
{
m_PcbFrame
=
frame
;
m_PcbFrame
=
frame
;
m_Status_Pcb
=
0
;
// Mot d'etat: Bit 1 = Chevelu calcule
m_Status_Pcb
=
0
;
// Mot d'etat: Bit 1 = Chevelu calcule
...
@@ -38,7 +39,6 @@ BOARD::BOARD( EDA_BaseStruct* parent, WinEDA_BasePcbFrame* frame ) :
...
@@ -38,7 +39,6 @@ BOARD::BOARD( EDA_BaseStruct* parent, WinEDA_BasePcbFrame* frame ) :
}
}
// Add the default Netclass to list
// Add the default Netclass to list
m_NetClassesList
.
m_Parent
=
this
;
NETCLASS
*
default_netclass
=
new
NETCLASS
(
this
);
NETCLASS
*
default_netclass
=
new
NETCLASS
(
this
);
m_NetClassesList
.
AddNetclass
(
default_netclass
);
m_NetClassesList
.
AddNetclass
(
default_netclass
);
}
}
...
@@ -826,12 +826,14 @@ NETINFO_ITEM* BOARD::FindNet( int anetcode ) const
...
@@ -826,12 +826,14 @@ NETINFO_ITEM* BOARD::FindNet( int anetcode ) const
// zero is reserved for "no connection" and is not used.
// zero is reserved for "no connection" and is not used.
// NULL is returned for non valid netcodes
// NULL is returned for non valid netcodes
NETINFO_ITEM
*
item
=
m_NetInfo
->
GetNetItem
(
anetcode
);
NETINFO_ITEM
*
item
=
m_NetInfo
->
GetNetItem
(
anetcode
);
#if defined(DEBUG)
#if defined(DEBUG)
if
(
item
)
// item can be NULL if not valid
if
(
item
)
// item can be NULL if
anetcode is
not valid
{
{
wxASSERT
(
anetcode
==
item
->
GetNet
()
);
wxASSERT
(
anetcode
==
item
->
GetNet
()
);
}
}
#endif
#endif
return
item
;
return
item
;
}
}
...
@@ -910,16 +912,18 @@ int BOARD::ReturnSortedNetnamesList( wxArrayString& aNames, bool aSortbyPadsCoun
...
@@ -910,16 +912,18 @@ int BOARD::ReturnSortedNetnamesList( wxArrayString& aNames, bool aSortbyPadsCoun
if
(
m_NetInfo
->
GetNetsCount
()
==
0
)
if
(
m_NetInfo
->
GetNetsCount
()
==
0
)
return
0
;
return
0
;
/
* Build the list */
/
/ Build the list
std
::
vector
<
NETINFO_ITEM
*>
netBuffer
;
std
::
vector
<
NETINFO_ITEM
*>
netBuffer
;
netBuffer
.
reserve
(
m_NetInfo
->
GetNetsCount
()
);
netBuffer
.
reserve
(
m_NetInfo
->
GetNetsCount
()
);
for
(
unsigned
ii
=
1
;
ii
<
m_NetInfo
->
GetNetsCount
();
ii
++
)
for
(
unsigned
ii
=
1
;
ii
<
m_NetInfo
->
GetNetsCount
();
ii
++
)
{
{
if
(
m_NetInfo
->
GetNetItem
(
ii
)
->
GetNet
()
>
0
)
if
(
m_NetInfo
->
GetNetItem
(
ii
)
->
GetNet
()
>
0
)
netBuffer
.
push_back
(
m_NetInfo
->
GetNetItem
(
ii
)
);
netBuffer
.
push_back
(
m_NetInfo
->
GetNetItem
(
ii
)
);
}
}
/
* sort the list */
/
/ sort the list
if
(
aSortbyPadsCount
)
if
(
aSortbyPadsCount
)
sort
(
netBuffer
.
begin
(),
netBuffer
.
end
(),
s_SortByNodes
);
sort
(
netBuffer
.
begin
(),
netBuffer
.
end
(),
s_SortByNodes
);
...
...
pcbnew/class_board.h
View file @
5c3f35c2
...
@@ -98,6 +98,7 @@ public:
...
@@ -98,6 +98,7 @@ public:
* (used while moving a footprint) */
* (used while moving a footprint) */
NETCLASS_LIST
m_NetClassesList
;
// List of current netclasses. There is always the default netclass
NETCLASS_LIST
m_NetClassesList
;
// List of current netclasses. There is always the default netclass
ZONE_CONTAINER
*
m_CurrentZoneContour
;
// zone contour currently in progress
ZONE_CONTAINER
*
m_CurrentZoneContour
;
// zone contour currently in progress
BOARD
(
EDA_BaseStruct
*
aParent
,
WinEDA_BasePcbFrame
*
frame
);
BOARD
(
EDA_BaseStruct
*
aParent
,
WinEDA_BasePcbFrame
*
frame
);
...
@@ -338,14 +339,14 @@ public:
...
@@ -338,14 +339,14 @@ public:
/**
/**
* Function TransfertDesignRulesToNets
* Function TransfertDesignRulesToNets
*
Copy Netclass parameters to each net, corresponding to its net class
*
copies Netclass parameters to each net, corresponding to its net class.
* Must be called after a Design Rules edition, or after reading a netlist (or editing the list of nets)
* Must be called after a Design Rules edition, or after reading a netlist (or editing the list of nets)
* Also this function remove the non existing nets in netclasses and add net nets in default netclass
* Also this function remove
s
the non existing nets in netclasses and add net nets in default netclass
* (this happens after reading a netlist)
* (this happens after reading a netlist)
* @param none
* @param none
* @return none
* @return none
*/
*/
void
TransfertDesignRulesToNets
(
);
void
TransfertDesignRulesToNets
();
/**
/**
* Function Save
* Function Save
...
...
pcbnew/class_netclass.cpp
View file @
5c3f35c2
...
@@ -77,15 +77,6 @@ bool NETCLASS_LIST::AddNetclass( NETCLASS* aNetclass )
...
@@ -77,15 +77,6 @@ bool NETCLASS_LIST::AddNetclass( NETCLASS* aNetclass )
}
}
/**
* Function TransfertDesignRulesToNets
* Copy Netclass parameters to each net, corresponding to its net class
* Must be called after a Design Rules edition, or after reading a netlist (or editing the list of nets)
* Also this function remove the non existing nets in netclasses and add net nets in default netclass
* (this happens after reading a netlist)
* @param none
* @return none
*/
void
BOARD
::
TransfertDesignRulesToNets
()
void
BOARD
::
TransfertDesignRulesToNets
()
{
{
// Clear .m_Flag member of nets (used to detect not in netclass list nets)
// Clear .m_Flag member of nets (used to detect not in netclass list nets)
...
@@ -94,17 +85,20 @@ void BOARD::TransfertDesignRulesToNets()
...
@@ -94,17 +85,20 @@ void BOARD::TransfertDesignRulesToNets()
NETINFO_ITEM
*
net
=
FindNet
(
ii
);
NETINFO_ITEM
*
net
=
FindNet
(
ii
);
if
(
net
==
NULL
)
if
(
net
==
NULL
)
break
;
break
;
net
->
m_Flag
=
0
;
net
->
m_Flag
=
0
;
}
}
for
(
unsigned
ii
=
0
;
ii
<
m_NetClassesList
.
m_Netclass_List
.
size
();
ii
++
)
for
(
unsigned
ii
=
0
;
ii
<
m_NetClassesList
.
GetNetClassCount
();
ii
++
)
{
{
//Transfert rules and netclass name to nets:
// Transfert rules and netclass name to nets:
NETCLASS
*
netclass
=
m_NetClassesList
.
m_Netclass_List
[
ii
];
NETCLASS
*
netclass
=
m_NetClassesList
.
GetNetClass
(
ii
);
for
(
unsigned
jj
=
0
;
jj
<
netclass
->
GetMembersCount
();
jj
++
)
for
(
unsigned
jj
=
0
;
jj
<
netclass
->
GetMembersCount
();
jj
++
)
{
{
wxString
netname
=
netclass
->
GetMemberName
(
jj
);
wxString
netname
=
netclass
->
GetMemberName
(
jj
);
NETINFO_ITEM
*
net
=
FindNet
(
netname
);
NETINFO_ITEM
*
net
=
FindNet
(
netname
);
if
(
net
==
NULL
)
// This net does not exists: remove it
if
(
net
==
NULL
)
// This net does not exists: remove it
{
{
netclass
->
m_MembersNetNames
.
RemoveAt
(
jj
);
netclass
->
m_MembersNetNames
.
RemoveAt
(
jj
);
...
@@ -119,12 +113,15 @@ void BOARD::TransfertDesignRulesToNets()
...
@@ -119,12 +113,15 @@ void BOARD::TransfertDesignRulesToNets()
}
}
// Now, set nets that do not have yet a netclass to default netclass
// Now, set nets that do not have yet a netclass to default netclass
NETCLASS
*
defaultnetclass
=
m_NetClassesList
.
m_Netclass_List
[
0
];
NETCLASS
*
defaultnetclass
=
m_NetClassesList
.
GetNetClass
(
0
);
for
(
unsigned
ii
=
1
;
;
ii
++
)
for
(
unsigned
ii
=
1
;
;
ii
++
)
{
{
NETINFO_ITEM
*
net
=
FindNet
(
ii
);
NETINFO_ITEM
*
net
=
FindNet
(
ii
);
if
(
net
==
NULL
)
if
(
net
==
NULL
)
break
;
break
;
if
(
net
->
m_Flag
==
0
)
if
(
net
->
m_Flag
==
0
)
{
{
net
->
SetClass
(
*
defaultnetclass
);
net
->
SetClass
(
*
defaultnetclass
);
...
@@ -175,7 +172,6 @@ bool NETCLASS::Save( FILE* aFile ) const
...
@@ -175,7 +172,6 @@ bool NETCLASS::Save( FILE* aFile ) const
for
(
unsigned
ii
=
0
;
ii
<
GetMembersCount
();
ii
++
)
for
(
unsigned
ii
=
0
;
ii
<
GetMembersCount
();
ii
++
)
fprintf
(
aFile
,
"AddNet
\"
%s
\"\n
"
,
CONV_TO_UTF8
(
GetMemberName
(
ii
)
)
);
fprintf
(
aFile
,
"AddNet
\"
%s
\"\n
"
,
CONV_TO_UTF8
(
GetMemberName
(
ii
)
)
);
fprintf
(
aFile
,
"$EndNETCLASS
\n
"
);
fprintf
(
aFile
,
"$EndNETCLASS
\n
"
);
return
success
;
return
success
;
...
...
pcbnew/class_netclass.h
View file @
5c3f35c2
...
@@ -2,12 +2,19 @@
...
@@ -2,12 +2,19 @@
/* class to Net Classes */
/* class to Net Classes */
/**************************************/
/**************************************/
#ifndef CLASS_NETCLASS_H
#ifndef CLASS_NETCLASS_H
#define CLASS_NETCLASS_H
#define CLASS_NETCLASS_H
/* this small class NET_DESIGN_PARAMS handles netclass parameters.
/**
* Class NET_DESIGN_PARAMS
* handles netclass parameters.
*
* This is a separate class because these parameters are also duplicated
* This is a separate class because these parameters are also duplicated
* (for calculation time consideration) in each NETINFO_ITEM when making tests DRC and routing
* (for calculation time consideration) in each NETINFO_ITEM when making
* tests DRC and routing
*/
*/
class
NET_DESIGN_PARAMS
class
NET_DESIGN_PARAMS
{
{
...
@@ -18,9 +25,11 @@ public:
...
@@ -18,9 +25,11 @@ public:
int
m_ViasMinSize
;
// Minimum value for vias sizes (used in DRC)
int
m_ViasMinSize
;
// Minimum value for vias sizes (used in DRC)
int
m_Clearance
;
// "Default" clearance when routing
int
m_Clearance
;
// "Default" clearance when routing
int
m_MinClearance
;
// Minimum value for clearance (used in DRC)
int
m_MinClearance
;
// Minimum value for clearance (used in DRC)
public
:
public
:
NET_DESIGN_PARAMS
();
NET_DESIGN_PARAMS
();
~
NET_DESIGN_PARAMS
()
{}
// ~NET_DESIGN_PARAMS() {}
/**
/**
* Function Save
* Function Save
...
@@ -30,6 +39,7 @@ public:
...
@@ -30,6 +39,7 @@ public:
*/
*/
bool
Save
(
FILE
*
aFile
)
const
;
bool
Save
(
FILE
*
aFile
)
const
;
/**
/**
* Function ReadDescr
* Function ReadDescr
* reads the data structures for this object from a FILE in "*.brd" format.
* reads the data structures for this object from a FILE in "*.brd" format.
...
@@ -39,8 +49,10 @@ public:
...
@@ -39,8 +49,10 @@ public:
bool
ReadDescr
(
FILE
*
aFile
,
int
*
aLineNum
);
bool
ReadDescr
(
FILE
*
aFile
,
int
*
aLineNum
);
};
};
/**
/**
* @info A NETCLASS handles a list of nets and the parameters used to route or test these nets
* Class NETCLASS
* handles a list of nets and the parameters used to route or test these nets
*/
*/
class
NETCLASS
class
NETCLASS
{
{
...
@@ -50,12 +62,14 @@ public:
...
@@ -50,12 +62,14 @@ public:
wxArrayString
m_MembersNetNames
;
// List of nets members of this class
wxArrayString
m_MembersNetNames
;
// List of nets members of this class
NET_DESIGN_PARAMS
m_NetParams
;
// values of net classes parameters
NET_DESIGN_PARAMS
m_NetParams
;
// values of net classes parameters
public
:
public
:
NETCLASS
(
BOARD
*
aParent
,
const
wxString
&
aName
=
wxT
(
"default"
)
);
NETCLASS
(
BOARD
*
aParent
,
const
wxString
&
aName
=
wxT
(
"default"
)
);
~
NETCLASS
();
~
NETCLASS
();
/** Function GetMembersCount
/**
*@return the number of nets using this rule
* Function GetMembersCount
* returns the number of nets using this rule
*/
*/
unsigned
GetMembersCount
()
const
unsigned
GetMembersCount
()
const
{
{
...
@@ -101,21 +115,27 @@ public:
...
@@ -101,21 +115,27 @@ public:
bool
ReadDescr
(
FILE
*
aFile
,
int
*
aLineNum
);
bool
ReadDescr
(
FILE
*
aFile
,
int
*
aLineNum
);
};
};
/* This NETCLASS_LIST handles the list of NETCLASS for the board
/**
* Class NETCLASS_LIST handles the list of NETCLASS for the board
* Note: the NETCLASS_LIST is owner of all NETCLASS in list
* Note: the NETCLASS_LIST is owner of all NETCLASS in list
*/
*/
class
NETCLASS_LIST
class
NETCLASS_LIST
{
{
p
ublic
:
p
rotected
:
BOARD
*
m_Parent
;
BOARD
*
m_Parent
;
std
::
vector
<
NETCLASS
*>
m_Netclass_List
;
std
::
vector
<
NETCLASS
*>
m_Netclass_List
;
public
:
public
:
NETCLASS_LIST
(
BOARD
*
aParent
=
NULL
);
NETCLASS_LIST
(
BOARD
*
aParent
=
NULL
);
~
NETCLASS_LIST
();
~
NETCLASS_LIST
();
void
ClearList
();
void
ClearList
();
/** Function GetNetClassCount()
/**
* Function GetNetClassCount()
* @return the number of existing netclasses
* @return the number of existing netclasses
*/
*/
unsigned
GetNetClassCount
()
unsigned
GetNetClassCount
()
...
@@ -153,4 +173,4 @@ public:
...
@@ -153,4 +173,4 @@ public:
};
};
#endif
// #ifndef
CLASS_NETCLASS_H
#endif
//
CLASS_NETCLASS_H
pcbnew/class_netinfo.h
View file @
5c3f35c2
...
@@ -142,10 +142,11 @@ private:
...
@@ -142,10 +142,11 @@ private:
void
Build_Pads_Full_List
();
void
Build_Pads_Full_List
();
};
};
/** class NETINFO_ITEM
* @info This class handle the data relative to a given net
*/
/**
* Class NETINFO_ITEM
* handles the data for a net
*/
class
NETINFO_ITEM
class
NETINFO_ITEM
{
{
private
:
private
:
...
@@ -153,9 +154,9 @@ private:
...
@@ -153,9 +154,9 @@ private:
// Used for fast comparisons in rastnest and DRC computations.
// Used for fast comparisons in rastnest and DRC computations.
wxString
m_Netname
;
// Full net name like /mysheet/mysubsheet/vout used by eeschema
wxString
m_Netname
;
// Full net name like /mysheet/mysubsheet/vout used by eeschema
wxString
m_ShortNetname
;
// short net name, like vout from /mysheet/mysubsheet/vout
wxString
m_ShortNetname
;
// short net name, like vout from /mysheet/mysubsheet/vout
wxString
m_NetClassName
;
/*
Net Class name. if void this is equivalent to "default" (the first
wxString
m_NetClassName
;
//
Net Class name. if void this is equivalent to "default" (the first
*
item of the net classes list
//
item of the net classes list
*/
NET_DESIGN_PARAMS
m_NetParams
;
// values of net classes parameters
NET_DESIGN_PARAMS
m_NetParams
;
// values of net classes parameters
...
@@ -164,10 +165,13 @@ public:
...
@@ -164,10 +165,13 @@ public:
int
m_NbLink
;
// Ratsnets count for this net
int
m_NbLink
;
// Ratsnets count for this net
int
m_NbNoconn
;
// Ratsnets remaining to route count
int
m_NbNoconn
;
// Ratsnets remaining to route count
int
m_Flag
;
// used in some calculations. Had no special meaning
int
m_Flag
;
// used in some calculations. Had no special meaning
std
::
vector
<
D_PAD
*>
m_ListPad
;
// List of pads connected to this net
std
::
vector
<
D_PAD
*>
m_ListPad
;
// List of pads connected to this net
unsigned
m_RatsnestStartIdx
;
/* Starting point of ratsnests of this net (included)
unsigned
m_RatsnestStartIdx
;
/* Starting point of ratsnests of this net (included)
* in a general buffer of ratsnest (a vector<RATSNEST_ITEM*> buffer)
* in a general buffer of ratsnest (a vector<RATSNEST_ITEM*> buffer)
*/
*/
unsigned
m_RatsnestEndIdx
;
// Ending point of ratsnests of this net (excluded) in this buffer
unsigned
m_RatsnestEndIdx
;
// Ending point of ratsnests of this net (excluded) in this buffer
NETINFO_ITEM
(
BOARD_ITEM
*
aParent
);
NETINFO_ITEM
(
BOARD_ITEM
*
aParent
);
...
...
pcbnew/class_netinfo_item.cpp
View file @
5c3f35c2
...
@@ -60,7 +60,7 @@ int NETINFO_ITEM:: ReadDescr( FILE* File, int* LineNum )
...
@@ -60,7 +60,7 @@ int NETINFO_ITEM:: ReadDescr( FILE* File, int* LineNum )
continue
;
continue
;
}
}
if
(
strncmp
(
Line
,
"NetClass"
,
8
)
==
0
)
/* Net Class */
if
(
strncmp
(
Line
,
"NetClass"
,
8
)
==
0
)
{
{
ReadDelimitedText
(
Ltmp
,
Line
+
8
,
sizeof
(
Ltmp
)
);
ReadDelimitedText
(
Ltmp
,
Line
+
8
,
sizeof
(
Ltmp
)
);
m_NetClassName
=
CONV_FROM_UTF8
(
Ltmp
);
m_NetClassName
=
CONV_FROM_UTF8
(
Ltmp
);
...
...
pcbnew/edgemod.cpp
View file @
5c3f35c2
...
@@ -139,13 +139,6 @@ static void ShowEdgeModule( WinEDA_DrawPanel* panel, wxDC* DC, bool erase )
...
@@ -139,13 +139,6 @@ static void ShowEdgeModule( WinEDA_DrawPanel* panel, wxDC* DC, bool erase )
/***************************************************************************/
/***************************************************************************/
void
WinEDA_ModuleEditFrame
::
Edit_Edge_Width
(
EDGE_MODULE
*
Edge
)
void
WinEDA_ModuleEditFrame
::
Edit_Edge_Width
(
EDGE_MODULE
*
Edge
)
/***************************************************************************/
/***************************************************************************/
/* Change the EDGE_MODULE Edge width,
* if Edge == NULL change the width of the entire footprint edges
* @param ModuleSegmentWidth (global) = new width
* @param Edge = edge to edit, or NULL
* @param DC = current Device Context
*/
{
{
MODULE
*
Module
=
GetBoard
()
->
m_Modules
;
MODULE
*
Module
=
GetBoard
()
->
m_Modules
;
...
...
pcbnew/ioascii.cpp
View file @
5c3f35c2
...
@@ -837,8 +837,10 @@ int WinEDA_PcbFrame::ReadPcbFile( FILE* File, bool Append )
...
@@ -837,8 +837,10 @@ int WinEDA_PcbFrame::ReadPcbFile( FILE* File, bool Append )
{
{
NETCLASS
*
netclass
=
new
NETCLASS
(
GetBoard
()
);
NETCLASS
*
netclass
=
new
NETCLASS
(
GetBoard
()
);
netclass
->
ReadDescr
(
File
,
&
LineNum
);
netclass
->
ReadDescr
(
File
,
&
LineNum
);
if
(
!
GetBoard
()
->
m_NetClassesList
.
AddNetclass
(
netclass
)
)
if
(
!
GetBoard
()
->
m_NetClassesList
.
AddNetclass
(
netclass
)
)
delete
netclass
;
delete
netclass
;
continue
;
continue
;
}
}
...
...
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