Loading CHANGELOG.txt +7 −0 Original line number Diff line number Diff line Loading @@ -5,6 +5,13 @@ Started 2007-June-11 Please add newer entries at the top, list the date and your name with email address. 2009-mar-11 UPDATE Jean-Pierre Charras <jean-pierre.charras@inpg.fr> ================================================================================ ++pcbnew: fixed: a bug that can delete an existing zone after creating a new zone, if the new zone contains this existing zone This is a DRC error, buf can be temporary possible when creating complex zones 2009-mar-10 UPDATE Jean-Pierre Charras <jean-pierre.charras@inpg.fr> ================================================================================ ++pcbnew: Loading include/build_version.h +1 −1 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ #ifndef KICAD_BUILD_VERSION #define KICAD_BUILD_VERSION #define BUILD_VERSION wxT("(20090216-RC5)") #define BUILD_VERSION wxT("(20090216-RC6)") COMMON_GLOBL wxString g_BuildVersion #ifdef EDA_BASE Loading pcbnew/zones_test_and_combine_areas.cpp +69 −63 Original line number Diff line number Diff line Loading @@ -336,6 +336,7 @@ int BOARD::AreaPolygonModified( ZONE_CONTAINER* modified_area, m_ZoneDescriptorList[ia]->BuildFilledPolysListData( this ); } } // Test for bad areas: all zones must have more than 2 corners: // Note: should not happen, but just in case. for( unsigned ia1 = 0; ia1 < m_ZoneDescriptorList.size() - 1; ) Loading @@ -343,10 +344,12 @@ int BOARD::AreaPolygonModified( ZONE_CONTAINER* modified_area, ZONE_CONTAINER* zone = m_ZoneDescriptorList[ia1]; if( zone->GetNumCorners() >= 3 ) ia1++; // Remove zone because it is incorrect: else RemoveArea( zone ); } return test; } Loading @@ -362,8 +365,9 @@ int BOARD::AreaPolygonModified( ZONE_CONTAINER* modified_area, */ int BOARD::CombineAllAreasInNet( int aNetCode, bool bMessageBox, bool bUseUtility ) { if( m_ZoneDescriptorList.size() > 1 ) { if( m_ZoneDescriptorList.size() <= 1 ) return 0; // start by testing all area polygons to set utility2 flags for( unsigned ia = 0; ia < m_ZoneDescriptorList.size(); ia++ ) if( m_ZoneDescriptorList[ia]->GetNet() == aNetCode ) Loading @@ -382,6 +386,8 @@ int BOARD::CombineAllAreasInNet( int aNetCode, bool bMessageBox, bool bUseUtilit for( unsigned ia2 = m_ZoneDescriptorList.size() - 1; ia2 > ia1; ia2-- ) { ZONE_CONTAINER* area2 = m_ZoneDescriptorList[ia2]; if( area2->GetNet() != aNetCode ) continue; if( curr_area->GetLayer() == area2->GetLayer() && curr_area->utility2 != -1 && area2->utility2 != -1 ) { Loading Loading @@ -423,7 +429,6 @@ int BOARD::CombineAllAreasInNet( int aNetCode, bool bMessageBox, bool bUseUtilit if( mod_ia1 ) ia1--; // if modified, we need to check it again } } return 0; } Loading Loading @@ -991,7 +996,8 @@ bool DRC::doEdgeZoneDrc( ZONE_CONTAINER* aArea, int aCornerIndex ) for( int ia2 = 0; ia2 < m_pcb->GetAreaCount(); ia2++ ) { ZONE_CONTAINER* Area_To_Test = m_pcb->GetArea( ia2 ); int zone_clearance = max(Area_To_Test->m_ZoneClearance, aArea->m_ZoneClearance); int zone_clearance = max( Area_To_Test->m_ZoneClearance, aArea->m_ZoneClearance ); // test for same layer if( Area_To_Test->GetLayer() != aArea->GetLayer() ) Loading Loading
CHANGELOG.txt +7 −0 Original line number Diff line number Diff line Loading @@ -5,6 +5,13 @@ Started 2007-June-11 Please add newer entries at the top, list the date and your name with email address. 2009-mar-11 UPDATE Jean-Pierre Charras <jean-pierre.charras@inpg.fr> ================================================================================ ++pcbnew: fixed: a bug that can delete an existing zone after creating a new zone, if the new zone contains this existing zone This is a DRC error, buf can be temporary possible when creating complex zones 2009-mar-10 UPDATE Jean-Pierre Charras <jean-pierre.charras@inpg.fr> ================================================================================ ++pcbnew: Loading
include/build_version.h +1 −1 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ #ifndef KICAD_BUILD_VERSION #define KICAD_BUILD_VERSION #define BUILD_VERSION wxT("(20090216-RC5)") #define BUILD_VERSION wxT("(20090216-RC6)") COMMON_GLOBL wxString g_BuildVersion #ifdef EDA_BASE Loading
pcbnew/zones_test_and_combine_areas.cpp +69 −63 Original line number Diff line number Diff line Loading @@ -336,6 +336,7 @@ int BOARD::AreaPolygonModified( ZONE_CONTAINER* modified_area, m_ZoneDescriptorList[ia]->BuildFilledPolysListData( this ); } } // Test for bad areas: all zones must have more than 2 corners: // Note: should not happen, but just in case. for( unsigned ia1 = 0; ia1 < m_ZoneDescriptorList.size() - 1; ) Loading @@ -343,10 +344,12 @@ int BOARD::AreaPolygonModified( ZONE_CONTAINER* modified_area, ZONE_CONTAINER* zone = m_ZoneDescriptorList[ia1]; if( zone->GetNumCorners() >= 3 ) ia1++; // Remove zone because it is incorrect: else RemoveArea( zone ); } return test; } Loading @@ -362,8 +365,9 @@ int BOARD::AreaPolygonModified( ZONE_CONTAINER* modified_area, */ int BOARD::CombineAllAreasInNet( int aNetCode, bool bMessageBox, bool bUseUtility ) { if( m_ZoneDescriptorList.size() > 1 ) { if( m_ZoneDescriptorList.size() <= 1 ) return 0; // start by testing all area polygons to set utility2 flags for( unsigned ia = 0; ia < m_ZoneDescriptorList.size(); ia++ ) if( m_ZoneDescriptorList[ia]->GetNet() == aNetCode ) Loading @@ -382,6 +386,8 @@ int BOARD::CombineAllAreasInNet( int aNetCode, bool bMessageBox, bool bUseUtilit for( unsigned ia2 = m_ZoneDescriptorList.size() - 1; ia2 > ia1; ia2-- ) { ZONE_CONTAINER* area2 = m_ZoneDescriptorList[ia2]; if( area2->GetNet() != aNetCode ) continue; if( curr_area->GetLayer() == area2->GetLayer() && curr_area->utility2 != -1 && area2->utility2 != -1 ) { Loading Loading @@ -423,7 +429,6 @@ int BOARD::CombineAllAreasInNet( int aNetCode, bool bMessageBox, bool bUseUtilit if( mod_ia1 ) ia1--; // if modified, we need to check it again } } return 0; } Loading Loading @@ -991,7 +996,8 @@ bool DRC::doEdgeZoneDrc( ZONE_CONTAINER* aArea, int aCornerIndex ) for( int ia2 = 0; ia2 < m_pcb->GetAreaCount(); ia2++ ) { ZONE_CONTAINER* Area_To_Test = m_pcb->GetArea( ia2 ); int zone_clearance = max(Area_To_Test->m_ZoneClearance, aArea->m_ZoneClearance); int zone_clearance = max( Area_To_Test->m_ZoneClearance, aArea->m_ZoneClearance ); // test for same layer if( Area_To_Test->GetLayer() != aArea->GetLayer() ) Loading