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Commit 35e1c659 authored by Dick Hollenbeck's avatar Dick Hollenbeck
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move project templates from source tree to library tree

parent d23724f5
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template/CMakeLists.txt
View file @ 35e1c659
...@@ -2,17 +2,3 @@ install(FILES kicad.pro ...@@ -2,17 +2,3 @@ install(FILES kicad.pro
DESTINATION ${KICAD_TEMPLATE} DESTINATION ${KICAD_TEMPLATE}
COMPONENT resources) COMPONENT resources)
# template_lst is a list of all templates.
set( template_lst
raspberrypi-gpio
stm32f100-discovery-shield
ti-stellaris-boosterpack40
ti-stellaris-boosterpack40_min
)
foreach( tpl ${template_lst} )
install( DIRECTORY ${tpl}
DESTINATION ${KICAD_TEMPLATE}
COMPONENT templates )
endforeach()
template/raspberrypi-gpio/meta/info.html deleted 100755 → 0
View file @ d23724f5
<html>
<head>
<title>Raspberry Pi - Expansion Board</title>
</head>
<body>
<h1>Raspberry Pi</h1>
<h2>Expansion Board</h2>
<p>This project template is the basis of an expansion board for the
<a href="http://www.raspberrypi.org/" target="blank">Raspberry Pi $25 ARM
board.</a></p>
<p>This base project includes a PCB edge defined as the same size as the
Raspberry-Pi PCB with the connectors placed correctly to align the two boards.
All IO present on the Raspberry-Pi board is connected to the project through the
0.1" expansion headers.</p>
<p>The board outline looks like the following:</p>
<p><img src="brd.png"></p>
<p>(c)2012 Brian Sidebotham<br>
(c)2012 Kicad Developers<br></p>
</body>
</html>
template/raspberrypi-gpio/raspberrypi-gpio-cache.lib deleted 100755 → 0
View file @ d23724f5
EESchema-LIBRARY Version 2.3 Date: 15/11/2012 21:22:43
#encoding utf-8
#
# +3.3V
#
DEF +3.3V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -40 30 H I C CNN
F1 "+3.3V" 0 110 30 H V C CNN
ALIAS +3,3V
DRAW
X +3.3V 1 0 0 0 U 30 30 0 0 W N
C 0 60 20 0 1 0 N
P 3 0 1 0 0 0 0 40 0 40 N
ENDDRAW
ENDDEF
#
# +5V
#
DEF +5V #PWR 0 40 Y Y 1 F P
F0 "#PWR" 0 90 20 H I C CNN
F1 "+5V" 0 90 30 H V C CNN
DRAW
X +5V 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 4 0 1 0 0 0 0 30 0 30 0 30 N
ENDDRAW
ENDDEF
#
# CONN_13X2
#
DEF CONN_13X2 P 0 10 Y N 1 F N
F0 "P" 0 700 60 H V C CNN
F1 "CONN_13X2" 0 0 50 V V C CNN
DRAW
S -100 650 100 -650 0 1 0 N
X P1 1 -400 600 300 R 40 30 1 1 P I
X P2 2 400 600 300 L 40 30 1 1 P I
X P3 3 -400 500 300 R 40 30 1 1 P I
X P4 4 400 500 300 L 40 30 1 1 P I
X P5 5 -400 400 300 R 40 30 1 1 P I
X P6 6 400 400 300 L 40 30 1 1 P I
X P7 7 -400 300 300 R 40 30 1 1 P I
X P8 8 400 300 300 L 40 30 1 1 P I
X P9 9 -400 200 300 R 40 30 1 1 P I
X P10 10 400 200 300 L 40 30 1 1 P I
X P20 20 400 -300 300 L 40 30 1 1 P I
X P11 11 -400 100 300 R 40 30 1 1 P I
X P21 21 -400 -400 300 R 40 30 1 1 P I
X P12 12 400 100 300 L 40 30 1 1 P I
X P22 22 400 -400 300 L 40 30 1 1 P I
X P13 13 -400 0 300 R 40 30 1 1 P I
X P23 23 -400 -500 300 R 40 30 1 1 P I
X P14 14 400 0 300 L 40 30 1 1 P I
X P20 24 400 -500 300 L 40 30 1 1 P I
X P15 15 -400 -100 300 R 40 30 1 1 P I
X P24 25 -400 -600 300 R 40 30 1 1 P I
X P16 16 400 -100 300 L 40 30 1 1 P I
X P22 26 400 -600 300 L 40 30 1 1 P I
X P17 17 -400 -200 300 R 40 30 1 1 P I
X P18 18 400 -200 300 L 40 30 1 1 P I
X P19 19 -400 -300 300 R 40 30 1 1 P I
ENDDRAW
ENDDEF
#
# GND
#
DEF ~GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
F1 "GND" 0 -70 30 H I C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X GND 1 0 0 0 U 30 30 1 1 W N
ENDDRAW
ENDDEF
#
#End Library
template/raspberrypi-gpio/raspberrypi-gpio.cmp deleted 100755 → 0
View file @ d23724f5
Cmp-Mod V01 Created by CvPcb (2012-11-15 BZR 3804)-testing date = 15/11/2012 21:23:25
BeginCmp
TimeStamp = /50A55ABA;
Reference = P1;
ValeurCmp = CONN_13X2;
IdModule = pin_array_13x2;
EndCmp
EndListe
template/raspberrypi-gpio/raspberrypi-gpio.kicad_pcb deleted 100755 → 0
View file @ d23724f5
(kicad_pcb (version 3) (host pcbnew "(2012-11-30 BZR 3829)-testing")
(general
(links 0)
(no_connects 0)
(area 127.606667 112.000001 242.964763 190.8)
(thickness 1.6)
(drawings 41)
(tracks 0)
(zones 0)
(modules 1)
(nets 4)
)
(page A3)
(title_block
(date "15 nov 2012")
)
(layers
(15 F.Cu signal)
(0 B.Cu signal)
(16 B.Adhes user)
(17 F.Adhes user)
(18 B.Paste user)
(19 F.Paste user)
(20 B.SilkS user)
(21 F.SilkS user)
(22 B.Mask user)
(23 F.Mask user)
(24 Dwgs.User user)
(25 Cmts.User user)
(26 Eco1.User user)
(27 Eco2.User user)
(28 Edge.Cuts user)
)
(setup
(last_trace_width 0.2)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.1524)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.9)
(via_drill 0.6)
(via_min_size 0.8)
(via_min_drill 0.5)
(uvia_size 0.5)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.5)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1 1)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1 1)
(pad_drill 0.6)
(pad_to_mask_clearance 0)
(aux_axis_origin 143.5 181)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 3178497)
(usegerberextensions true)
(excludeedgelayer true)
(linewidth 152400)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotothertext true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 +3.3V)
(net 2 +5V)
(net 3 GND)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.2)
(via_dia 0.9)
(via_drill 0.6)
(uvia_dia 0.5)
(uvia_drill 0.1)
(add_net "")
(add_net +3.3V)
(add_net +5V)
(add_net GND)
)
(net_class Power ""
(clearance 0.2)
(trace_width 0.5)
(via_dia 1)
(via_drill 0.7)
(uvia_dia 0.5)
(uvia_drill 0.1)
)
(module pin_array_13x2 (layer F.Cu) (tedit 50A55E7A) (tstamp 50A55DA3)
(at 161 129)
(descr "Double rangee de contacts 2 x 12 pins")
(tags CONN)
(path /50A55ABA)
(fp_text reference P1 (at -15.5 4) (layer F.SilkS)
(effects (font (size 1.016 1.016) (thickness 0.2032)))
)
(fp_text value CONN_13X2 (at 12 4) (layer F.SilkS)
(effects (font (size 1.016 1.016) (thickness 0.2032)))
)
(fp_line (start -16.51 2.54) (end 16.51 2.54) (layer F.SilkS) (width 0.2032))
(fp_line (start 16.51 -2.54) (end -16.51 -2.54) (layer F.SilkS) (width 0.2032))
(fp_line (start -16.51 -2.54) (end -16.51 2.54) (layer F.SilkS) (width 0.2032))
(fp_line (start 16.51 2.54) (end 16.51 -2.54) (layer F.SilkS) (width 0.2032))
(pad 1 thru_hole rect (at -15.24 1.27) (size 1.524 1.524) (drill 0.8128)
(layers *.Cu *.Mask F.SilkS)
(net 1 +3.3V)
)
(pad 2 thru_hole circle (at -15.24 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
(net 2 +5V)
)
(pad 3 thru_hole circle (at -12.7 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 4 thru_hole circle (at -12.7 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 5 thru_hole circle (at -10.16 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 6 thru_hole circle (at -10.16 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
(net 3 GND)
)
(pad 7 thru_hole circle (at -7.62 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 8 thru_hole circle (at -7.62 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 9 thru_hole circle (at -5.08 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 10 thru_hole circle (at -5.08 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 11 thru_hole circle (at -2.54 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 12 thru_hole circle (at -2.54 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 13 thru_hole circle (at 0 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 14 thru_hole circle (at 0 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 15 thru_hole circle (at 2.54 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 16 thru_hole circle (at 2.54 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 17 thru_hole circle (at 5.08 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 18 thru_hole circle (at 5.08 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 19 thru_hole circle (at 7.62 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 20 thru_hole circle (at 7.62 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 21 thru_hole circle (at 10.16 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 22 thru_hole circle (at 10.16 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 23 thru_hole circle (at 12.7 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 24 thru_hole circle (at 12.7 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 25 thru_hole circle (at 15.24 1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(pad 26 thru_hole circle (at 15.24 -1.27) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask F.SilkS)
)
(model pin_array/pins_array_13x2.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(gr_text "RASPBERRY-PI ADDON BOARD\nVIEW FROM TOP\nNOTE: P1 SHOULD BE FITTED ON THE REVERSE OF THE BOARD" (at 144 183.5) (layer Dwgs.User)
(effects (font (size 2 1.7) (thickness 0.12)) (justify left))
)
(dimension 56 (width 0.12) (layer Dwgs.User)
(gr_text "56.000 mm" (at 132 153 90) (layer Dwgs.User)
(effects (font (size 1 1) (thickness 0.12)))
)
(feature1 (pts (xy 143.5 125) (xy 131 125)))
(feature2 (pts (xy 143.5 181) (xy 131 181)))
(crossbar (pts (xy 133 181) (xy 133 125)))
(arrow1a (pts (xy 133 125) (xy 133.58642 126.126503)))
(arrow1b (pts (xy 133 125) (xy 132.41358 126.126503)))
(arrow2a (pts (xy 133 181) (xy 133.58642 179.873497)))
(arrow2b (pts (xy 133 181) (xy 132.41358 179.873497)))
)
(dimension 85 (width 0.12) (layer Dwgs.User)
(gr_text "85.000 mm" (at 186 113.000001) (layer Dwgs.User)
(effects (font (size 1 1) (thickness 0.12)))
)
(feature1 (pts (xy 228.5 125) (xy 228.5 112.000001)))
(feature2 (pts (xy 143.5 125) (xy 143.5 112.000001)))
(crossbar (pts (xy 143.5 114.000001) (xy 228.5 114.000001)))
(arrow1a (pts (xy 228.5 114.000001) (xy 227.373497 114.586421)))
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(arrow2a (pts (xy 143.5 114.000001) (xy 144.626503 114.586421)))
(arrow2b (pts (xy 143.5 114.000001) (xy 144.626503 113.413581)))
)
(gr_text "RCA\nREMOVE WITH\nSTD HEADERS\n!NO TH ABOVE!" (at 188.5 118) (layer Dwgs.User)
(effects (font (size 1 1) (thickness 0.12)))
)
(gr_text "1/8\" JACK\nOK WITH STD\nHEADERS\n!NO TH ABOVE!" (at 207.5 118) (layer Dwgs.User)
(effects (font (size 1 1) (thickness 0.12)))
)
(gr_line (start 228.5 142) (end 228.5 125) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 217.5 142) (end 228.5 142) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 217.5 157) (end 217.5 142) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 228.5 157) (end 217.5 157) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 228.5 181) (end 228.5 157) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_text "DOUBLE USB\nCUTOUT FOR ALL\nBOARDS" (at 236.5 149) (layer Dwgs.User)
(effects (font (size 1 1) (thickness 0.12)))
)
(gr_text "RJ45\nCUTOUT FOR STD\nHEADERS\n!NO TH ABOVE!" (at 236.5 170) (layer Dwgs.User)
(effects (font (size 1 1) (thickness 0.12)))
)
(gr_line (start 207.5 181) (end 228.5 162) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 207.5 162) (end 228.5 181) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 207.5 162) (end 228.5 162) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 207.5 181) (end 207.5 162) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 228.5 181) (end 207.5 181) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 228.5 162) (end 228.5 181) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 217.5 157) (end 228.5 142) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 217.5 142) (end 228.5 157) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 217.5 142) (end 228.5 142) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 217.5 157) (end 217.5 142) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 228.5 157) (end 217.5 157) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 228.5 142) (end 228.5 157) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 182.5 125) (end 194.5 139) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 182.5 139) (end 194.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 194.5 139) (end 194.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 182.5 139) (end 194.5 139) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 182.5 138) (end 182.5 139) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 214.5 125) (end 200.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 200.5 125) (end 214.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 200.5 138) (end 200.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 214.5 138) (end 200.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 214.5 125) (end 214.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 200.5 125) (end 214.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 194.5 125) (end 182.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 194.5 138) (end 194.5 125) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 182.5 125) (end 182.5 138) (angle 90) (layer Dwgs.User) (width 0.2))
(gr_line (start 228.5 125) (end 143.5 125) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 143.5 181) (end 228.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 143.5 125) (end 143.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
)
template/raspberrypi-gpio/raspberrypi-gpio.net deleted 100755 → 0
View file @ d23724f5
# EESchema Netlist Version 1.1 created 15/11/2012 21:22:35
(
( /50A55ABA $noname P1 CONN_13X2 {Lib=CONN_13X2}
( 1 +3.3V )
( 2 +5V )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 GND )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
( 11 ? )
( 12 ? )
( 13 ? )
( 14 ? )
( 15 ? )
( 16 ? )
( 17 ? )
( 18 ? )
( 19 ? )
( 20 ? )
( 21 ? )
( 22 ? )
( 23 ? )
( 24 ? )
( 25 ? )
( 26 ? )
)
)
*
{ Pin List by Nets
}
#End
template/raspberrypi-gpio/raspberrypi-gpio.pro deleted 100755 → 0
View file @ d23724f5
update=15/11/2012 21:11:59
version=1
last_client=kicad
[cvpcb]
version=1
NetITyp=0
NetIExt=.net
PkgIExt=.pkg
NetDir=
LibDir=
NetType=0
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
PadDrlX=320
PadDimH=600
PadDimV=600
PadForm=1
PadMask=14745599
ViaDiam=450
ViaDril=250
Isol=60
Countlayer=2
Lpiste=170
RouteTo=15
RouteBo=0
TypeVia=3
Segm45=1
Racc45=1
Unite=0
SegFill=1
SegAffG=0
NewAffG=1
PadFill=1
PadAffG=1
PadSNum=1
ModAffC=0
ModAffT=0
PcbAffT=0
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
HPGLnum=1
HPGdiam=15
HPGLSpd=20
HPGLrec=2
HPGLorg=0
GERBmin=15
VEgarde=100
DrawLar=150
EdgeLar=150
TxtLar=120
MSegLar=150
ForPlot=1
WpenSer=10
UserGrX=0,01
UserGrY=0,01
UserGrU=1
DivGrPc=1
TimeOut=600
MaxLnkS=3
ShowRat=0
ShowMRa=1
[pcbnew/libraries]
LibDir=
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
LibName7=display
LibName8=valves
LibName9=led
LibName10=dip_sockets
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
SimCmd=
UseNetN=0
LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
[general]
version=1
template/raspberrypi-gpio/raspberrypi-gpio.sch deleted 100755 → 0
View file @ d23724f5
EESchema Schematic File Version 2 date 15/11/2012 21:22:43
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:rpi-cache
EELAYER 27 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date "15 nov 2012"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_13X2 P1
U 1 1 50A55ABA
P 2400 1800
F 0 "P1" H 2400 2500 60 0000 C CNN
F 1 "CONN_13X2" V 2400 1800 50 0000 C CNN
1 2400 1800
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR01
U 1 1 50A55B18
P 1900 1050
F 0 "#PWR01" H 1900 1010 30 0001 C CNN
F 1 "+3.3V" H 1900 1160 30 0000 C CNN
1 1900 1050
1 0 0 -1
$EndComp
Wire Wire Line
1900 1050 1900 1200
Wire Wire Line
1900 1200 2000 1200
$Comp
L +5V #PWR02
U 1 1 50A55B2E
P 2900 1050
F 0 "#PWR02" H 2900 1140 20 0001 C CNN
F 1 "+5V" H 2900 1140 30 0000 C CNN
1 2900 1050
1 0 0 -1
$EndComp
Wire Wire Line
2900 1050 2900 1200
Wire Wire Line
2900 1200 2800 1200
NoConn ~ 2800 1300
Wire Wire Line
2000 1300 1250 1300
Wire Wire Line
2000 1400 1250 1400
Text Label 1250 1300 0 60 ~ 0
GPIO0(SDA)
Text Label 1250 1400 0 60 ~ 0
GPIO1(SCL)
Wire Wire Line
2000 1500 1250 1500
Text Label 1250 1500 0 60 ~ 0
GPIO4
NoConn ~ 2000 1600
Wire Wire Line
2000 1700 1250 1700
Wire Wire Line
2000 1800 1250 1800
Wire Wire Line
2000 1900 1250 1900
Text Label 1250 1700 0 60 ~ 0
GPIO17
Text Label 1250 1800 0 60 ~ 0
GPIO21
Text Label 1250 1900 0 60 ~ 0
GPIO22
NoConn ~ 2000 2000
Wire Wire Line
2000 2100 1250 2100
Wire Wire Line
2000 2200 1250 2200
Wire Wire Line
2000 2300 1250 2300
Text Label 1250 2100 0 60 ~ 0
GPIO10(MOSI)
Text Label 1250 2200 0 60 ~ 0
GPIO9(MISO)
Text Label 1250 2300 0 60 ~ 0
GPIO11(SCLK)
NoConn ~ 2000 2400
$Comp
L GND #PWR03
U 1 1 50A55C3F
P 2900 2500
F 0 "#PWR03" H 2900 2500 30 0001 C CNN
F 1 "GND" H 2900 2430 30 0001 C CNN
1 2900 2500
1 0 0 -1
$EndComp
Wire Wire Line
2900 2500 2900 1400
Wire Wire Line
2900 1400 2800 1400
Wire Wire Line
2800 1500 3500 1500
Wire Wire Line
2800 1600 3500 1600
Text Label 3500 1500 2 60 ~ 0
TXD
Text Label 3500 1600 2 60 ~ 0
RXD
Wire Wire Line
2800 1700 3500 1700
Text Label 3500 1700 2 60 ~ 0
GPIO18
NoConn ~ 2800 1800
Wire Wire Line
2800 1900 3500 1900
Wire Wire Line
2800 2000 3500 2000
Text Label 3500 1900 2 60 ~ 0
GPIO23
Text Label 3500 2000 2 60 ~ 0
GPIO24
NoConn ~ 2800 2100
Wire Wire Line
2800 2200 3500 2200
Text Label 3500 2200 2 60 ~ 0
GPIO25
Wire Wire Line
2800 2300 3500 2300
Wire Wire Line
2800 2400 3500 2400
Text Label 3500 2300 2 60 ~ 0
GPIO8(CE0)
Text Label 3500 2400 2 60 ~ 0
GPIO7(CE1)
$EndSCHEMATC
template/stm32f100-discovery-shield/meta/info.html deleted 100644 → 0
View file @ d23724f5
<html>
<head>
<title>STM32 Discovery</title>
</head>
<body>
<h1>STM32 Value Line Discovery - STM32F100 Cortex-M3&trade; Microcontroller Board</h1>
<h2>Expansion Board</h2>
This project is a template of an expansion board for the
<a href="http://www.st.com/stm32-discovery/" target="blank">STM32 Value Line Discovery
</a> board.
<br><br>
This project includes a PCB edge defined as the same size as the STM32F100 Discovery
board with the connectors placed correctly to align the two boards. All IO present on the
Discovery board is connected to the project through 0.1" expansion headers.
<br><br>
<P ALIGN=CENTER><IMG SRC="board_stm32vl_discovery.png" NAME="brd" ALIGN=BOTTOM
BORDER=0><BR><BR><BR><BR>
</P>
(c)2012 Kerusey Karyu<br>
</body>
</html>
template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib deleted 100644 → 0
View file @ d23724f5
EESchema-LIBRARY Version 2.3 Date: 2012-10-20 12:45:55
#encoding utf-8
#
# +3.3V
#
DEF +3.3V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -40 30 H I C CNN
F1 "+3.3V" 0 110 30 H V C CNN
ALIAS +3,3V
DRAW
X +3.3V 1 0 0 0 U 30 30 0 0 W N
C 0 60 20 0 1 0 N
P 3 0 1 0 0 0 0 40 0 40 N
ENDDRAW
ENDDEF
#
# +5V
#
DEF +5V #PWR 0 40 Y Y 1 F P
F0 "#PWR" 0 90 20 H I C CNN
F1 "+5V" 0 90 30 H V C CNN
DRAW
X +5V 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 4 0 1 0 0 0 0 30 0 30 0 30 N
ENDDRAW
ENDDEF
#
# CONN28
#
DEF CONN28 P 0 40 Y N 1 F N
F0 "P" -50 0 60 V V C CNN
F1 "CONN28" 50 0 60 V V C CNN
DRAW
S -100 -1400 150 1400 0 1 0 f
X P1 1 -350 1350 250 R 50 50 1 1 P I
X P2 2 -350 1250 250 R 50 50 1 1 P I
X P3 3 -350 1150 250 R 50 50 1 1 P I
X P4 4 -350 1050 250 R 50 50 1 1 P I
X P5 5 -350 950 250 R 50 50 1 1 P I
X P6 6 -350 850 250 R 50 50 1 1 P I
X P7 7 -350 750 250 R 50 50 1 1 P I
X P8 8 -350 650 250 R 50 50 1 1 P I
X P9 9 -350 550 250 R 50 50 1 1 P I
X P10 10 -350 450 250 R 50 50 1 1 P I
X P20 20 -350 -550 250 R 50 50 1 1 P I
X P11 11 -350 350 250 R 50 50 1 1 P I
X P21 21 -350 -650 250 R 50 50 1 1 P I
X P12 12 -350 250 250 R 50 50 1 1 P I
X P22 22 -350 -750 250 R 50 50 1 1 P I
X P13 13 -350 150 250 R 50 50 1 1 P I
X P23 23 -350 -850 250 R 50 50 1 1 P I
X P14 14 -350 50 250 R 50 50 1 1 P I
X P24 24 -350 -950 250 R 50 50 1 1 P I
X P15 15 -350 -50 250 R 50 50 1 1 P I
X P25 25 -350 -1050 250 R 50 50 1 1 P I
X P16 16 -350 -150 250 R 50 50 1 1 P I
X P26 26 -350 -1150 250 R 50 50 1 1 P I
X P17 17 -350 -250 250 R 50 50 1 1 P I
X P27 27 -350 -1250 250 R 50 50 1 1 P I
X P18 18 -350 -350 250 R 50 50 1 1 P I
X P28 28 -350 -1350 250 R 50 50 1 1 P I
X P19 19 -350 -450 250 R 50 50 1 1 P I
ENDDRAW
ENDDEF
#
# CONN6
#
DEF CONN6 P 0 40 Y N 1 F N
F0 "P" -50 0 60 V V C CNN
F1 "CONN6" 50 0 60 V V C CNN
DRAW
S -100 -300 150 300 0 1 0 f
X P1 1 -350 250 250 R 50 50 1 1 P I
X P2 2 -350 150 250 R 50 50 1 1 P I
X P3 3 -350 50 250 R 50 50 1 1 P I
X P4 4 -350 -50 250 R 50 50 1 1 P I
X P5 5 -350 -150 250 R 50 50 1 1 P I
X P6 6 -350 -250 250 R 50 50 1 1 P I
ENDDRAW
ENDDEF
#
# GND
#
DEF ~GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
F1 "GND" 0 -70 30 H I C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X GND 1 0 0 0 U 30 30 1 1 W N
ENDDRAW
ENDDEF
#
#End Library
template/stm32f100-discovery-shield/stm32f100-discovery-shield.cmp deleted 100644 → 0
View file @ d23724f5
Cmp-Mod V01 Created by CvPcb (2012-10-17 BZR 3773)-testing date = 2012-10-20 12:09:50
BeginCmp
TimeStamp = /50827277;
Reference = P1;
ValeurCmp = CONN28;
IdModule = PIN_ARRAY_28X1;
EndCmp
BeginCmp
TimeStamp = /50827286;
Reference = P2;
ValeurCmp = CONN28;
IdModule = PIN_ARRAY_28X1;
EndCmp
BeginCmp
TimeStamp = /50827295;
Reference = P3;
ValeurCmp = CONN6;
IdModule = PIN_ARRAY_6X1;
EndCmp
EndListe
template/stm32f100-discovery-shield/stm32f100-discovery-shield.dcm deleted 100644 → 0
View file @ d23724f5
EESchema-DOCLIB Version 2.0 Date: 2012-10-20 11:34:59
#
$CMP CONN28
D Symbole general de connexion
K CONN
$ENDCMP
#
$CMP CONN6
D Symbole general de connexion
K CONN
$ENDCMP
#
#End Doc Library
template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb deleted 100644 → 0
View file @ d23724f5
(kicad_pcb (version 3) (host pcbnew "(2013-02-23 BZR 3971)-testing")
(general
(links 3)
(no_connects 3)
(area 32.945069 34.215069 76.274931 118.819931)
(thickness 1.6002)
(drawings 5)
(tracks 0)
(zones 0)
(modules 3)
(nets 4)
)
(page A3)
(title_block
(title "STM32 Value Line Discovery - Shiled board")
(rev 1.0)
)
(layers
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(0 Back signal)
(16 Dessous.Adhes user)
(17 Dessus.Adhes user)
(18 Dessous.Pate user)
(19 Dessus.Pate user)
(20 Dessous.SilkS user)
(21 Dessus.SilkS user)
(22 Dessous.Masque user)
(23 Dessus.Masque user)
(24 Dessin.User user)
(25 Cmts.User user)
(26 Eco1.User user)
(27 Eco2.User user)
(28 Contours.Ci user)
)
(setup
(last_trace_width 0.254)
(trace_clearance 0.254)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.254)
(segment_width 0.20066)
(edge_width 0.14986)
(via_size 0.889)
(via_drill 0.635)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.29972)
(pcb_text_size 1.00076 1.00076)
(mod_edge_width 0.14986)
(mod_text_size 1.00076 1.00076)
(mod_text_width 0.14986)
(pad_size 1.00076 1.00076)
(pad_drill 0.59944)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 3178497)
(usegerberextensions true)
(excludeedgelayer true)
(linewidth 60)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotothertext true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 +3.3V)
(net 2 +5V)
(net 3 GND)
(net_class Default "To jest domyślna klasa połączeń."
(clearance 0.254)
(trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net "")
(add_net +3.3V)
(add_net +5V)
(add_net GND)
)
(module PIN_ARRAY_6X1 locked (layer Front) (tedit 50827C81) (tstamp 50827C60)
(at 55.88 113.03)
(descr "Single rangee contacts 1 x 6 pins")
(tags CONN)
(path /50827295)
(fp_text reference P3 (at -8.89 0) (layer Dessus.SilkS)
(effects (font (size 0.63246 0.63246) (thickness 0.15748)))
)
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)
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(fp_line (start 7.62 -1.27) (end 7.62 1.27) (layer Dessus.SilkS) (width 0.14986))
(fp_line (start 7.62 1.27) (end -7.62 1.27) (layer Dessus.SilkS) (width 0.14986))
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)
(pad 2 thru_hole circle (at -3.81 0) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 4 thru_hole circle (at 1.27 0) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
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(pad 6 thru_hole circle (at 6.35 0) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
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(pad 3 thru_hole circle (at -1.27 0) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 5 thru_hole circle (at 3.81 0) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
)
(module PIN_ARRAY_28X1 locked (layer Front) (tedit 50827C6F) (tstamp 50827C84)
(at 39.37 73.66 270)
(descr "Single rangee contacts 1 x 28 pins")
(tags CONN)
(path /50827277)
(fp_text reference P1 (at -36.195 0 360) (layer Dessus.SilkS)
(effects (font (size 0.63246 0.63246) (thickness 0.15748)))
)
(fp_text value CONN28 (at -36.195 0 360) (layer Dessus.SilkS) hide
(effects (font (size 0.63246 0.63246) (thickness 0.15748)))
)
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(fp_line (start 35.56 -1.27) (end 35.56 1.27) (layer Dessus.SilkS) (width 0.14986))
(fp_line (start 35.56 1.27) (end -35.56 1.27) (layer Dessus.SilkS) (width 0.14986))
(fp_line (start -35.56 1.27) (end -35.56 -1.27) (layer Dessus.SilkS) (width 0.14986))
(pad 1 thru_hole rect (at -34.29 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
(net 3 GND)
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(pad 2 thru_hole circle (at -31.75 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
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(pad 11 thru_hole circle (at -8.89 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 4 thru_hole circle (at -26.67 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
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(layers *.Cu *.Mask Dessus.SilkS)
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(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 15 thru_hole circle (at 1.27 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 8 thru_hole circle (at -16.51 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 17 thru_hole circle (at 6.35 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 10 thru_hole circle (at -11.43 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
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(layers *.Cu *.Mask Dessus.SilkS)
)
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(layers *.Cu *.Mask Dessus.SilkS)
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(layers *.Cu *.Mask Dessus.SilkS)
)
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(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 16 thru_hole circle (at 3.81 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 25 thru_hole circle (at 26.67 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 18 thru_hole circle (at 8.89 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
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(pad 27 thru_hole circle (at 31.75 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 20 thru_hole circle (at 13.97 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 22 thru_hole circle (at 19.05 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 24 thru_hole circle (at 24.13 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
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(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 28 thru_hole circle (at 34.29 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
(net 3 GND)
)
(pad 3 thru_hole circle (at -29.21 0 270) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
(net 1 +3.3V)
)
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)
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(at 69.85 73.66 90)
(descr "Single rangee contacts 1 x 28 pins")
(tags CONN)
(path /50827286)
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(effects (font (size 0.63246 0.63246) (thickness 0.15748)))
)
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(layers *.Cu *.Mask Dessus.SilkS)
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(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 24 thru_hole circle (at 24.13 0 90) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 26 thru_hole circle (at 29.21 0 90) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
(net 2 +5V)
)
(pad 28 thru_hole circle (at 34.29 0 90) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
(net 3 GND)
)
(pad 3 thru_hole circle (at -29.21 0 90) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 5 thru_hole circle (at -24.13 0 90) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 7 thru_hole circle (at -19.05 0 90) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 9 thru_hole circle (at -13.97 0 90) (size 1.524 1.524) (drill 1.016)
(layers *.Cu *.Mask Dessus.SilkS)
)
)
(gr_text "STM32 Value Line Discovery - Shield" (at 48.133 117.475) (layer Dessus.SilkS)
(effects (font (size 1.00076 1.00076) (thickness 0.25146)))
)
(gr_line (start 33.02 34.29) (end 33.02 118.745) (angle 90) (layer Contours.Ci) (width 0.14986))
(gr_line (start 76.2 118.745) (end 76.2 34.29) (angle 90) (layer Contours.Ci) (width 0.14986))
(gr_line (start 76.2 118.745) (end 33.02 118.745) (angle 90) (layer Contours.Ci) (width 0.14986))
(gr_line (start 33.02 34.29) (end 76.2 34.29) (angle 90) (layer Contours.Ci) (width 0.14986))
(zone (net 3) (net_name GND) (layer Back) (tstamp 50827DC8) (hatch edge 0.508)
(connect_pads (clearance 0.508))
(min_thickness 0.254)
(fill (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.889))
(polygon
(pts
(xy 76.073 118.618) (xy 33.147 118.618) (xy 33.147 34.417) (xy 76.073 34.417)
)
)
)
)
template/stm32f100-discovery-shield/stm32f100-discovery-shield.lib deleted 100644 → 0
View file @ d23724f5
EESchema-LIBRARY Version 2.3 Date: 2012-10-20 11:34:59
#encoding utf-8
#
# CONN28
#
DEF CONN28 P 0 40 Y N 1 F N
F0 "P" -50 0 60 V V C CNN
F1 "CONN28" 50 0 60 V V C CNN
DRAW
S -100 -1400 150 1400 0 1 0 f
X P1 1 -350 1350 250 R 50 50 1 1 P I
X P2 2 -350 1250 250 R 50 50 1 1 P I
X P3 3 -350 1150 250 R 50 50 1 1 P I
X P4 4 -350 1050 250 R 50 50 1 1 P I
X P5 5 -350 950 250 R 50 50 1 1 P I
X P6 6 -350 850 250 R 50 50 1 1 P I
X P7 7 -350 750 250 R 50 50 1 1 P I
X P8 8 -350 650 250 R 50 50 1 1 P I
X P9 9 -350 550 250 R 50 50 1 1 P I
X P10 10 -350 450 250 R 50 50 1 1 P I
X P20 20 -350 -550 250 R 50 50 1 1 P I
X P11 11 -350 350 250 R 50 50 1 1 P I
X P21 21 -350 -650 250 R 50 50 1 1 P I
X P12 12 -350 250 250 R 50 50 1 1 P I
X P22 22 -350 -750 250 R 50 50 1 1 P I
X P13 13 -350 150 250 R 50 50 1 1 P I
X P23 23 -350 -850 250 R 50 50 1 1 P I
X P14 14 -350 50 250 R 50 50 1 1 P I
X P24 24 -350 -950 250 R 50 50 1 1 P I
X P15 15 -350 -50 250 R 50 50 1 1 P I
X P25 25 -350 -1050 250 R 50 50 1 1 P I
X P16 16 -350 -150 250 R 50 50 1 1 P I
X P26 26 -350 -1150 250 R 50 50 1 1 P I
X P17 17 -350 -250 250 R 50 50 1 1 P I
X P27 27 -350 -1250 250 R 50 50 1 1 P I
X P18 18 -350 -350 250 R 50 50 1 1 P I
X P28 28 -350 -1350 250 R 50 50 1 1 P I
X P19 19 -350 -450 250 R 50 50 1 1 P I
ENDDRAW
ENDDEF
#
# CONN6
#
DEF CONN6 P 0 40 Y N 1 F N
F0 "P" -50 0 60 V V C CNN
F1 "CONN6" 50 0 60 V V C CNN
DRAW
S -100 -300 150 300 0 1 0 f
X P1 1 -350 250 250 R 50 50 1 1 P I
X P2 2 -350 150 250 R 50 50 1 1 P I
X P3 3 -350 50 250 R 50 50 1 1 P I
X P4 4 -350 -50 250 R 50 50 1 1 P I
X P5 5 -350 -150 250 R 50 50 1 1 P I
X P6 6 -350 -250 250 R 50 50 1 1 P I
ENDDRAW
ENDDEF
#
#End Library
template/stm32f100-discovery-shield/stm32f100-discovery-shield.mod deleted 100644 → 0
View file @ d23724f5
PCBNEW-LibModule-V1 2012-10-20 12:13:07
# encoding utf-8
Units deci-mils
$INDEX
PIN_ARRAY_28X1
PIN_ARRAY_6X1
$EndINDEX
$MODULE PIN_ARRAY_28X1
Po 0 0 0 15 50827920 00000000 ~~
Li PIN_ARRAY_28X1
Cd Single rangee contacts 1 x 28 pins
Kw CONN
Sc 0
AR
Op 0 0 0
T0 0 -800 249 249 0 62 N V 21 N "PIN_ARRAY_28X1"
T1 0 800 249 249 0 62 N I 21 N "VAL**"
DS -14000 -500 14000 -500 59 21
DS 14000 -500 14000 500 59 21
DS 14000 500 -14000 500 59 21
DS -14000 500 -14000 -500 59 21
$PAD
Sh "1" R 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -13500 0
$EndPAD
$PAD
Sh "2" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -12500 0
$EndPAD
$PAD
Sh "11" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -3500 0
$EndPAD
$PAD
Sh "4" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -10500 0
$EndPAD
$PAD
Sh "13" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -1500 0
$EndPAD
$PAD
Sh "6" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -8500 0
$EndPAD
$PAD
Sh "15" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 500 0
$EndPAD
$PAD
Sh "8" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -6500 0
$EndPAD
$PAD
Sh "17" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 2500 0
$EndPAD
$PAD
Sh "10" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -4500 0
$EndPAD
$PAD
Sh "19" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 4500 0
$EndPAD
$PAD
Sh "12" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -2500 0
$EndPAD
$PAD
Sh "21" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 6500 0
$EndPAD
$PAD
Sh "14" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -500 0
$EndPAD
$PAD
Sh "23" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 8500 0
$EndPAD
$PAD
Sh "16" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 1500 0
$EndPAD
$PAD
Sh "25" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 10500 0
$EndPAD
$PAD
Sh "18" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 3500 0
$EndPAD
$PAD
Sh "27" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 12500 0
$EndPAD
$PAD
Sh "20" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 5500 0
$EndPAD
$PAD
Sh "22" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 7500 0
$EndPAD
$PAD
Sh "24" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 9500 0
$EndPAD
$PAD
Sh "26" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 11500 0
$EndPAD
$PAD
Sh "28" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 13500 0
$EndPAD
$PAD
Sh "3" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -11500 0
$EndPAD
$PAD
Sh "5" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -9500 0
$EndPAD
$PAD
Sh "7" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -7500 0
$EndPAD
$PAD
Sh "9" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -5500 0
$EndPAD
$EndMODULE PIN_ARRAY_28X1
$MODULE PIN_ARRAY_6X1
Po 0 0 0 15 508278F8 00000000 ~~
Li PIN_ARRAY_6X1
Cd Single rangee contacts 1 x 6 pins
Kw CONN
Sc 0
AR
Op 0 0 0
T0 0 -700 249 249 0 62 N V 21 N "PIN_ARRAY_6X1"
T1 0 800 249 249 0 62 N I 21 N "VAL**"
DS -3000 -500 3000 -500 59 21
DS 3000 -500 3000 500 59 21
DS 3000 500 -3000 500 59 21
DS -3000 500 -3000 -500 59 21
$PAD
Sh "1" R 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -2500 0
$EndPAD
$PAD
Sh "2" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -1500 0
$EndPAD
$PAD
Sh "4" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 500 0
$EndPAD
$PAD
Sh "6" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 2500 0
$EndPAD
$PAD
Sh "3" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -500 0
$EndPAD
$PAD
Sh "5" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 1500 0
$EndPAD
$EndMODULE PIN_ARRAY_6X1
$EndLIBRARY
template/stm32f100-discovery-shield/stm32f100-discovery-shield.net deleted 100644 → 0
View file @ d23724f5
# EESchema Netlist Version 1.1 created 2012-10-20 12:24:05
(
( /50827277 $noname P1 CONN28 {Lib=CONN28}
( 1 GND )
( 2 ? )
( 3 +3.3V )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
( 11 ? )
( 12 ? )
( 13 ? )
( 14 ? )
( 15 ? )
( 16 ? )
( 17 ? )
( 18 ? )
( 19 ? )
( 20 ? )
( 21 ? )
( 22 ? )
( 23 ? )
( 24 ? )
( 25 ? )
( 26 ? )
( 27 ? )
( 28 GND )
)
( /50827286 $noname P2 CONN28 {Lib=CONN28}
( 1 GND )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
( 11 ? )
( 12 ? )
( 13 ? )
( 14 ? )
( 15 ? )
( 16 ? )
( 17 ? )
( 18 ? )
( 19 ? )
( 20 ? )
( 21 ? )
( 22 ? )
( 23 ? )
( 24 ? )
( 25 ? )
( 26 +5V )
( 27 ? )
( 28 GND )
)
( /50827295 $noname P3 CONN6 {Lib=CONN6}
( 1 ? )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
)
)
*
{ Pin List by Nets
Net 59 "GND" "GND"
P1 1
P2 28
P1 28
P2 1
}
#End
template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro deleted 100644 → 0
View file @ d23724f5
update=2012-10-20 12:46:25
version=1
last_client=pcbnew
[general]
version=1
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmtName=
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=40
[eeschema/libraries]
LibName1=stm32f100-discovery-shield
LibName2=stm32
LibName3=power
LibName4=device
LibName5=transistors
LibName6=conn
LibName7=linear
LibName8=regul
LibName9=74xx
LibName10=cmos4000
LibName11=adc-dac
LibName12=memory
LibName13=xilinx
LibName14=special
LibName15=microcontrollers
LibName16=dsp
LibName17=microchip
LibName18=analog_switches
LibName19=motorola
LibName20=texas
LibName21=intel
LibName22=audio
LibName23=interface
LibName24=digital-audio
LibName25=philips
LibName26=display
LibName27=cypress
LibName28=siliconi
LibName29=opto
LibName30=atmel
LibName31=contrib
LibName32=valves
[pcbnew]
version=1
LastNetListRead=
PadDrill=0.59944
PadSizeH=1.00076
PadSizeV=1.00076
PcbTextSizeV=1.00076
PcbTextSizeH=1.00076
PcbTextThickness=0.29972
ModuleTextSizeV=1.00076
ModuleTextSizeH=1.00076
ModuleTextSizeThickness=0.14986
SolderMaskClearance=0
DrawSegmentWidth=0.20066
BoardOutlineThickness=0.14986
ModuleOutlineThickness=0.14986
[pcbnew/libraries]
LibDir=
LibName1=stm32f100-discovery-shield
LibName2=sockets
LibName3=connect
LibName4=discret
LibName5=pin_array
LibName6=divers
LibName7=libcms
LibName8=display
LibName9=led
LibName10=dip_sockets
LibName11=pga_sockets
LibName12=valves
template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch deleted 100644 → 0
View file @ d23724f5
EESchema Schematic File Version 2 date 2012-10-20 12:45:55
LIBS:stm32f100-discovery-shield
LIBS:stm32
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:stm32f100-discovery-shield-cache
EELAYER 27 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title "STM32 Value Line Discovery - Shiled board"
Date "20 oct 2012"
Rev "1.0"
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN28 P1
U 1 1 50827277
P 10950 1950
F 0 "P1" V 10900 1950 60 0000 C CNN
F 1 "CONN28" V 11000 1950 60 0000 C CNN
1 10950 1950
1 0 0 -1
$EndComp
$Comp
L CONN28 P2
U 1 1 50827286
P 10950 4850
F 0 "P2" V 10900 4850 60 0000 C CNN
F 1 "CONN28" V 11000 4850 60 0000 C CNN
1 10950 4850
1 0 0 1
$EndComp
$Comp
L CONN6 P3
U 1 1 50827295
P 10950 6650
F 0 "P3" V 10900 6650 60 0000 C CNN
F 1 "CONN6" V 11000 6650 60 0000 C CNN
1 10950 6650
1 0 0 -1
$EndComp
Wire Wire Line
10600 600 10300 600
Wire Wire Line
10600 800 10300 800
Wire Wire Line
10600 900 10300 900
Wire Wire Line
10600 1000 10300 1000
Wire Wire Line
10600 1100 10300 1100
Wire Wire Line
10600 1200 10300 1200
Wire Wire Line
10600 1300 10300 1300
Wire Wire Line
10600 1400 10300 1400
Wire Wire Line
10600 1500 10300 1500
Wire Wire Line
10600 1600 10300 1600
Wire Wire Line
10600 1700 10300 1700
Wire Wire Line
10600 1800 10300 1800
Wire Wire Line
10600 1900 10300 1900
Wire Wire Line
10600 2000 10300 2000
Wire Wire Line
10600 2100 10300 2100
Wire Wire Line
10600 2200 10300 2200
Wire Wire Line
10600 2300 10300 2300
Wire Wire Line
10600 2400 10300 2400
Wire Wire Line
10600 2500 10300 2500
Wire Wire Line
10600 2600 10300 2600
Wire Wire Line
10600 2700 10300 2700
Wire Wire Line
10600 2800 10300 2800
Wire Wire Line
10600 2900 10300 2900
Wire Wire Line
10600 3000 10300 3000
Wire Wire Line
10600 3100 10300 3100
Wire Wire Line
10600 3200 10300 3200
Wire Wire Line
10600 3300 10300 3300
Wire Wire Line
10600 3500 10300 3500
Wire Wire Line
10600 3700 10300 3700
Wire Wire Line
10600 3800 10300 3800
Wire Wire Line
10600 3900 10300 3900
Wire Wire Line
10600 4000 10300 4000
Wire Wire Line
10600 4100 10300 4100
Wire Wire Line
10600 4200 10300 4200
Wire Wire Line
10600 4300 10300 4300
Wire Wire Line
10600 4400 10300 4400
Wire Wire Line
10600 4500 10300 4500
Wire Wire Line
10600 4600 10300 4600
Wire Wire Line
10600 4700 10300 4700
Wire Wire Line
10600 4800 10300 4800
Wire Wire Line
10600 4900 10300 4900
Wire Wire Line
10600 5000 10300 5000
Wire Wire Line
10600 5100 10300 5100
Wire Wire Line
10600 5200 10300 5200
Wire Wire Line
10600 5300 10300 5300
Wire Wire Line
10600 5400 10300 5400
Wire Wire Line
10600 5500 10300 5500
Wire Wire Line
10600 5600 10300 5600
Wire Wire Line
10600 5700 10300 5700
Wire Wire Line
10600 5800 10300 5800
Wire Wire Line
10600 5900 10300 5900
Wire Wire Line
10600 6000 10300 6000
Wire Wire Line
10600 6100 10300 6100
Wire Wire Line
10600 6200 10300 6200
Wire Wire Line
10600 6400 10300 6400
Wire Wire Line
10600 6500 10300 6500
Wire Wire Line
10600 6600 10300 6600
Wire Wire Line
10600 6700 10300 6700
Wire Wire Line
10600 6800 10300 6800
Wire Wire Line
10600 6900 10300 6900
Text Label 10350 6400 0 40 ~ 0
PB10
Text Label 10350 6500 0 40 ~ 0
PB11
Text Label 10350 6600 0 40 ~ 0
PB12
Text Label 10350 6700 0 40 ~ 0
PB13
Text Label 10350 6800 0 40 ~ 0
PB14
Text Label 10350 6900 0 40 ~ 0
PB15
NoConn ~ 10600 700
NoConn ~ 10600 3600
$Comp
L GND #PWR01
U 1 1 50827354
P 10300 650
F 0 "#PWR01" H 10300 650 30 0001 C CNN
F 1 "GND" H 10300 580 30 0001 C CNN
1 10300 650
1 0 0 -1
$EndComp
$Comp
L GND #PWR02
U 1 1 50827361
P 10300 3350
F 0 "#PWR02" H 10300 3350 30 0001 C CNN
F 1 "GND" H 10300 3280 30 0001 C CNN
1 10300 3350
1 0 0 -1
$EndComp
$Comp
L GND #PWR03
U 1 1 50827367
P 10300 3550
F 0 "#PWR03" H 10300 3550 30 0001 C CNN
F 1 "GND" H 10300 3480 30 0001 C CNN
1 10300 3550
1 0 0 -1
$EndComp
$Comp
L GND #PWR04
U 1 1 5082736D
P 10300 6250
F 0 "#PWR04" H 10300 6250 30 0001 C CNN
F 1 "GND" H 10300 6180 30 0001 C CNN
1 10300 6250
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR05
U 1 1 50827375
P 10300 800
F 0 "#PWR05" H 10300 760 30 0001 C CNN
F 1 "+3.3V" H 10300 910 30 0000 C CNN
1 10300 800
0 -1 -1 0
$EndComp
$Comp
L +5V #PWR06
U 1 1 50827384
P 10300 3700
F 0 "#PWR06" H 10300 3790 20 0001 C CNN
F 1 "+5V" H 10300 3790 30 0000 C CNN
1 10300 3700
0 -1 -1 0
$EndComp
Wire Wire Line
10300 6200 10300 6250
Wire Wire Line
10300 3500 10300 3550
Wire Wire Line
10300 3300 10300 3350
Wire Wire Line
10300 600 10300 650
Text Label 10350 900 0 40 ~ 0
VBAT
Text Label 10350 1000 0 40 ~ 0
PC13
Text Label 10350 1100 0 40 ~ 0
PC14
Text Label 10350 1200 0 40 ~ 0
PC15
Text Label 10350 1300 0 40 ~ 0
PD0
Text Label 10350 1400 0 40 ~ 0
PD1
Text Label 10350 1500 0 40 ~ 0
RST
Text Label 10350 1600 0 40 ~ 0
PC0
Text Label 10350 1700 0 40 ~ 0
PC1
Text Label 10350 1800 0 40 ~ 0
PC2
Text Label 10350 1900 0 40 ~ 0
PC3
Text Label 10350 2000 0 40 ~ 0
PA0
Text Label 10350 2100 0 40 ~ 0
PA1
Text Label 10350 2200 0 40 ~ 0
PA2
Text Label 10350 2300 0 40 ~ 0
PA3
Text Label 10350 2400 0 40 ~ 0
PA4
Text Label 10350 2500 0 40 ~ 0
PA5
Text Label 10350 2600 0 40 ~ 0
PA6
Text Label 10350 2700 0 40 ~ 0
PA7
Text Label 10350 2800 0 40 ~ 0
PC4
Text Label 10350 2900 0 40 ~ 0
PC5
Text Label 10350 3000 0 40 ~ 0
PB0
Text Label 10350 3100 0 40 ~ 0
PB1
Text Label 10350 3200 0 40 ~ 0
PB2
Text Label 10350 3800 0 40 ~ 0
PB9
Text Label 10350 3900 0 40 ~ 0
PB8
Text Label 10350 4000 0 40 ~ 0
BOOT
Text Label 10350 4100 0 40 ~ 0
PB7
Text Label 10350 4200 0 40 ~ 0
PB6
Text Label 10350 4300 0 40 ~ 0
PB5
Text Label 10350 4400 0 40 ~ 0
PB4
Text Label 10350 4500 0 40 ~ 0
PB3
Text Label 10350 4600 0 40 ~ 0
PD2
Text Label 10350 4700 0 40 ~ 0
PC12
Text Label 10350 4800 0 40 ~ 0
PC11
Text Label 10350 4900 0 40 ~ 0
PC10
Text Label 10350 5000 0 40 ~ 0
PA15
Text Label 10350 5100 0 40 ~ 0
PA14
Text Label 10350 5200 0 40 ~ 0
PA13
Text Label 10350 5300 0 40 ~ 0
PA12
Text Label 10350 5400 0 40 ~ 0
PA11
Text Label 10350 5500 0 40 ~ 0
PA10
Text Label 10350 5700 0 40 ~ 0
PA8
Text Label 10350 5600 0 40 ~ 0
PA9
Text Label 10350 5800 0 40 ~ 0
PC9
Text Label 10350 5900 0 40 ~ 0
PC8
Text Label 10350 6000 0 40 ~ 0
PC7
Text Label 10350 6100 0 40 ~ 0
PC6
$EndSCHEMATC
template/ti-stellaris-boosterpack40/boosterpack.dcm deleted 100644 → 0
View file @ d23724f5
EESchema-DOCLIB Version 2.0 Date: Thu 18 Oct 2012 09:37:56 PM PDT
#
#End Doc Library
template/ti-stellaris-boosterpack40/boosterpack.lib deleted 100644 → 0
View file @ d23724f5
EESchema-LIBRARY Version 2.3 Date: Thu 18 Oct 2012 09:37:56 PM PDT
#encoding utf-8
#
# Ti_Booster_40_J1
#
DEF Ti_Booster_40_J1 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J1" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 1.01/Vcc 1 -600 450 300 R 50 50 1 1 W
X 1.02/PB5 2 -600 350 300 R 50 50 1 1 B
X 1.03/PB0/Rxd 3 -600 250 300 R 50 50 1 1 B
X 1.04/PB1/TxD 4 -600 150 300 R 50 50 1 1 B
X 1.05/PE4 5 -600 50 300 R 50 50 1 1 B
X 1.06/PE5 6 -600 -50 300 R 50 50 1 1 B
X 1.07/PB4 7 -600 -150 300 R 50 50 1 1 B
X 1.08/PA5 8 -600 -250 300 R 50 50 1 1 B
X 1.09/PA6 9 -600 -350 300 R 50 50 1 1 B
X 1.10/PA7 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J2
#
DEF Ti_Booster_40_J2 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J2" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 2.01/GND 1 -600 450 300 R 50 50 1 1 W
X 2.02/PB2 2 -600 350 300 R 50 50 1 1 B
X 2.03/PE0 3 -600 250 300 R 50 50 1 1 B
X 2.04/PF0 4 -600 150 300 R 50 50 1 1 B
X 2.05/RESET 5 -600 50 300 R 50 50 1 1 B
X 2.06/PB7 6 -600 -50 300 R 50 50 1 1 B
X 2.07/PB6 7 -600 -150 300 R 50 50 1 1 B
X 2.08/PA4 8 -600 -250 300 R 50 50 1 1 B
X 2.09/PA3 9 -600 -350 300 R 50 50 1 1 B
X 2.10/PA2 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J3
#
DEF Ti_Booster_40_J3 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J3" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 3.01/+5V 1 -600 450 300 R 50 50 1 1 W
X 3.02/GND 2 -600 350 300 R 50 50 1 1 B
X 3.03/PD0 3 -600 250 300 R 50 50 1 1 B
X 3.04/PD1 4 -600 150 300 R 50 50 1 1 B
X 3.05/PD2 5 -600 50 300 R 50 50 1 1 B
X 3.06/PD3 6 -600 -50 300 R 50 50 1 1 B
X 3.07/PE1 7 -600 -150 300 R 50 50 1 1 B
X 3.08/PE2 8 -600 -250 300 R 50 50 1 1 B
X 3.09/PE3 9 -600 -350 300 R 50 50 1 1 B
X 3.10/PF1 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J4
#
DEF Ti_Booster_40_J4 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J4" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 4.01/PF2 1 -600 450 300 R 50 50 1 1 W
X 4.02/PF3 2 -600 350 300 R 50 50 1 1 B
X 4.03/PB3 3 -600 250 300 R 50 50 1 1 B
X 4.04/PC4 4 -600 150 300 R 50 50 1 1 B
X 4.05/PC5 5 -600 50 300 R 50 50 1 1 B
X 4.06/PC6 6 -600 -50 300 R 50 50 1 1 B
X 4.07/PC7 7 -600 -150 300 R 50 50 1 1 B
X 4.08/PD6 8 -600 -250 300 R 50 50 1 1 B
X 4.09/PD7 9 -600 -350 300 R 50 50 1 1 B
X 4.10/PF4 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_J1
#
DEF Ti_Booster_J1 J 0 40 Y Y 1 F N
F0 "J" -300 1300 60 H V C CNN
F1 "Ti_Booster_J1" -100 -1250 60 H V C CNN
DRAW
S -450 1200 500 -1150 0 1 0 N
X Vcc 1 -750 -950 300 R 50 50 1 1 W
X P1.0/LED1 2 -750 1100 300 R 50 50 1 1 B
X P1.1/Rxd 3 -750 1000 300 R 50 50 1 1 B
X P1.2/TxD 4 -750 900 300 R 50 50 1 1 B
X P1.3/S2 5 -750 800 300 R 50 50 1 1 B
X p1.4 6 -750 700 300 R 50 50 1 1 B
X P1.5 7 -750 600 300 R 50 50 1 1 B
X P2.0 8 -750 200 300 R 50 50 1 1 B
X P2.1 9 -750 100 300 R 50 50 1 1 B
X P2.2 10 -750 0 300 R 50 50 1 1 B
X Gnd 20 -750 -1050 300 R 50 50 1 1 B
X P2.3 11 -750 -100 300 R 50 50 1 1 B
X P2.4 12 -750 -200 300 R 50 50 1 1 B
X P2.5 13 -750 -300 300 R 50 50 1 1 B
X P1.6/Led2 14 -750 500 300 R 50 50 1 1 B
X P1.7 15 -750 400 300 R 50 50 1 1 B
X RST/S1 16 -750 -750 300 R 50 50 1 1 B
X Test 17 -750 -650 300 R 50 50 1 1 B
X P2.7/Xout 18 -750 -550 300 R 50 50 1 1 B
X P2.6/Xin 19 -750 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
#End Library
template/ti-stellaris-boosterpack40/boosterpack40-cache.lib deleted 100644 → 0
View file @ d23724f5
EESchema-LIBRARY Version 2.3 Date: Thu 18 Oct 2012 10:04:05 PM PDT
#encoding utf-8
#
# +5V
#
DEF +5V #PWR 0 40 Y Y 1 F P
F0 "#PWR" 0 90 20 H I C CNN
F1 "+5V" 0 90 30 H V C CNN
DRAW
X +5V 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 4 0 1 0 0 0 0 30 0 30 0 30 N
ENDDRAW
ENDDEF
#
# CONN_3
#
DEF CONN_3 K 0 40 Y N 1 F N
F0 "K" -50 0 50 V V C CNN
F1 "CONN_3" 50 0 40 V V C CNN
DRAW
S -100 150 100 -150 0 1 0 N
X P1 1 -350 100 250 R 60 60 1 1 P I
X PM 2 -350 0 250 R 60 60 1 1 P I
X P3 3 -350 -100 250 R 60 60 1 1 P I
ENDDRAW
ENDDEF
#
# GND
#
DEF ~GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
F1 "GND" 0 -70 30 H I C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X GND 1 0 0 0 U 30 30 1 1 W N
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J1
#
DEF Ti_Booster_40_J1 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J1" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 1.01/Vcc 1 -600 450 300 R 50 50 1 1 W
X 1.02/PB5 2 -600 350 300 R 50 50 1 1 B
X 1.03/PB0/Rxd 3 -600 250 300 R 50 50 1 1 B
X 1.04/PB1/TxD 4 -600 150 300 R 50 50 1 1 B
X 1.05/PE4 5 -600 50 300 R 50 50 1 1 B
X 1.06/PE5 6 -600 -50 300 R 50 50 1 1 B
X 1.07/PB4 7 -600 -150 300 R 50 50 1 1 B
X 1.08/PA5 8 -600 -250 300 R 50 50 1 1 B
X 1.09/PA6 9 -600 -350 300 R 50 50 1 1 B
X 1.10/PA7 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J2
#
DEF Ti_Booster_40_J2 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J2" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 2.01/GND 1 -600 450 300 R 50 50 1 1 W
X 2.02/PB2 2 -600 350 300 R 50 50 1 1 B
X 2.03/PE0 3 -600 250 300 R 50 50 1 1 B
X 2.04/PF0 4 -600 150 300 R 50 50 1 1 B
X 2.05/RESET 5 -600 50 300 R 50 50 1 1 B
X 2.06/PB7 6 -600 -50 300 R 50 50 1 1 B
X 2.07/PB6 7 -600 -150 300 R 50 50 1 1 B
X 2.08/PA4 8 -600 -250 300 R 50 50 1 1 B
X 2.09/PA3 9 -600 -350 300 R 50 50 1 1 B
X 2.10/PA2 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J3
#
DEF Ti_Booster_40_J3 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J3" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 3.01/+5V 1 -600 450 300 R 50 50 1 1 W
X 3.02/GND 2 -600 350 300 R 50 50 1 1 B
X 3.03/PD0 3 -600 250 300 R 50 50 1 1 B
X 3.04/PD1 4 -600 150 300 R 50 50 1 1 B
X 3.05/PD2 5 -600 50 300 R 50 50 1 1 B
X 3.06/PD3 6 -600 -50 300 R 50 50 1 1 B
X 3.07/PE1 7 -600 -150 300 R 50 50 1 1 B
X 3.08/PE2 8 -600 -250 300 R 50 50 1 1 B
X 3.09/PE3 9 -600 -350 300 R 50 50 1 1 B
X 3.10/PF1 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J4
#
DEF Ti_Booster_40_J4 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J4" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 4.01/PF2 1 -600 450 300 R 50 50 1 1 W
X 4.02/PF3 2 -600 350 300 R 50 50 1 1 B
X 4.03/PB3 3 -600 250 300 R 50 50 1 1 B
X 4.04/PC4 4 -600 150 300 R 50 50 1 1 B
X 4.05/PC5 5 -600 50 300 R 50 50 1 1 B
X 4.06/PC6 6 -600 -50 300 R 50 50 1 1 B
X 4.07/PC7 7 -600 -150 300 R 50 50 1 1 B
X 4.08/PD6 8 -600 -250 300 R 50 50 1 1 B
X 4.09/PD7 9 -600 -350 300 R 50 50 1 1 B
X 4.10/PF4 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# VCC
#
DEF VCC #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 100 30 H I C CNN
F1 "VCC" 0 100 30 H V C CNN
DRAW
X VCC 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 3 0 1 0 0 0 0 30 0 30 N
ENDDRAW
ENDDEF
#
#End Library
template/ti-stellaris-boosterpack40/boosterpack40.cmp deleted 100644 → 0
View file @ d23724f5
Cmp-Mod V01 Created by CvPcb (2011-nov-30)-testing date = Thu 18 Oct 2012 09:58:43 PM PDT
BeginCmp
TimeStamp = /5080DB5C;
Reference = J1;
ValeurCmp = TI_BOOSTER_40_J1;
IdModule = SIL-10;
EndCmp
BeginCmp
TimeStamp = /5080DBF4;
Reference = J2;
ValeurCmp = TI_BOOSTER_40_J2;
IdModule = SIL-10;
EndCmp
BeginCmp
TimeStamp = /5080DC03;
Reference = J3;
ValeurCmp = TI_BOOSTER_40_J3;
IdModule = SIL-10;
EndCmp
BeginCmp
TimeStamp = /5080DC12;
Reference = J4;
ValeurCmp = TI_BOOSTER_40_J4;
IdModule = SIL-10;
EndCmp
BeginCmp
TimeStamp = /5080A33C;
Reference = J5;
ValeurCmp = CONN_3;
IdModule = SIL-3;
EndCmp
EndListe
template/ti-stellaris-boosterpack40/boosterpack40.mod deleted 100644 → 0
View file @ d23724f5
PCBNEW-LibModule-V1 Thu 18 Oct 2012 07:20:13 PM PDT
# encoding utf-8
Units mm
$INDEX
BoosterPack_J1_J2
$EndINDEX
$MODULE BoosterPack_J1_J2
Po 0 0 0 15 5080B8D5 00000000 ~~
Li BoosterPack_J1_J2
Sc 0
AR /5080AA0E
Op 0 0 0
T0 0 8.89 1.524 1.524 0 0.3048 N V 21 N "J1"
T1 0 0 1.524 1.524 0 0.3048 N V 21 N "J1-J2"
DS -2.54 -3.81 48.26 -3.81 0.381 21
DS 48.26 -3.81 48.26 26.67 0.381 21
DS 48.26 26.67 -2.54 26.67 0.381 21
DS -2.54 26.67 -2.54 -3.81 0.381 21
$PAD
Sh "1" R 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 3 "VCC"
Po 0 0
$EndPAD
$PAD
Sh "2" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 2.54
$EndPAD
$PAD
Sh "3" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 5.08
$EndPAD
$PAD
Sh "4" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 7.62
$EndPAD
$PAD
Sh "5" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 10.16
$EndPAD
$PAD
Sh "6" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 12.7
$EndPAD
$PAD
Sh "7" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 2 "N-000002"
Po 0 15.24
$EndPAD
$PAD
Sh "8" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 17.78
$EndPAD
$PAD
Sh "9" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 20.32
$EndPAD
$PAD
Sh "10" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 22.86
$EndPAD
$PAD
Sh "11" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 22.86
$EndPAD
$PAD
Sh "12" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 20.32
$EndPAD
$PAD
Sh "13" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 17.78
$EndPAD
$PAD
Sh "14" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 15.24
$EndPAD
$PAD
Sh "15" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 12.7
$EndPAD
$PAD
Sh "16" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 10.16
$EndPAD
$PAD
Sh "17" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 7.62
$EndPAD
$PAD
Sh "18" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 5.08
$EndPAD
$PAD
Sh "19" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 2.54
$EndPAD
$PAD
Sh "20" R 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 1 "GND"
Po 45.72 0
$EndPAD
$EndMODULE BoosterPack_J1_J2
$EndLIBRARY
template/ti-stellaris-boosterpack40/boosterpack40.net deleted 100644 → 0
View file @ d23724f5
# EESchema Netlist Version 1.1 created Thu 18 Oct 2012 09:58:06 PM PDT
(
( /5080A33C $noname J5 CONN_3 {Lib=CONN_3}
( 1 VCC )
( 2 GND )
( 3 GND )
)
( /5080DB5C $noname J1 TI_BOOSTER_40_J1 {Lib=TI_BOOSTER_40_J1}
( 1 VCC )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
)
( /5080DBF4 $noname J2 TI_BOOSTER_40_J2 {Lib=TI_BOOSTER_40_J2}
( 1 GND )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
)
( /5080DC03 $noname J3 TI_BOOSTER_40_J3 {Lib=TI_BOOSTER_40_J3}
( 1 +5V )
( 2 GND )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
)
( /5080DC12 $noname J4 TI_BOOSTER_40_J4 {Lib=TI_BOOSTER_40_J4}
( 1 ? )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
)
)
*
{ Pin List by Nets
Net 8 "GND" "GND"
J5 3
J5 2
J2 1
J3 2
Net 27 "VCC" "VCC"
J5 1
J1 1
}
#End
template/ti-stellaris-boosterpack40/boosterpack40.pro deleted 100644 → 0
View file @ d23724f5
update=Wed 10 Apr 2013 04:16:40 PM CDT
version=1
last_client=eeschema
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=boosterpack20.net
PadDrill=1.016
PadSizeH=1.524
PadSizeV=1.524
PcbTextSizeV=1
PcbTextSizeH=1
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.15
SolderMaskClearance=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.15
ModuleOutlineThickness=0.15
[pcbnew/libraries]
LibDir=
LibName1=boosterpack20
LibName2=sockets
LibName3=connect
LibName4=discret
LibName5=pin_array
LibName6=divers
LibName7=libcms
LibName8=display
LibName9=led
LibName10=dip_sockets
LibName11=pga_sockets
LibName12=valves
[general]
version=1
[eeschema]
version=1
LibDir=
NetFmtName=
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=boosterpack
LibName2=power
LibName3=device
LibName4=transistors
LibName5=conn
LibName6=linear
LibName7=regul
LibName8=74xx
LibName9=cmos4000
LibName10=adc-dac
LibName11=memory
LibName12=xilinx
LibName13=special
LibName14=microcontrollers
LibName15=dsp
LibName16=microchip
LibName17=analog_switches
LibName18=motorola
LibName19=texas
LibName20=intel
LibName21=audio
LibName22=interface
LibName23=digital-audio
LibName24=philips
LibName25=display
LibName26=cypress
LibName27=siliconi
LibName28=opto
LibName29=atmel
LibName30=contrib
LibName31=valves
template/ti-stellaris-boosterpack40/boosterpack40.sch deleted 100644 → 0
View file @ d23724f5
EESchema Schematic File Version 2 date Thu 18 Oct 2012 10:04:05 PM PDT
LIBS:boosterpack
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:boosterpack40-cache
EELAYER 27 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date "19 oct 2012"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_3 J5
U 1 1 5080A33C
P 7600 6800
F 0 "J5" V 7550 6800 50 0000 C CNN
F 1 "CONN_3" V 7650 6800 40 0000 C CNN
1 7600 6800
1 0 0 1
$EndComp
Wire Wire Line
7250 6700 7000 6700
Wire Wire Line
7250 6900 7000 6900
$Comp
L VCC #PWR01
U 1 1 5080A56F
P 7000 6900
F 0 "#PWR01" H 7000 7000 30 0001 C CNN
F 1 "VCC" H 7000 7000 30 0000 C CNN
1 7000 6900
0 -1 -1 0
$EndComp
$Comp
L GND #PWR02
U 1 1 5080A57E
P 7000 6700
F 0 "#PWR02" H 7000 6700 30 0001 C CNN
F 1 "GND" H 7000 6630 30 0001 C CNN
1 7000 6700
0 1 1 0
$EndComp
Wire Wire Line
7100 6800 7100 6700
Connection ~ 7100 6700
Wire Wire Line
7250 6800 7100 6800
$Comp
L GND #PWR03
U 1 1 5080AA99
P 9150 2450
F 0 "#PWR03" H 9150 2450 30 0001 C CNN
F 1 "GND" H 9150 2380 30 0001 C CNN
1 9150 2450
0 1 1 0
$EndComp
$Comp
L VCC #PWR04
U 1 1 5080AA9F
P 9150 900
F 0 "#PWR04" H 9150 1000 30 0001 C CNN
F 1 "VCC" H 9150 1000 30 0000 C CNN
1 9150 900
0 -1 -1 0
$EndComp
$Comp
L TI_BOOSTER_40_J1 J1
U 1 1 5080DB5C
P 9750 1350
F 0 "J1" H 9700 2000 60 0000 C CNN
F 1 "TI_BOOSTER_40_J1" H 9750 700 60 0000 C CNN
1 9750 1350
1 0 0 -1
$EndComp
$Comp
L TI_BOOSTER_40_J2 J2
U 1 1 5080DBF4
P 9750 2900
F 0 "J2" H 9700 3550 60 0000 C CNN
F 1 "TI_BOOSTER_40_J2" H 9750 2250 60 0000 C CNN
1 9750 2900
1 0 0 -1
$EndComp
$Comp
L TI_BOOSTER_40_J3 J3
U 1 1 5080DC03
P 9750 4450
F 0 "J3" H 9700 5100 60 0000 C CNN
F 1 "TI_BOOSTER_40_J3" H 9750 3800 60 0000 C CNN
1 9750 4450
1 0 0 -1
$EndComp
$Comp
L TI_BOOSTER_40_J4 J4
U 1 1 5080DC12
P 9750 6000
F 0 "J4" H 9700 6650 60 0000 C CNN
F 1 "TI_BOOSTER_40_J4" H 9750 5350 60 0000 C CNN
1 9750 6000
1 0 0 -1
$EndComp
$Comp
L GND #PWR05
U 1 1 5080DC79
P 9150 4100
F 0 "#PWR05" H 9150 4100 30 0001 C CNN
F 1 "GND" H 9150 4030 30 0001 C CNN
1 9150 4100
0 1 1 0
$EndComp
$Comp
L +5V #PWR06
U 1 1 5080DC8B
P 9150 4000
F 0 "#PWR06" H 9150 4090 20 0001 C CNN
F 1 "+5V" H 9150 4090 30 0000 C CNN
1 9150 4000
0 -1 -1 0
$EndComp
$EndSCHEMATC
template/ti-stellaris-boosterpack40/boosterpack40_min.kicad_pcb deleted 100644 → 0
View file @ d23724f5
(kicad_pcb (version 3) (host pcbnew "(2013-02-23 BZR 3971)-testing")
(general
(links 1)
(no_connects 1)
(area 172.984525 104.605002 242.305477 149.137511)
(thickness 1.6)
(drawings 7)
(tracks 0)
(zones 0)
(modules 4)
(nets 4)
)
(page A3)
(layers
(15 Front signal)
(0 Back signal)
(16 Dessous.Adhes user)
(17 Dessus.Adhes user)
(18 Dessous.Pate user)
(19 Dessus.Pate user)
(20 Dessous.SilkS user)
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(24 Dessin.User user)
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(net 0 "")
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(add_net "")
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(module SIL-10 (layer Front) (tedit 5080DEE6) (tstamp 5080DE37)
(at 231.14 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
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(pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
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(module SIL-10 (layer Front) (tedit 5080DEED) (tstamp 5080DE4A)
(at 228.6 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
(path /5080DC12)
(fp_text reference J4 (at -13.97 0 360) (layer Dessus.SilkS)
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(pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
(layers *.Cu *.Mask Dessus.SilkS)
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(module SIL-10 (layer Front) (tedit 5080DEE0) (tstamp 5080AB71)
(at 187.96 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
(path /5080DC03)
(fp_text reference J3 (at -13.97 0 360) (layer Dessus.SilkS)
(effects (font (size 1.72974 1.08712) (thickness 0.3048)))
)
(fp_text value TI_BOOSTER_40_J3 (at 6.35 -2.54 270) (layer Dessus.SilkS)
(effects (font (size 1.524 1.016) (thickness 0.3048)))
)
(fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer Dessus.SilkS) (width 0.3048))
(fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer Dessus.SilkS) (width 0.3048))
(fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer Dessus.SilkS) (width 0.3048))
(fp_line (start 12.7 1.27) (end -12.7 1.27) (layer Dessus.SilkS) (width 0.3048))
(fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer Dessus.SilkS) (width 0.3048))
(pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
(layers *.Cu *.Mask Dessus.SilkS)
(net 1 +5V)
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(pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
(layers *.Cu *.Mask Dessus.SilkS)
(net 2 GND)
)
(pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
(layers *.Cu *.Mask Dessus.SilkS)
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(pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
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(layers *.Cu *.Mask Dessus.SilkS)
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(pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
(layers *.Cu *.Mask Dessus.SilkS)
)
(pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
(layers *.Cu *.Mask Dessus.SilkS)
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(pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
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)
(pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
(layers *.Cu *.Mask Dessus.SilkS)
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(module SIL-10 (layer Front) (tedit 5080DEDC) (tstamp 5080AB8D)
(at 185.42 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
(path /5080DB5C)
(fp_text reference J1 (at -13.97 0 360) (layer Dessus.SilkS)
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)
(fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer Dessus.SilkS) (width 0.3048))
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(fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer Dessus.SilkS) (width 0.3048))
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(gr_text "1.3500 in" (at 176.800001 130.175 270) (layer Dessin.User)
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)
template/ti-stellaris-boosterpack40/meta/info.html deleted 100644 → 0
View file @ d23724f5
<html>
<head>
<title>Ti Launchpad XL - Expansion Board</title>
</head>
<body>
<h1>Launchpad XL</h1>
<h2>Expansion Board</h2>
This project template is the basis of an expansion board for the
<a href="http://processors.wiki.ti.com/index.php/BoosterPack_Design_Guide" target="blank">TI Launchpad
board.</a>
<br><br>
This Board conforms to the 40 pin Launchpad Standard at the maximum size and includes the optional J5 connector.
<br><br>
The board outline looks like the following:
<br>
<img src="launchpad_standard40.png" alt="40 Pin Launchpad">
<br>
(c)2012 Brian Sidebotham<br>
(c)2012 Henry von Tresckow<br>
(c)2012 Kicad Developers<br>
</body>
</html>
template/ti-stellaris-boosterpack40_min/boosterpack.dcm deleted 100644 → 0
View file @ d23724f5
EESchema-DOCLIB Version 2.0 Date: Thu 18 Oct 2012 09:37:56 PM PDT
#
#End Doc Library
template/ti-stellaris-boosterpack40_min/boosterpack.lib deleted 100644 → 0
View file @ d23724f5
EESchema-LIBRARY Version 2.3 Date: Thu 18 Oct 2012 09:37:56 PM PDT
#encoding utf-8
#
# Ti_Booster_40_J1
#
DEF Ti_Booster_40_J1 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J1" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 1.01/Vcc 1 -600 450 300 R 50 50 1 1 W
X 1.02/PB5 2 -600 350 300 R 50 50 1 1 B
X 1.03/PB0/Rxd 3 -600 250 300 R 50 50 1 1 B
X 1.04/PB1/TxD 4 -600 150 300 R 50 50 1 1 B
X 1.05/PE4 5 -600 50 300 R 50 50 1 1 B
X 1.06/PE5 6 -600 -50 300 R 50 50 1 1 B
X 1.07/PB4 7 -600 -150 300 R 50 50 1 1 B
X 1.08/PA5 8 -600 -250 300 R 50 50 1 1 B
X 1.09/PA6 9 -600 -350 300 R 50 50 1 1 B
X 1.10/PA7 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J2
#
DEF Ti_Booster_40_J2 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J2" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 2.01/GND 1 -600 450 300 R 50 50 1 1 W
X 2.02/PB2 2 -600 350 300 R 50 50 1 1 B
X 2.03/PE0 3 -600 250 300 R 50 50 1 1 B
X 2.04/PF0 4 -600 150 300 R 50 50 1 1 B
X 2.05/RESET 5 -600 50 300 R 50 50 1 1 B
X 2.06/PB7 6 -600 -50 300 R 50 50 1 1 B
X 2.07/PB6 7 -600 -150 300 R 50 50 1 1 B
X 2.08/PA4 8 -600 -250 300 R 50 50 1 1 B
X 2.09/PA3 9 -600 -350 300 R 50 50 1 1 B
X 2.10/PA2 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J3
#
DEF Ti_Booster_40_J3 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J3" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 3.01/+5V 1 -600 450 300 R 50 50 1 1 W
X 3.02/GND 2 -600 350 300 R 50 50 1 1 B
X 3.03/PD0 3 -600 250 300 R 50 50 1 1 B
X 3.04/PD1 4 -600 150 300 R 50 50 1 1 B
X 3.05/PD2 5 -600 50 300 R 50 50 1 1 B
X 3.06/PD3 6 -600 -50 300 R 50 50 1 1 B
X 3.07/PE1 7 -600 -150 300 R 50 50 1 1 B
X 3.08/PE2 8 -600 -250 300 R 50 50 1 1 B
X 3.09/PE3 9 -600 -350 300 R 50 50 1 1 B
X 3.10/PF1 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J4
#
DEF Ti_Booster_40_J4 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J4" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 4.01/PF2 1 -600 450 300 R 50 50 1 1 W
X 4.02/PF3 2 -600 350 300 R 50 50 1 1 B
X 4.03/PB3 3 -600 250 300 R 50 50 1 1 B
X 4.04/PC4 4 -600 150 300 R 50 50 1 1 B
X 4.05/PC5 5 -600 50 300 R 50 50 1 1 B
X 4.06/PC6 6 -600 -50 300 R 50 50 1 1 B
X 4.07/PC7 7 -600 -150 300 R 50 50 1 1 B
X 4.08/PD6 8 -600 -250 300 R 50 50 1 1 B
X 4.09/PD7 9 -600 -350 300 R 50 50 1 1 B
X 4.10/PF4 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_J1
#
DEF Ti_Booster_J1 J 0 40 Y Y 1 F N
F0 "J" -300 1300 60 H V C CNN
F1 "Ti_Booster_J1" -100 -1250 60 H V C CNN
DRAW
S -450 1200 500 -1150 0 1 0 N
X Vcc 1 -750 -950 300 R 50 50 1 1 W
X P1.0/LED1 2 -750 1100 300 R 50 50 1 1 B
X P1.1/Rxd 3 -750 1000 300 R 50 50 1 1 B
X P1.2/TxD 4 -750 900 300 R 50 50 1 1 B
X P1.3/S2 5 -750 800 300 R 50 50 1 1 B
X p1.4 6 -750 700 300 R 50 50 1 1 B
X P1.5 7 -750 600 300 R 50 50 1 1 B
X P2.0 8 -750 200 300 R 50 50 1 1 B
X P2.1 9 -750 100 300 R 50 50 1 1 B
X P2.2 10 -750 0 300 R 50 50 1 1 B
X Gnd 20 -750 -1050 300 R 50 50 1 1 B
X P2.3 11 -750 -100 300 R 50 50 1 1 B
X P2.4 12 -750 -200 300 R 50 50 1 1 B
X P2.5 13 -750 -300 300 R 50 50 1 1 B
X P1.6/Led2 14 -750 500 300 R 50 50 1 1 B
X P1.7 15 -750 400 300 R 50 50 1 1 B
X RST/S1 16 -750 -750 300 R 50 50 1 1 B
X Test 17 -750 -650 300 R 50 50 1 1 B
X P2.7/Xout 18 -750 -550 300 R 50 50 1 1 B
X P2.6/Xin 19 -750 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
#End Library
template/ti-stellaris-boosterpack40_min/boosterpack40_min-cache.lib deleted 100644 → 0
View file @ d23724f5
EESchema-LIBRARY Version 2.3 Date: Thu 18 Oct 2012 10:11:13 PM PDT
#encoding utf-8
#
# +5V
#
DEF +5V #PWR 0 40 Y Y 1 F P
F0 "#PWR" 0 90 20 H I C CNN
F1 "+5V" 0 90 30 H V C CNN
DRAW
X +5V 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 4 0 1 0 0 0 0 30 0 30 0 30 N
ENDDRAW
ENDDEF
#
# GND
#
DEF ~GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
F1 "GND" 0 -70 30 H I C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X GND 1 0 0 0 U 30 30 1 1 W N
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J1
#
DEF Ti_Booster_40_J1 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J1" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 1.01/Vcc 1 -600 450 300 R 50 50 1 1 W
X 1.02/PB5 2 -600 350 300 R 50 50 1 1 B
X 1.03/PB0/Rxd 3 -600 250 300 R 50 50 1 1 B
X 1.04/PB1/TxD 4 -600 150 300 R 50 50 1 1 B
X 1.05/PE4 5 -600 50 300 R 50 50 1 1 B
X 1.06/PE5 6 -600 -50 300 R 50 50 1 1 B
X 1.07/PB4 7 -600 -150 300 R 50 50 1 1 B
X 1.08/PA5 8 -600 -250 300 R 50 50 1 1 B
X 1.09/PA6 9 -600 -350 300 R 50 50 1 1 B
X 1.10/PA7 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J2
#
DEF Ti_Booster_40_J2 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J2" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 2.01/GND 1 -600 450 300 R 50 50 1 1 W
X 2.02/PB2 2 -600 350 300 R 50 50 1 1 B
X 2.03/PE0 3 -600 250 300 R 50 50 1 1 B
X 2.04/PF0 4 -600 150 300 R 50 50 1 1 B
X 2.05/RESET 5 -600 50 300 R 50 50 1 1 B
X 2.06/PB7 6 -600 -50 300 R 50 50 1 1 B
X 2.07/PB6 7 -600 -150 300 R 50 50 1 1 B
X 2.08/PA4 8 -600 -250 300 R 50 50 1 1 B
X 2.09/PA3 9 -600 -350 300 R 50 50 1 1 B
X 2.10/PA2 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J3
#
DEF Ti_Booster_40_J3 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J3" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 3.01/+5V 1 -600 450 300 R 50 50 1 1 W
X 3.02/GND 2 -600 350 300 R 50 50 1 1 B
X 3.03/PD0 3 -600 250 300 R 50 50 1 1 B
X 3.04/PD1 4 -600 150 300 R 50 50 1 1 B
X 3.05/PD2 5 -600 50 300 R 50 50 1 1 B
X 3.06/PD3 6 -600 -50 300 R 50 50 1 1 B
X 3.07/PE1 7 -600 -150 300 R 50 50 1 1 B
X 3.08/PE2 8 -600 -250 300 R 50 50 1 1 B
X 3.09/PE3 9 -600 -350 300 R 50 50 1 1 B
X 3.10/PF1 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# Ti_Booster_40_J4
#
DEF Ti_Booster_40_J4 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J4" 0 -650 60 H V C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 4.01/PF2 1 -600 450 300 R 50 50 1 1 W
X 4.02/PF3 2 -600 350 300 R 50 50 1 1 B
X 4.03/PB3 3 -600 250 300 R 50 50 1 1 B
X 4.04/PC4 4 -600 150 300 R 50 50 1 1 B
X 4.05/PC5 5 -600 50 300 R 50 50 1 1 B
X 4.06/PC6 6 -600 -50 300 R 50 50 1 1 B
X 4.07/PC7 7 -600 -150 300 R 50 50 1 1 B
X 4.08/PD6 8 -600 -250 300 R 50 50 1 1 B
X 4.09/PD7 9 -600 -350 300 R 50 50 1 1 B
X 4.10/PF4 10 -600 -450 300 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# VCC
#
DEF VCC #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 100 30 H I C CNN
F1 "VCC" 0 100 30 H V C CNN
DRAW
X VCC 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 3 0 1 0 0 0 0 30 0 30 N
ENDDRAW
ENDDEF
#
#End Library
template/ti-stellaris-boosterpack40_min/boosterpack40_min.cmp deleted 100644 → 0
View file @ d23724f5
Cmp-Mod V01 Created by CvPcb (2011-nov-30)-testing date = Thu 18 Oct 2012 09:58:43 PM PDT
BeginCmp
TimeStamp = /5080DB5C;
Reference = J1;
ValeurCmp = TI_BOOSTER_40_J1;
IdModule = SIL-10;
EndCmp
BeginCmp
TimeStamp = /5080DBF4;
Reference = J2;
ValeurCmp = TI_BOOSTER_40_J2;
IdModule = SIL-10;
EndCmp
BeginCmp
TimeStamp = /5080DC03;
Reference = J3;
ValeurCmp = TI_BOOSTER_40_J3;
IdModule = SIL-10;
EndCmp
BeginCmp
TimeStamp = /5080DC12;
Reference = J4;
ValeurCmp = TI_BOOSTER_40_J4;
IdModule = SIL-10;
EndCmp
BeginCmp
TimeStamp = /5080A33C;
Reference = J5;
ValeurCmp = CONN_3;
IdModule = SIL-3;
EndCmp
EndListe
template/ti-stellaris-boosterpack40_min/boosterpack40_min.kicad_pcb deleted 100644 → 0
View file @ d23724f5
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template/ti-stellaris-boosterpack40_min/boosterpack40_min.mod deleted 100644 → 0
View file @ d23724f5
PCBNEW-LibModule-V1 Thu 18 Oct 2012 07:20:13 PM PDT
# encoding utf-8
Units mm
$INDEX
BoosterPack_J1_J2
$EndINDEX
$MODULE BoosterPack_J1_J2
Po 0 0 0 15 5080B8D5 00000000 ~~
Li BoosterPack_J1_J2
Sc 0
AR /5080AA0E
Op 0 0 0
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T1 0 0 1.524 1.524 0 0.3048 N V 21 N "J1-J2"
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Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 20.32
$EndPAD
$PAD
Sh "10" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 22.86
$EndPAD
$PAD
Sh "11" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 22.86
$EndPAD
$PAD
Sh "12" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 20.32
$EndPAD
$PAD
Sh "13" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 17.78
$EndPAD
$PAD
Sh "14" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 15.24
$EndPAD
$PAD
Sh "15" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 12.7
$EndPAD
$PAD
Sh "16" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 10.16
$EndPAD
$PAD
Sh "17" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 7.62
$EndPAD
$PAD
Sh "18" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 5.08
$EndPAD
$PAD
Sh "19" C 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 45.72 2.54
$EndPAD
$PAD
Sh "20" R 1.524 1.524 0 0 0
Dr 1.016 0 0
At STD N 00E0FFFF
Ne 1 "GND"
Po 45.72 0
$EndPAD
$EndMODULE BoosterPack_J1_J2
$EndLIBRARY
template/ti-stellaris-boosterpack40_min/boosterpack40_min.net deleted 100644 → 0
View file @ d23724f5
# EESchema Netlist Version 1.1 created Thu 18 Oct 2012 10:10:38 PM PDT
(
( /5080DB5C $noname J1 TI_BOOSTER_40_J1 {Lib=TI_BOOSTER_40_J1}
( 1 VCC )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
)
( /5080DBF4 $noname J2 TI_BOOSTER_40_J2 {Lib=TI_BOOSTER_40_J2}
( 1 GND )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
)
( /5080DC03 $noname J3 TI_BOOSTER_40_J3 {Lib=TI_BOOSTER_40_J3}
( 1 +5V )
( 2 GND )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
)
( /5080DC12 $noname J4 TI_BOOSTER_40_J4 {Lib=TI_BOOSTER_40_J4}
( 1 ? )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
)
)
*
{ Pin List by Nets
Net 2 "GND" "GND"
J3 2
J2 1
}
#End
template/ti-stellaris-boosterpack40_min/boosterpack40_min.pro deleted 100644 → 0
View file @ d23724f5
update=Thu 18 Oct 2012 10:08:50 PM PDT
version=1
last_client=kicad
[eeschema]
version=1
LibDir=
NetFmtName=
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=boosterpack
LibName2=power
LibName3=device
LibName4=transistors
LibName5=conn
LibName6=linear
LibName7=regul
LibName8=74xx
LibName9=cmos4000
LibName10=adc-dac
LibName11=memory
LibName12=xilinx
LibName13=special
LibName14=microcontrollers
LibName15=dsp
LibName16=microchip
LibName17=analog_switches
LibName18=motorola
LibName19=texas
LibName20=intel
LibName21=audio
LibName22=interface
LibName23=digital-audio
LibName24=philips
LibName25=display
LibName26=cypress
LibName27=siliconi
LibName28=opto
LibName29=atmel
LibName30=contrib
LibName31=valves
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=boosterpack20.net
PadDrill=1.016
PadSizeH=1.524
PadSizeV=1.524
PcbTextSizeV=1
PcbTextSizeH=1
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.15
SolderMaskClearance=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.15
ModuleOutlineThickness=0.15
[pcbnew/libraries]
LibDir=
LibName1=boosterpack20
LibName2=sockets
LibName3=connect
LibName4=discret
LibName5=pin_array
LibName6=divers
LibName7=libcms
LibName8=display
LibName9=led
LibName10=dip_sockets
LibName11=pga_sockets
LibName12=valves
[general]
version=1
template/ti-stellaris-boosterpack40_min/boosterpack40_min.sch deleted 100644 → 0
View file @ d23724f5
EESchema Schematic File Version 2 date Thu 18 Oct 2012 10:11:13 PM PDT
LIBS:boosterpack
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:boosterpack40_min-cache
EELAYER 27 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date "19 oct 2012"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L GND #PWR01
U 1 1 5080AA99
P 9150 2450
F 0 "#PWR01" H 9150 2450 30 0001 C CNN
F 1 "GND" H 9150 2380 30 0001 C CNN
1 9150 2450
0 1 1 0
$EndComp
$Comp
L VCC #PWR02
U 1 1 5080AA9F
P 9150 900
F 0 "#PWR02" H 9150 1000 30 0001 C CNN
F 1 "VCC" H 9150 1000 30 0000 C CNN
1 9150 900
0 -1 -1 0
$EndComp
$Comp
L TI_BOOSTER_40_J1 J1
U 1 1 5080DB5C
P 9750 1350
F 0 "J1" H 9700 2000 60 0000 C CNN
F 1 "TI_BOOSTER_40_J1" H 9750 700 60 0000 C CNN
1 9750 1350
1 0 0 -1
$EndComp
$Comp
L TI_BOOSTER_40_J2 J2
U 1 1 5080DBF4
P 9750 2900
F 0 "J2" H 9700 3550 60 0000 C CNN
F 1 "TI_BOOSTER_40_J2" H 9750 2250 60 0000 C CNN
1 9750 2900
1 0 0 -1
$EndComp
$Comp
L TI_BOOSTER_40_J3 J3
U 1 1 5080DC03
P 9750 4450
F 0 "J3" H 9700 5100 60 0000 C CNN
F 1 "TI_BOOSTER_40_J3" H 9750 3800 60 0000 C CNN
1 9750 4450
1 0 0 -1
$EndComp
$Comp
L TI_BOOSTER_40_J4 J4
U 1 1 5080DC12
P 9750 6000
F 0 "J4" H 9700 6650 60 0000 C CNN
F 1 "TI_BOOSTER_40_J4" H 9750 5350 60 0000 C CNN
1 9750 6000
1 0 0 -1
$EndComp
$Comp
L GND #PWR03
U 1 1 5080DC79
P 9150 4100
F 0 "#PWR03" H 9150 4100 30 0001 C CNN
F 1 "GND" H 9150 4030 30 0001 C CNN
1 9150 4100
0 1 1 0
$EndComp
$Comp
L +5V #PWR04
U 1 1 5080DC8B
P 9150 4000
F 0 "#PWR04" H 9150 4090 20 0001 C CNN
F 1 "+5V" H 9150 4090 30 0000 C CNN
1 9150 4000
0 -1 -1 0
$EndComp
$EndSCHEMATC
template/ti-stellaris-boosterpack40_min/meta/info.html deleted 100644 → 0
View file @ d23724f5
<html>
<head>
<title>Ti Launchpad XL - Expansion Board</title>
</head>
<body>
<h1>Launchpad XL</h1>
<h2>Expansion Board</h2>
This project template is the basis of an expansion board for the
<a href="http://processors.wiki.ti.com/index.php/BoosterPack_Design_Guide" target="blank">TI Launchpad
board.</a>
<br><br>
This Board conforms to the 40 pin Launchpad Standard, using the minimum size.
<br><br>
The board outline looks like the following:
<br>
<img src="launchpad_standard40.png" alt="40 Pin Launchpad">
<br>
(c)2012 Brian Sidebotham<br>
(c)2012 Henry von Tresckow<br>
(c)2012 Kicad Developers<br>
</body>
</html>
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