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Commit 051a7e57 authored by Dick Hollenbeck's avatar Dick Hollenbeck
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move import directory to new branch kicad-contrib

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import/README deleted 100644 → 0
View file @ 1ad84c07
File: README
Wed May 2 13:26:24 MDT 2012 fwb
This import directory contains tools for importing
to Kicad from other EDA tools.
edif2kicad / EDIF to EEschema schematic import
Tools with EDIF out writer:
o OrCad
o DataXpress
o Viewlogic
o IntuSoft ICAP
o Protel nVisage
o PADS ?
o P-CAD ?
o EDIF viewer (www.cimmetry.com)
o EDIF translator (www.elgris.com/content/edif_overview.html)
pcb123net2kicad / converts a pcb123 netlist to Kicad default format
import/edif2kicad/README deleted 100644 → 0
View file @ 1ad84c07
-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
edif.y, e2net, e2sch - Frank Bennett
see change_log.txt for status
Tools with EDIF out writer:
o OrCad
o DataXpress
o Viewlogic
o IntuSoft ICAP
o Protel nVisage
o PADS ?
o P-CAD ?
o EDIF viewer (www.cimmetry.com)
o EDIF translator (www.elgris.com/content/edif_overview.html)
Modified to output a KiCad Netlist
1) find/store InstanceNameDef. ViewRef - i.e. CMP31.cap
2) find/store Nets: NetNameDef, InstRef, PortRef
3) sort Nets by InstRef
Files:
makefile - Unix style makefile, runs Bison & runs gcc
ppedif.c - pretty print EDIF
edif.y - edif BNF Grammer, yylex, & main.c
savlib.c - output format
e2net.c - EDIF to netlist main
e2sch.c - EDIF to libs, schematic main
e2lib.c - EDIF to libs (obsolete)
examples/
eyespy - ORCad schematic (ATX PS)
PS10 - OrCad schematic in EDIF format(reformated)
PS10.EDF - Original PS10
PS10.pdf - PS10 schematic
PS10.net - KiCad netlist output see below
batest.1 - edif test file
batest.2 - edif test file
hptest - edif test file
hptest.net - KiCad netlist output see below
Tested under Linux and cygwin (http://www.cygwin.com)
Install: (./run_tests or)
make
cd examples
../ppedif < PS10.EDF > PS10
../e2net < PS10 > PS10.net or
../e2net PS10 or
../e2net hptest or
../e2sch examples/eyespy
../e2sch examples/PS10
../e2sch examples/BCD
Notes:
e2lib is now obsolute
Edif Notes:
o hptest is more readable for parser debugging. This begs for
EdifBeautifier for the OrCad output (use ppedif)
o EDIF schematic file contain
- symbol ports names, Direction, Designator
- symbol graphics, justification, orientation, origin
- sheet ports, instances, instance location, symbol reference
- sheet Netlist, wire paths
Doesn't seem to include footprint references
TODO:
o find/output schematic drawing, symbol graphics
-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
roger's previous comments:
This is an EDIF 2.0.0 parser, well more like a recognizer. If
you build the test case and run it with a valid EDIF file on the
standard input the program will just terminate normally. Sounds
real useful, huh. The nifty part is that the core of the parser
is YACC-able, almost. The problem is that the EDIF grammer is
so large that standard YACC just can't swallow it. So you need
to either super charge your YACC or use a YACC clone like BISON.
I used BISON, which is GNU-ware and so is freely available besides
being a terrific program. I think BISON is available from the
Free Software Foundation or on systems near you; even I am happy
to pass it on to whoever wants it.
Enough BISON praise. The reason I made the parser YACC-able is
because past experience indicates this one of the easiest forms
to add actions too, as well as put in updates or fixes. EDIF is
hardly context free though, and so I had to fold all sorts of
ugliness into the lexical analyzer to keep the YACC part clean.
This version is raw, it doesn't build symbol tables, do
semantic checking or create a database. The parser itself won't
even run though a wrapper has been included for testing. I wanted
to get out one version before I started adding such junk to it.
Again experience indicates that it is no fun lobotimizing parsers
so that you can do the low level stuff your way. Besides somebody
might even find a bug in the code ... naw, that's a silly
justification.
The 'makefile' I've included is not the one I use (and probably
will get me in lots of trouble). I invoke gobs of debugging and
profiling switches which are specific to our compilers, the
'makefile' is intended to be generic and may require some diddling.
I developed the code on a BSD 4.3 system and haven't added the
changes for SYS V, though they should be minor. The parser was too
large to post in one piece, so it got split and the 'makefile'
should know how to patch it together. There is one definition of
possible interest. Compiling with a '-DDEBUG' will cause the 8 most
recently consumed tokens to be displayed in the event of a parse
error. Profiling indicates a pretty costly item though.
Three test cases are included:
hptest - by Fabio Angelillis of Hewlett-Packard
batest.1
batest.2 - by Bill Ames of Silicon Compilers
Many thanks to them and the files are provide as is, no warrenty
implied and brush after every meal ...
I find the parser code to be easily immediately obvious and so
no documentation is included in the release. Humm ... don't buy that.
Actually documentation is in the works but it would delay this
posting too long if I waited for it to be completed. If you find
the parser totally incomprehensible, E-mail me a request and I'll
send you whatever I have written by the time I get your mail.
Lastly, as far as I'm concerned this parser is now in the public
domain and you can do anything you want with it. My next task is
to make it build a database and when that's through I'll probably
post it again ... you have been warned! Enjoy, and I'd be happy to
get bug reports or stories of how many ways you found to delete
the source ...
--
-your friendly neighborhood Rogue Monster roger@mips.com
UUCP: {decvax,ucbvax,ihnp4,hplabs,sun,ames,prls}!decwrl!mips!roger
USPS: MIPS Computer Systems, 930 Arques, Sunnyvale, CA 94086, (408) 991-0220
import/edif2kicad/change_log.txt deleted 100644 → 0
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FILE: change_log.txt
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2012-Apr-27 fwb
-EDIF added OrCad test/openrd.edf & test/OPENRD_16-00050-02.pdf files
-See OpenRD.org - Open Reference Designs
-Marvel Sheeva 88F6281 ARM SOC, USB, DDR2, PCIe, SATA
-multiple sheet symbol (netlister gives warning for
multiple U1 - sheet 2,3,4,6) need to fix EEschema netlister
-sheet ref [1,2,3] -> {1,2,3} (not bus members)
-bus range DDR2[15:0] ->DDR2[15..0]
-pickup footprint, manufacture and MFG part number
TODO fixme
-PARTSVALUE coordinates are wild
-get rid of all the ANNOTATION "COMMENT" OutText
-PORT LEFT,RIGHT,BOTH oxy s/b 0,0 not PWR symbols
testing
$make
$cd test
$../e2sch openrd.edf
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Apr-28 fwb
fix sig segv for eample/X375D_VER72.EDF
some bug with ARCS position??
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Apr-1 fwb
match top.sch sheet names with sch files
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Mar-31 fwb
cleanup module, pin names
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Mar-28 fwb
generate a top.sch if # pages >1
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Mar-26 fwb
first attempt to write multi-page schematics
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Mar-3 fwb
Ref Desig, value location move with symbol
netlist improved
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Feb-13 fwb
Reference and value move with Instance
added symbol text
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Feb-10 fwb
Improved Instance reference, value positions
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Feb-7 fwb
1) OrCad version 10 doesn't xmit PIN_32_NUMBER_32_IS_32_VISIBLE
so for now all pins are visable
2) Verion 10 uses portInstance to display PIN name/number but
the coordinates are messed and without 1) no pin hotspots are shown
3) added PCB_FOOTPRINT Instance property
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2008-Feb-6 fwb
improved text scaling
automatically compute pin lenght and orientation
Instances were getting confused with CellDefs
Circles & Rectangles seem to be correct now
Design can now include CellDefs
e2sch works with OrCad version 9 , EDIF from ver 10 has problems
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-dec-3 fwb
demote symbols (*XTIE* or *JUNCTION*) to connections
improving netlist quality
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-nov-21 fwb
fixed property property integer
multi segment WIRE - OrCad ver 10
text size per FigGrp
pick up Instance Ref Designator
TODO
remove XTIEs form netlist
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-nov-16 fwb
removed strndup from edif.y
added OutPro function to generate a .pro file with libs listed
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-oct-30 fwb
fixed CAPSYM.lib - power syms
better netlist - caps have VCC & GND
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-oct-23 fwb - clean up, fix core crash, pin visability
TODO:
o fix Power connections
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-oct-17 fwb - Schematic is useable, not perfect
eyespy works, PS10 doesn't
need to hand edit
o library for PinUP, PinDown
o OrCad mistakes (couple Cap positions)
TODO:
o debug/fix PS10
o add TIE points
o try to generate a netlist from EEschema
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-Oct-12 fwb - multiple libs, fixed ARC, DESIGNATOR/VALUE
position Demorgan convert & pin name renames
Looks good enough to start schematic
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-Oct-10 fwb - major rewrite, cleanup
produces separate libs, KiCad style
symbol pins are close
but not quite ready for primetime
ARC needs some work
Note:OrCad puts out multiple Instance designators
Program warnings only
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-oct-06 fwb - fewer errors on lib browse
symbls are recognizable
need to work on text orientation
e2net broken
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-oct-05 fwb - produces almost readable eyespy.lib
need to fix:
DRAW
P 0 0 0 0
after this error, ok, library browse
draws some stuff.
need to add curve/arc
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-oct-03 fwb - initial ci e2lib.c
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
20071003 fwb - split main out of edif. Now have e2net, e2sch
this also might keep the parser clean, which will
just build the structs
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-oct-02 fwb - added a pretty print edif program (ppedif.c) and
updated makefile
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
2007-sep-19 fwb - Original release
import/edif2kicad/e2lib.c deleted 100644 → 0
View file @ 1ad84c07
/*
* e2lib - EDIF to KiCad library
*/
#define global
#include <stdio.h>
#include <string.h>
#include "ed.h"
#include "eelibsl.h"
int yydebug=0;
int bug=0; // debug level:
char *InFile = "-";
char FileNameNet[64], FileNameLib[64], FileNameEESchema[64], FileNameKiPro[64];
FILE * FileEdf, * FileNet, * FileEESchema, * FileLib=NULL, * FileKiPro=NULL;
global char *cur_nnam=NULL;
global struct inst *insts=NULL, *iptr=NULL;
global struct con *cons=NULL, *cptr=NULL;
global float scale;
main(int argc, char *argv[])
{
char * version = "0.9";
char * progname;
progname = strrchr(argv[0],'/');
if (progname)
progname++;
else
progname = argv[0];
fprintf(stderr,"*** %s Version %s ***\n", progname, version);
if( argc != 2 ) {
fprintf(stderr, " usage: %s EDIFsrc \n") ; return(1);
}
InFile= argv[1];
if( (FileEdf = fopen( InFile, "rt" )) == NULL ) {
fprintf(stderr, " %s non trouve\n", InFile);
return(-1);
}
sprintf(FileNameEESchema,"%s.sch",argv[1]);
if( (FileEESchema = fopen( FileNameEESchema, "wt" )) == NULL ) {
fprintf(stderr, " %s impossible a creer\n", FileNameEESchema);
return(-1);
}
sprintf(FileNameKiPro,"%s.pro",argv[1]);
if( (FileKiPro = fopen( FileNameKiPro, "wt" )) == NULL ) {
fprintf(stderr, " %s impossible a creer\n", FileNameKiPro);
return(-1);
}
fprintf(stderr, "Parsing %s\n", InFile);
Libs=NULL;
ParseEDIF(FileEdf, stderr);
fprintf(FileEESchema,"$EndSCHEMATC\n");
for( ; Libs != NULL; Libs = Libs->nxt ){
// fprintf(FileLib,"### Library: %s ###\n", Libs->Name);
sprintf(FileNameLib,"%s.lib", Libs->Name);
if( (FileLib = fopen( FileNameLib, "wt" )) == NULL ) {
printf( " %s impossible a creer\n", FileNameLib);
return(-1);
}
fprintf(stderr," writing %s\n", FileNameLib);
SaveActiveLibrary(FileLib, Libs );
fclose(FileLib);
}
fclose(FileEESchema);
fprintf(stderr, " BonJour\n");
return(0);
}
import/edif2kicad/e2net.c deleted 100644 → 0
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/*
* e2net - EDIF to KiCad netlist
*/
#define global
#include <stdio.h>
#include <string.h>
#include "ed.h"
#include "eelibsl.h"
int yydebug=0;
int bug=0; // debug level: >2 netlist, >5 schematic, >8 all
char *InFile = "-";
char FileNameNet[64], FileNameSdtLib[64], FileNameEESchema[64], FileNameKiPro[64];
FILE * FileEdf, * FileNet, * FileEESchema, * FileSdtLib=NULL, * FileKiPro=NULL;
global char *cur_nnam=NULL;
global struct inst *insts=NULL, *iptr=NULL;
global struct con *cons=NULL, *cptr=NULL;
global float scale;
main(int argc, char *argv[])
{
char * version = "0.91";
char * progname;
progname = strrchr(argv[0],'/');
if (progname)
progname++;
else
progname = argv[0];
fprintf(stderr, "*** %s Version %s ***\n", progname, version);
// if( argc != 2 ) {
// fprintf(stderr, " usage: %s EDIDsrc \n") ; return(1);
// }
if( argc != 2 ){
FileEdf = stdin;
FileNet = stdout;
}else{
InFile= argv[1];
sprintf(FileNameNet,"%s.net",argv[1]);
fprintf(stderr, "Parsing %s\n", InFile);
if( (FileEdf = fopen( InFile, "rt" )) == NULL ) {
fprintf(stderr, " %s non trouve\n", InFile);
return(-1);
}
if( (FileNet = fopen( FileNameNet, "wt" )) == NULL ) {
fprintf(stderr, " %s impossible a creer\n", FileNameNet);
return(-1);
}
}
Libs=NULL;
FileEESchema = NULL;
ParseEDIF(FileEdf, stderr);
fprintf(stderr,"Parse Complete\n");
// bubble sort cons by ref
struct con *start, *a, *b, *c, *e = NULL, *tmp;
char line[80], s1[40], s2[40], *s;
// for (start=cons ; start != NULL ; start = start->nxt ){
// fprintf(stderr,"%s %25s %s\n", start->ref, start->pin, start->nnam);
// }
if(cons != NULL)
while (e != cons->nxt ) {
c = a = cons; b = a->nxt;
while(a != e) {
sprintf(s1, "%s%25s", a->ref, a->pin);
sprintf(s2, "%s%25s", b->ref, b->pin);
if( strcmp( s1, s2 ) >0 ) {
if(a == cons) {
tmp = b->nxt; b->nxt = a; a->nxt = tmp;
cons = b; c = b;
} else {
tmp = b->nxt; b->nxt = a; a->nxt = tmp;
c->nxt = b; c = b;
}
} else {
c = a; a = a->nxt;
}
b = a->nxt;
if(b == e)
e = a;
}
}
// dump connections by component
strcpy(s1, "" );
for (start=cons ; start != NULL ; start = start->nxt ){
if(strcmp(s1, start->ref) != 0)
printf("\n");
printf("%4s %3s %s\n", start->ref, start->pin, start->nnam);
strcpy(s1, start->ref);
}
#ifdef NOT
while(insts != NULL){
printf("%5s %s\n", insts->ins, insts->sym);
insts = insts->nxt;
}
#endif
// output kicad netlist
int first=1;
fprintf(FileNet,"( { netlist created 13/9/2007-18:11:44 }\n");
// by component
strcpy(s1, "" );
while (cons != NULL){
if(strcmp(s1, cons->ref) != 0) {
if(!first) fprintf(FileNet," )\n");
for( s=NULL, iptr=insts ; iptr != NULL && iptr->ins != NULL ; iptr = iptr->nxt ){
if( !strcmp(cons->ref, iptr->ins)){
s = iptr->sym;
break;
}
}
fprintf(FileNet," ( 84DFBB8F $noname %s %s {Lib=%s}\n", cons->ref, s, s);
first=0;
}
fprintf(FileNet," (%5s %s )\n",cons->pin, cons->nnam);
strcpy(s1, cons->ref);
cons = cons->nxt;
}
fprintf(FileNet," )\n)\n");
fclose(FileEdf);
fclose(FileNet);
if( FileNet != stdout )
fprintf(stderr," output is %s \n", FileNameNet);
fprintf(stderr, " BonJour\n");
return(0);
}
import/edif2kicad/e2sch.c deleted 100644 → 0
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/*
* e2sch - EDIF to KiCad schematic
*/
#define global
#include <stdio.h>
#include <string.h>
#include "ed.h"
#include "eelibsl.h"
int bug=3; // debug level:
int yydebug=0;
char *InFile = "-";
char FileNameNet[64], FileNameLib[64], FileNameEESchema[64], FileNameKiPro[64];
FILE *FileEdf, *FileNet, *FileEESchema=NULL, *FileLib=NULL, *FileKiPro=NULL;
global struct inst *insts=NULL, *iptr=NULL;
global struct con *cons=NULL, *cptr=NULL;
global int pass2=0;
global float scale;
global char efName[50];
main(int argc, char *argv[])
{
char * version = "0.97";
char * progname;
extern int nPages;
extern struct pwr *pgs;
progname = strrchr(argv[0],'/');
if (progname)
progname++;
else
progname = argv[0];
fprintf(stderr,"*** %s Version %s ***\n", progname, version);
if( argc != 2 ) {
fprintf(stderr, " usage: EDIFfile \n") ; return(1);
}
InFile= argv[1];
if( (FileEdf = fopen( InFile, "r" )) == NULL ) {
fprintf(stderr, " '%s' doesn't exist\n", InFile);
return(-1);
}
Libs=NULL; strcpy(schName,"");
fprintf(stderr, "Parsing %s & writing .sch file\n", InFile);
ParseEDIF(FileEdf, stderr);
fprintf(stderr, "\n%s Libs -> cache <<<<\n", progname);
sprintf(FileNameLib,"%s.cache.lib", schName);
if( (FileLib = fopen( FileNameLib, "wt" )) == NULL ) {
printf( " %s impossible too create\n", FileNameLib);
return(-1);
}
OutLibHead(FileLib, Libs );
for( ; Libs != NULL; Libs = Libs->nxt ){
//fprintf(stderr, " Lib:%s %s\n", Libs->Name, schName);
SaveActiveLibrary(FileLib, Libs );
}
OutLibEnd(FileLib);
pass2++;
// freopen(InFile, "rt", FileEdf);
fprintf(stderr, " %d Pages\n",nPages);
fprintf(stderr, " BonJour\n");
return(0);
}
import/edif2kicad/ed.h deleted 100644 → 0
View file @ 1ad84c07
/*
* ed.h
*/
#ifndef E_H
#define E_H
#ifndef global
#define global extern
#endif
#define YYDEBUG 1
#define IDENT_LENGTH 255
#define Malloc(s) malloc(s)
#define Free(p) free(p)
#define ABS(v) ((v) < 0 ? -(v) : (v))
#define Getc(s) getc(s)
#define Ungetc(c) ungetc(c,Input);
extern int atoi();
extern int bug;
struct inst {
char *ins, *sym;
struct inst *nxt;
};
char *cur_nnam;
struct con {
char *ref;
char *pin;
char *nnam;
struct con *nxt;
};
struct FigGrpStruct {
char Name[20];
int PathWidth, Color, TextHeight, Visible;
struct FigGrpStruct * nxt;
};
struct plst { int x, y; struct plst *nxt;};
struct st { char *s; struct plst *p; int n; struct st *nxt;};
struct pwr { char *s, *r ; struct pwr *nxt;};
#endif
/*
ViewRef : VIEWREF ViewNameRef _ViewRef PopC
{
$$=$2; if(bug>2)fprintf(Error,"ViewRef: %25s ", $3);
iptr = (struct inst *)Malloc(sizeof (struct inst));
iptr->sym = $3;
iptr->nxt = insts;
insts = iptr;
}
*/
import/edif2kicad/edif.y deleted 100644 → 0
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import/edif2kicad/eelibsl.h deleted 100644 → 0
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/************************************************/
/* Local definitions of the EELibs?.c modules. */
/************************************************/
#ifndef EELIBSL_H
#define EELIBSL_H
#ifndef global
#define global extern
#endif
#define DEFAULT_SIZE_TEXT 60 /* Hauteur (en 1/000" par defaut des textes */
#define BooleanType char
// TODO get rid of PART_NAME_LEN, use char * && strncpy
#define PART_NAME_LEN 64 /* Maximum length of part name. */
#define PREFIX_NAME_LEN 5 /* Maximum length of prefix (IC, R, SW etc.). */
#define FOOT_NAME_LEN 40 /* Maximum length of footprint name. */
#define MFG_NAME_LEN 30 /* Maximum length of manufacture name. */
#define MFG_PART_LEN 40 /* Maximum length of manf part name. */
#define PIN_SEPERATOR "\n" /* See Pins in LibraryEntryStruct. */
#define FILE_IDENT "EESchema-LIBRARY Version 2.0" /* Must be at the lib file start. */
#define PIN_WIDTH 100 /* Width between 2 pins in internal units. */
#define PIN_LENGTH 300 /* Default Length of each pin to be drawn. */
#define INVERT_PIN_RADIUS 40 /* Radius of inverted pin circle. */
#define CLOCK_PIN_DIM 40 /* Dim of clock pin symbol. */
#define IEEE_SYMBOL_PIN_DIM 40 /* Dim of special pin symbol. */
/* Normalize angle to be in the 0..360 range: */
#define NORMALIZE_ANGLE(Angle) { while (Angle < 0) Angle += 3600; \
while (Angle > 3600) Angle -= 3600; }
/* definition des types des structures d'elements de librairie */
typedef enum {
ROOT, /* La structure est du type LibraryEntryStruct */
ALIAS /* La structure est un alias */
} LibrEntryType;
/* Definitions des Pins */
typedef enum { /* Type des Pins */
PIN_INPUT,
PIN_OUTPUT,
PIN_BIDI,
PIN_TRISTATE,
PIN_PASSIVE,
PIN_UNSPECIFIED,
PIN_POWER,
PIN_OPENCOLLECTOR,
PIN_OPENEMITTER
} ElectricPinType;
/* Autres bits: bits du membre .Flag des Pins */
#define PINNOTDRAW 1 /* si 1: pin invisible */
typedef enum { /* Forme des Pins */
NONE = 0,
INVERT = 1,
CLOCK = 2,
LOWLEVEL_IN = 4,
LOWLEVEL_OUT = 8
} DrawPinShape;
typedef enum { /* Orientation des Pins */
PIN_N = 'N', // normal, no rotation
PIN_RIGHT = 'R',
PIN_LEFT = 'L',
PIN_UP = 'U',
PIN_DOWN = 'D',
} DrawPinOrient;
typedef enum
{
REFERENCE = 0, /* Champ Reference of part, i.e. "IC21" */
VALUE, /* Champ Value of part, i.e. "3.3K" */
FIELD1,
FIELD2,
FIELD3,
FIELD4,
FIELD5,
FIELD6,
FIELD7,
FIELD8,
MODULE_PCB, /* Champ Name Module PCB, i.e. "16DIP300" */
SHEET_NAME /* Champ Name Schema componant, i.e. "cnt16.sch" */
} NumFieldType;
typedef struct LibraryFieldEntry /* Fields auxiliaires identiques aux fields
des composants, pouvant etre predefinis en lib */
{
int StructType;
int FieldId; /* 1 a 11, mais usuellement MODULE_PCB et SHEET_PART */
int PosX, PosY, Size;
int Orient; /* Orientation */
int Flags; /* Attributs (Non visible ...) */
char *Text; /* Pointeur sur le texte */
struct LibraryFieldEntry *nxt;
}LibraryFieldEntry;
/* Structures de dessin des composants : */
typedef struct LibraryAliasStruct {
LibrEntryType Type; /* Type = ALIAS pour cette struct */
char Name[PART_NAME_LEN + 1]; /* Alias Part name. */
char RootName[PART_NAME_LEN + 1]; /* Part name pour le composant de reference */
struct LibraryEntryStruct * RootEntry; /* Pointeur sur le composant de ref */
} LibraryAliasStruct;
typedef enum {
ARC_DRAW_TYPE,
CIRCLE_DRAW_TYPE,
TEXT_DRAW_TYPE,
SQUARE_DRAW_TYPE,
LINE_DRAW_TYPE,
POLYLINE_DRAW_TYPE,
SEGMENT_DRAW_TYPE,
PIN_DRAW_TYPE
} DrawStructType;
typedef struct LibraryDrawArc {
int x, y, r, t1, t2, width;
} LibraryDrawArc;
typedef struct LibraryDrawCircle {
int x, y, r, width;
} LibraryDrawCircle;
typedef struct LibraryDrawText {
int Horiz, x, y, size, type;
char *Text;
} LibraryDrawText;
typedef struct LibraryDrawSquare {
int x1, y1, x2, y2, width;
} LibraryDrawSquare;
typedef struct LibraryDrawPolyline {
int n, *PolyList;
BooleanType Fill;
int width;
} LibraryDrawPolyline;
typedef struct LibraryDrawSegment {
int x1, y1, x2, y2, width;
} LibraryDrawSegment;
typedef struct LibraryDrawPin {
int posX, posY; /* Position du point de reference de la Pin */
short Len; /* longueur de la Pin */
short Orient; /* Orientation de la Pin (Up, Down, Left, Right) */
short PinShape; /* Bit a bit: forme de la pin (voir enum prec) */
char PinType; /* type electrique de la pin */
char Flags; /* bit 0 != 0: pin invisible */
char Num[5]; /* numero / ref grid array, si .Num < 0 4 chars */
char * Name;
char * ReName;
short SizeNum, SizeName; /* taille des num pin et name pin */
} LibraryDrawPin;
typedef struct LibraryDrawEntryStruct {
int DrawType;
short Unit; /* identification de l'unite */
short Convert; /* identification de la forme en multiples rep. */
union {
LibraryDrawArc Arc;
LibraryDrawCircle Circ;
LibraryDrawText Text;
LibraryDrawSquare Sqr;
LibraryDrawPolyline Poly;
LibraryDrawSegment Segm;
LibraryDrawPin Pin;
} U;
struct LibraryDrawEntryStruct *nxt;
} LibraryDrawEntryStruct;
typedef struct LibraryEntryStruct {
LibrEntryType Type; /* Type = ROOT;
= ALIAS pour struct LibraryAliasType */
char Name[PART_NAME_LEN + 1]; /* Part name. */
char Prefix[PREFIX_NAME_LEN + 1]; /* Prefix ( U, IC ... ) */
char * AliasList; /* Pointeur sur la liste des ALIAS de ce composant */
int NamePosX, NamePosY, NameOrient, NameSize;
int PrefixPosX, PrefixPosY, PrefixOrient, PrefixSize;
int NumOfUnits;
int TextInside;
BooleanType DrawPinNum, DrawPinName, DrawName, DrawPrefix;
LibraryFieldEntry *Fields; /* Liste des Champs auxiliaires */
LibraryDrawEntryStruct *Drawings; /* How to draw this part */
int BBoxMinX, BBoxMaxX, BBoxMinY, BBoxMaxY; /* BBox around the part. */
struct LibraryEntryStruct *nxt;
} LibraryEntryStruct;
typedef struct LibraryStruct {
char *Name; /* Name of library loaded. */
int isSheet;
int NumOfParts; /* Number of parts this library has. */
struct LibraryEntryStruct *Entries; /* Parts themselves are saved here. */
struct LibraryStruct *nxt; /* Point on next lib in chain. */
} LibraryStruct;
global LibraryStruct *Libs, *CurrentLib, *DesignName, *LSptr;
global LibraryEntryStruct *LibEntry, *LEptr;
global LibraryDrawEntryStruct *Drawing, *LDptr;
global LibraryFieldEntry *InsEntry;
global char schName[50];
#endif // EELIBSL_H
/*
ViewRef : VIEWREF ViewNameRef _ViewRef PopC
{
$$=$2; if(bug>2)fprintf(Error,"ViewRef: %25s ", $3);
iptr = (struct inst *)Malloc(sizeof (struct inst));
iptr->sym = $3;
iptr->nxt = insts;
insts = iptr;
}
*/
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( { netlist created 13/9/2007-18:11:44 }
( 84DFBB8F $noname I_45_115838881 (null) {Lib=(null)}
( A ENABLE )
( B BCD3 )
( C BCD0 )
( Y N00168 )
)
( 84DFBB8F $noname I_45_115968994 (null) {Lib=(null)}
( A N00168 )
( B N00040 )
( Y RCO )
)
( 84DFBB8F $noname I_45_238411093 (null) {Lib=(null)}
( A BCD2 )
( B BCD1 )
( Y N00040 )
)
( 84DFBB8F $noname I_45_238416467 (null) {Lib=(null)}
( D N00128 )
( E ENABLE )
( Q BCD0 )
( CLK CLOCK )
( CLR CLEAR )
)
( 84DFBB8F $noname I_45_238416503 (null) {Lib=(null)}
( D N00106 )
( Q BCD1 )
( CLK CLOCK )
( CLR CLEAR )
(CLEAR ENABLE )
)
( 84DFBB8F $noname I_45_238416604 (null) {Lib=(null)}
( E ENABLE )
( Q BCD2 )
( CLK CLOCK )
( CLR CLEAR )
(CLOCK N00084 )
)
( 84DFBB8F $noname I_45_238416651 (null) {Lib=(null)}
( E ENABLE )
( Q BCD3 )
( CLK CLOCK )
( CLR CLEAR )
(ENABLE N00052 )
)
( 84DFBB8F $noname I_45_238421660 (null) {Lib=(null)}
( A BCD0 )
( B BCD3 )
( Y N00160 )
)
( 84DFBB8F $noname I_45_238421799 (null) {Lib=(null)}
( A BCD0 )
( B BCD1 )
( C BCD2 )
( Y N00158 )
)
( 84DFBB8F $noname I_45_238422793 (null) {Lib=(null)}
( A BCD0 )
( B BCD3 )
( C BCD1 )
( Y N00156 )
)
( 84DFBB8F $noname I_45_238423509 (null) {Lib=(null)}
( A BCD1 )
( B BCD3 )
( C BCD0 )
( Y N00154 )
)
( 84DFBB8F $noname I_45_238425335 (null) {Lib=(null)}
( A BCD0 )
( B BCD3 )
( C BCD2 )
( Y N00152 )
)
( 84DFBB8F $noname I_45_238426442 (null) {Lib=(null)}
( A BCD1 )
( B BCD3 )
( C BCD2 )
( Y N39975231091 )
)
( 84DFBB8F $noname I_45_238427502 (null) {Lib=(null)}
( A BCD2 )
( B BCD3 )
( C BCD0 )
( D BCD1 )
( Y N00150 )
)
( 84DFBB8F $noname I_45_238429437 (null) {Lib=(null)}
( A BCD0 )
( B BCD1 )
( C BCD2 )
( D BCD3 )
( Y N00148 )
)
( 84DFBB8F $noname I_45_238430999 (null) {Lib=(null)}
( A BCD3 )
( B BCD0 )
( C BCD1 )
( D BCD2 )
( Y N00146 )
)
( 84DFBB8F $noname I_45_297432317 (null) {Lib=(null)}
( A N00146 )
( B N00148 )
( Y N00052 )
)
( 84DFBB8F $noname I_45_297444187 (null) {Lib=(null)}
( A N00150 )
( B N39975231091 )
( C N00152 )
( Y N00084 )
)
( 84DFBB8F $noname I_45_297454133 (null) {Lib=(null)}
( A N00154 )
( B N00156 )
( Y N00106 )
)
( 84DFBB8F $noname I_45_297458928 (null) {Lib=(null)}
( B N00160 )
( Y N00128 )
( RCO N00158 )
)
( 84DFBB8F $noname XRIP35DF890 (null) {Lib=(null)}
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E21F8 (null) {Lib=(null)}
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E2230 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &1 BCD2 )
)
( 84DFBB8F $noname XRIP36E2268 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E22A0 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E22D8 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD2 )
)
( 84DFBB8F $noname XRIP36E2310 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E2618 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E2650 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E2688 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E26C0 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E26F8 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E2730 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E2768 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E27A0 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
(BCD_91_3_46__46_0_93_ BCD2 )
)
( 84DFBB8F $noname XRIP36E27D8 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E2A38 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E2A70 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E2AA8 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E2AE0 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E2B18 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD2 )
)
( 84DFBB8F $noname XRIP36E2B50 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E2B88 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E2BC0 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD2 )
)
( 84DFBB8F $noname XRIP36E2BF8 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E2E58 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E2E90 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E2EC8 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD2 )
)
( 84DFBB8F $noname XRIP36E2F00 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD0 )
)
( 84DFBB8F $noname XRIP36E2F38 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E2F70 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD2 )
)
( 84DFBB8F $noname XRIP36E2FA8 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E2FE0 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD2 )
)
( 84DFBB8F $noname XRIP36E3018 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E33A0 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD1 )
)
( 84DFBB8F $noname XRIP36E33D8 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD2 )
)
( 84DFBB8F $noname XRIP36E3410 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
( 84DFBB8F $noname XRIP36E3448 (null) {Lib=(null)}
( &1 BCD2 )
( &1 BCD2 )
( &2 BCD3 )
)
)
import/edif2kicad/examples/CAP2EDI.lib deleted 100644 → 0
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( { netlist created 13/9/2007-18:11:44 }
( 84DFBB8F $noname I78969 (null) {Lib=(null)}
( &1 N79094 )
( &2 N79128 )
( &3 N79140 )
( &4 N79173 )
( &5 GND )
( &6 N79192 )
( &7 GND )
( &9 GND )
( &10 VPLUS )
)
( 84DFBB8F $noname I78971 (null) {Lib=(null)}
( &1 VPLUS )
( &2 GND )
)
( 84DFBB8F $noname I78973 (null) {Lib=(null)}
( &1 VPLUS )
( &2 GND )
)
( 84DFBB8F $noname I78975 (null) {Lib=(null)}
( &1 N79332 )
( &2 GND )
)
( 84DFBB8F $noname I78977 (null) {Lib=(null)}
( &1 GND )
( &2 N79368 )
)
( 84DFBB8F $noname I78979 (null) {Lib=(null)}
( &1 &_43_5S )
( &2 GND )
)
( 84DFBB8F $noname I78981 (null) {Lib=(null)}
( &1 &_43_3_46_3S )
( &2 GND )
)
( 84DFBB8F $noname I78983 (null) {Lib=(null)}
( &1 GND )
( &2 &_43_5S )
( &3 &_43_3_46_3S )
( &4 N79332 )
( &5 N79368 )
( &6 COMMON )
( &7 &_43_5 )
( &8 &_43_3_46_3 )
( &9 &_43_13 )
( &10 &_45_13 )
)
( 84DFBB8F $noname I78985 (null) {Lib=(null)}
( FB N84443 )
( VC N79868 )
( GND GND )
( GND GND )
( VIN VPLUS )
( VSW N79094 )
)
( 84DFBB8F $noname I78987 (null) {Lib=(null)}
( &1 VIN2 )
( &4 GND )
( &5 VPLUS )
( &8 VIN1 )
)
( 84DFBB8F $noname I78991 (null) {Lib=(null)}
( &1 VIN1 )
( &2 VIN2 )
)
( 84DFBB8F $noname I78993 (null) {Lib=(null)}
( &1 VPLUS )
( &2 N79112 )
)
( 84DFBB8F $noname I78995 (null) {Lib=(null)}
( &1 N79112 )
( &2 N79094 )
)
( 84DFBB8F $noname I78997 (null) {Lib=(null)}
(ANODE N79128 )
(CATHODE &_43_5S )
)
( 84DFBB8F $noname I78999 (null) {Lib=(null)}
(ANODE N79140 )
(CATHODE &_43_3_46_3S )
)
( 84DFBB8F $noname I79001 (null) {Lib=(null)}
(ANODE N79173 )
(CATHODE N79332 )
)
( 84DFBB8F $noname I79003 (null) {Lib=(null)}
(ANODE N79368 )
(CATHODE N79192 )
)
( 84DFBB8F $noname I79007 (null) {Lib=(null)}
( &1 N79691 )
( &2 SHUTDOWN )
)
( 84DFBB8F $noname I79009 (null) {Lib=(null)}
( &1 VIN1 )
( &2 VIN2 )
( &3 SHUTDOWN )
( &4 COMMON )
( &5 &_43_5 )
( &6 &_43_3_46_3 )
( &7 &_43_13 )
( &8 &_45_13 )
)
( 84DFBB8F $noname I79756 (null) {Lib=(null)}
( BASE N80336 )
(EMITTER GND )
(COLLECTOR N79868 )
)
( 84DFBB8F $noname I79885 (null) {Lib=(null)}
( &1 N79868 )
( &2 N80145 )
)
( 84DFBB8F $noname I79906 (null) {Lib=(null)}
(ANODE N80336 )
(CATHODE VPLUS )
)
( 84DFBB8F $noname I80033 (null) {Lib=(null)}
( &1 N80145 )
( &2 GND )
)
( 84DFBB8F $noname I80035 (null) {Lib=(null)}
( &1 N80336 )
( &2 GND )
)
( 84DFBB8F $noname I80051 (null) {Lib=(null)}
( &1 GND )
( &2 N79691 )
( &3 N79868 )
)
( 84DFBB8F $noname I80699 (null) {Lib=(null)}
( &1 &_43_5 )
( &2 COMMON )
)
( 84DFBB8F $noname I80701 (null) {Lib=(null)}
( &1 &_43_3_46_3 )
( &2 COMMON )
)
( 84DFBB8F $noname I80705 (null) {Lib=(null)}
( &1 &_43_13 )
( &2 COMMON )
)
( 84DFBB8F $noname I80709 (null) {Lib=(null)}
( &1 &_45_13 )
( &2 COMMON )
)
( 84DFBB8F $noname I80877 (null) {Lib=(null)}
( &1 VIN1 )
( &2 VIN2 )
)
( 84DFBB8F $noname I80976 (null) {Lib=(null)}
( &1 GND )
( &2 N81061 )
( &2 GND )
)
( 84DFBB8F $noname I81059 (null) {Lib=(null)}
( &1 N84443 )
( &2 N81061 )
)
( 84DFBB8F $noname I81066 (null) {Lib=(null)}
( &1 N81111 )
( &2 &_43_5S )
)
( 84DFBB8F $noname I81109 (null) {Lib=(null)}
( &1 N81111 )
( &2 &_43_3_46_3S )
)
( 84DFBB8F $noname I81207 (null) {Lib=(null)}
( &1 GND )
( &2 SHUTDOWN )
)
( 84DFBB8F $noname I81967 (null) {Lib=(null)}
( &1 &_43_5S )
( &2 GND )
)
( 84DFBB8F $noname I81971 (null) {Lib=(null)}
( &1 &_43_3_46_3S )
( &2 GND )
)
( 84DFBB8F $noname I82267 (null) {Lib=(null)}
( &1 &_43_5 )
( &2 COMMON )
)
( 84DFBB8F $noname I82271 (null) {Lib=(null)}
( &1 &_43_3_46_3 )
( &2 COMMON )
)
( 84DFBB8F $noname I82326 (null) {Lib=(null)}
( &1 &_43_13 )
( &2 COMMON )
)
( 84DFBB8F $noname I82330 (null) {Lib=(null)}
( &1 COMMON )
( &2 &_45_13 )
)
( 84DFBB8F $noname I84174 (null) {Lib=(null)}
( &1 VPLUS )
( GND GND )
)
( 84DFBB8F $noname I84244 (null) {Lib=(null)}
( &1 N84443 )
( &2 N81111 )
)
)
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(EDIF GSL_MODEL
(EDIFVersion 2 0 0)
(EDIFLevel 0)
(keywordMap
(keywordLevel 0))
(status
(written
(timeStamp 0 0 0 0 0 0)
(comment "Need to fix timeStamp")
(author "Silicon Compiler Systems")
(program "qfcx"
(version "1.0"))))
(external PRIM_LIB (ediflevel 0) (technology (numberDefinition)))
(library GSL_LIB
(ediflevel 0) (technology (numberDefinition))
(cell NMOS (cellType generic)
(view NMOS (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port ENABLE (direction INPUT))
(port OUTPUT (direction OUTPUT)))))
(cell PMOS (cellType generic)
(view PMOS (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port ENABLE (direction INPUT))
(port OUTPUT (direction OUTPUT)))))
(cell TRI (cellType generic)
(view TRI (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port ENABLE (direction INPUT))
(port OUTPUT (direction OUTPUT)))))
(cell RES (cellType generic)
(view RES (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port ENABLE (direction INPUT))
(port OUTPUT (direction OUTPUT)))))
(cell WBUF (cellType generic)
(view WBUF (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port OUTPUT (direction OUTPUT))))))
(library COMP_LIB
(ediflevel 0) (technology (numberDefinition))
(cell DVALID (cellType GENERIC)
(view SIM_MODEL (viewType NETLIST)
(interface
(port DVALIDE (direction INPUT))
(port PHASE_B (direction INPUT))
(port VDD (direction INPUT))
(port VSS (direction INPUT))
(port DVALID (direction OUTPUT)))
(contents
(instance BUF_8 (viewRef SIM_MODEL (cellRef BUF))
(parameterAssign DT (string "20 20")))
(instance INV_13 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "4 4")))
(instance WBUF_15 (viewRef SIM_MODEL (cellRef WBUF))
(parameterAssign DT (string "1 1")))
(instance INV_14 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "1 1")))
(instance NMOS_9 (viewRef SIM_MODEL (cellRef NMOS (libraryRef GSL_LIB))))
(instance NMOS_10 (viewRef SIM_MODEL (cellRef NMOS (libraryRef GSL_LIB)))
(parameterAssign DT (string "10 10")))
(instance PMOS_11 (viewRef SIM_MODEL (cellRef PMOS (libraryRef GSL_LIB)))
(parameterAssign DT (string "1 1")))
(instance PMOS_12 (viewRef SIM_MODEL (cellRef PMOS (libraryRef GSL_LIB)))
(parameterAssign DT (string "19 19")))
(net N3
(joined
(portRef INPUT (instanceRef NMOS_10))
(portRef OUTPUT (instanceRef NMOS_9))))
(net N4
(joined
(portRef INPUT (instanceRef WBUF_15))
(portRef OUTPUT (instanceRef WBUF_15))
(portRef INPUT (instanceRef INV_14))
(portRef OUTPUT (instanceRef PMOS_12))
(portRef OUTPUT (instanceRef NMOS_10))))
(net N5
(joined
(portRef INPUT (instanceRef PMOS_12))
(portRef OUTPUT (instanceRef PMOS_11))))
(net N6
(joined
(portRef OUTPUT (instanceRef INV_13))
(portRef ENABLE (instanceRef PMOS_12))))
(net N7
(joined
(portRef ENABLE (instanceRef PMOS_11))
(portRef ENABLE (instanceRef NMOS_9))
(portRef OUTPUT (instanceRef BUF_8))))
(net VDD
(joined
(portRef VDD)
(portRef INPUT (instanceRef PMOS_11))))
(net VSS
(joined
(portRef VSS)
(portRef INPUT (instanceRef NMOS_9))))
(net DVALID
(joined
(portRef DVALID)
(portRef OUTPUT (instanceRef INV_14))))
(net DVALIDE
(joined
(portRef DVALIDE)
(portRef INPUT (instanceRef BUF_8))))
(net PHASE_B
(joined
(portRef PHASE_B)
(portRef INPUT (instanceRef INV_13))
(portRef ENABLE (instanceRef NMOS_10)))))))
)
)
import/edif2kicad/examples/batest.2 deleted 100644 → 0
View file @ 1ad84c07
(EDIF GSL_MODEL
(EDIFVersion 2 0 0)
(EDIFLevel 0)
(keywordMap
(keywordLevel 0))
(status
(written
(timeStamp 0 0 0 0 0 0)
(comment "Need to fix timeStamp")
(author "Silicon Compiler Systems")
(program "qfcx"
(version "1.0"))))
(external PRIM_LIB (ediflevel 0) (technology (numberDefinition)))
(library GSL_LIB
(ediflevel 0) (technology (numberDefinition))
(cell NMOS (cellType generic)
(view NMOS (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port ENABLE (direction INPUT))
(port OUTPUT (direction OUTPUT)))))
(cell PMOS (cellType generic)
(view PMOS (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port ENABLE (direction INPUT))
(port OUTPUT (direction OUTPUT)))))
(cell TRI (cellType generic)
(view TRI (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port ENABLE (direction INPUT))
(port OUTPUT (direction OUTPUT)))))
(cell RES (cellType generic)
(view RES (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port ENABLE (direction INPUT))
(port OUTPUT (direction OUTPUT)))))
(cell WBUF (cellType generic)
(view WBUF (viewType netlist)
(interface
(port INPUT (direction INPUT))
(port OUTPUT (direction OUTPUT))))))
(library COMP_LIB
(ediflevel 0) (technology (numberDefinition))
(cell BILLTEMP (cellType GENERIC)
(view SIM_MODEL (viewType NETLIST)
(interface
(port SEL0 (direction INPUT))
(port SEL1 (direction INPUT))
(port IN0 (direction INPUT))
(port IN1 (direction INPUT))
(port IN2 (direction INPUT))
(port OUT (direction OUTPUT)))
(contents
(instance AND_24 (viewRef SIM_MODEL (cellRef AND_2)))
(instance AND_26 (viewRef SIM_MODEL (cellRef AND_2)))
(instance INV_16 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "1 1")))
(instance INV_19 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "1 1")))
(instance INV_21 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "1 1")))
(instance OR_28 (viewRef SIM_MODEL (cellRef OR_2)))
(instance OR_30 (viewRef SIM_MODEL (cellRef OR_2)))
(instance INV_23 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "2 2")))
(instance INV_25 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "1 1")))
(instance INV_27 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "2 2")))
(instance INV_29 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "1 1")))
(instance INV_31 (viewRef SIM_MODEL (cellRef INV))
(parameterAssign DT (string "2 2")))
(instance NMOS_17 (viewRef SIM_MODEL (cellRef NMOS (libraryRef GSL_LIB)))
(parameterAssign DT (string "4 4")))
(instance NMOS_18 (viewRef SIM_MODEL (cellRef NMOS (libraryRef GSL_LIB)))
(parameterAssign DT (string "5 5")))
(instance NMOS_20 (viewRef SIM_MODEL (cellRef NMOS (libraryRef GSL_LIB)))
(parameterAssign DT (string "3 3")))
(instance NMOS_22 (viewRef SIM_MODEL (cellRef NMOS (libraryRef GSL_LIB)))
(parameterAssign DT (string "4 4")))
(net N1
(joined
(portRef INPUT0 (instanceRef OR_30))
(portRef INPUT0 (instanceRef AND_24))
(portRef INPUT (instanceRef NMOS_17))
(portRef OUTPUT (instanceRef INV_16))))
(net N2
(joined
(portRef OUTPUT (instanceRef AND_26))
(portRef INPUT (instanceRef NMOS_18))))
(net N3
(joined
(portRef INPUT (instanceRef NMOS_20))
(portRef OUTPUT (instanceRef INV_19))))
(net N4
(joined
(portRef INPUT (instanceRef INV_31))
(portRef OUTPUT (instanceRef NMOS_20))
(portRef OUTPUT (instanceRef NMOS_18))))
(net N5
(joined
(portRef INPUT1 (instanceRef OR_30))
(portRef INPUT1 (instanceRef AND_24))
(portRef INPUT (instanceRef NMOS_22))
(portRef OUTPUT (instanceRef INV_21))))
(net N6
(joined
(portRef INPUT (instanceRef INV_29))
(portRef OUTPUT (instanceRef INV_23))
(portRef ENABLE (instanceRef NMOS_18))))
(net N7
(joined
(portRef OUTPUT (instanceRef INV_25))
(portRef ENABLE (instanceRef NMOS_22))))
(net N8
(joined
(portRef OUTPUT (instanceRef INV_27))
(portRef INPUT (instanceRef INV_25))
(portRef ENABLE (instanceRef NMOS_17))))
(net N9
(joined
(portRef OUTPUT (instanceRef INV_29))
(portRef ENABLE (instanceRef NMOS_20))))
(net N20z
(joined
(portRef OUTPUT (instanceRef OR_28))
(portRef INPUT1 (instanceRef AND_26))))
(net N21z
(joined
(portRef INPUT1 (instanceRef OR_28))
(portRef OUTPUT (instanceRef NMOS_22))
(portRef OUTPUT (instanceRef NMOS_17))))
(net N18z
(joined
(portRef INPUT0 (instanceRef OR_28))
(portRef OUTPUT (instanceRef AND_24))))
(net N19z
(joined
(portRef OUTPUT (instanceRef OR_30))
(portRef INPUT0 (instanceRef AND_26))))
(net IN0
(joined
(portRef IN0)
(portRef INPUT (instanceRef INV_16))))
(net IN1
(joined
(portRef IN1)
(portRef INPUT (instanceRef INV_21))))
(net IN2
(joined
(portRef IN2)
(portRef INPUT (instanceRef INV_19))))
(net OUT
(joined
(portRef OUT)
(portRef OUTPUT (instanceRef INV_31))))
(net SEL0
(joined
(portRef SEL0)
(portRef INPUT (instanceRef INV_27))))
(net SEL1
(joined
(portRef SEL1)
(portRef INPUT (instanceRef INV_23)))))))
)
)
import/edif2kicad/examples/eyespy deleted 100644 → 0
View file @ 1ad84c07
This diff is collapsed.
import/edif2kicad/examples/eyespy.net deleted 100644 → 0
View file @ 1ad84c07
( { netlist created 13/9/2007-18:11:44 }
( 84DFBB8F $noname I00005 (null) {Lib=(null)}
( CT N04503 )
( RT N04515 )
( VR VR )
( FB1 N03927 )
( FB2 N04268 )
( GND GND_SIGNAL )
( LH1 N00181 )
( LH2 N00250 )
( LL1 N00195 )
( LL2 N00260 )
( VCC N04495 )
( COMP N05988 )
( INV1 N03902 )
( INV2 N04246 )
( SKIP N06666 )
(OUT1D N00716 )
(OUT1U N00901 )
(OUT2D N00489 )
(OUT2U N00266 )
(STBY1 N04518 )
(STBY2 PSON_42_ )
(TRIP1 N00221 )
(TRIP2 N00219 )
(VREF5 N00276 )
(SFTST1 N04507 )
(SFTST2 N04491 )
(OUTGND1 GND_SIGNAL )
(OUTGND2 GND_SIGNAL )
(REG5V_IN &_43_5V )
(VCC_CNTP N00247 )
)
( 84DFBB8F $noname I00015 (null) {Lib=(null)}
( &1 &_43_3_46_3V )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00017 (null) {Lib=(null)}
( &1 &_43_3_46_3V )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00019 (null) {Lib=(null)}
( &1 &_43_3_46_3V )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00021 (null) {Lib=(null)}
( &1 &_43_VB )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00023 (null) {Lib=(null)}
( &1 &_43_VB )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00025 (null) {Lib=(null)}
( &1 &_43_VB )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00027 (null) {Lib=(null)}
( &1 &_43_5V )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00029 (null) {Lib=(null)}
( &1 &_43_5V )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00031 (null) {Lib=(null)}
( &1 &_43_5V )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00033 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 &_43_3_46_3V )
)
( 84DFBB8F $noname I00035 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 &_43_VB )
)
( 84DFBB8F $noname I00037 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 &_43_5V )
)
( 84DFBB8F $noname I00039 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N03902 )
)
( 84DFBB8F $noname I00041 (null) {Lib=(null)}
( &1 N03902 )
( &2 N03924 )
)
( 84DFBB8F $noname I00043 (null) {Lib=(null)}
( &1 N03902 )
( &2 N03888 )
)
( 84DFBB8F $noname I00045 (null) {Lib=(null)}
( &1 N00195 )
( &2 N02117 )
)
( 84DFBB8F $noname I00047 (null) {Lib=(null)}
( &1 N00670 )
( &2 N00260 )
)
( 84DFBB8F $noname I00057 (null) {Lib=(null)}
( D N00247 )
( D N00247 )
( D N00247 )
( D N00247 )
( G N00911 )
( S N00195 )
( S N00195 )
( S N00195 )
)
( 84DFBB8F $noname I00059 (null) {Lib=(null)}
( D N00195 )
( D N00195 )
( D N00195 )
( D N00195 )
( G N00716 )
( S GND_SIGNAL )
( S GND_SIGNAL )
( S GND_SIGNAL )
)
( 84DFBB8F $noname I00061 (null) {Lib=(null)}
( D N00260 )
( D N00260 )
( D N00260 )
( D N00260 )
( G N00489 )
( S GND_SIGNAL )
( S GND_SIGNAL )
( S GND_SIGNAL )
)
( 84DFBB8F $noname I00063 (null) {Lib=(null)}
( D N00247 )
( D N00247 )
( D N00247 )
( D N00247 )
( G N00318 )
( S N00260 )
( S N00260 )
( S N00260 )
)
( 84DFBB8F $noname I00069 (null) {Lib=(null)}
(ANODE GND_SIGNAL )
(CATHODE N00195 )
)
( 84DFBB8F $noname I00071 (null) {Lib=(null)}
(ANODE GND_SIGNAL )
(CATHODE N00260 )
)
( 84DFBB8F $noname I00073 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N02117 )
)
( 84DFBB8F $noname I00075 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N00670 )
)
( 84DFBB8F $noname I00077 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N00247 )
)
( 84DFBB8F $noname I00081 (null) {Lib=(null)}
( &1 N02117 )
( &2 GND_SIGNAL )
( &3 &_43_3_46_3V )
)
( 84DFBB8F $noname I00083 (null) {Lib=(null)}
( &1 N00247 )
( &2 GND_SIGNAL )
( &3 &_43_VB )
)
( 84DFBB8F $noname I00085 (null) {Lib=(null)}
( &1 N00670 )
( &2 GND_SIGNAL )
( &3 &_43_5V )
)
( 84DFBB8F $noname I00099 (null) {Lib=(null)}
(ANODE N00276 )
(CATHODE N00181 )
)
( 84DFBB8F $noname I00101 (null) {Lib=(null)}
(ANODE N00276 )
(CATHODE N00250 )
)
( 84DFBB8F $noname I00103 (null) {Lib=(null)}
(ANODE &_43_5VSB )
(CATHODE &_43_VB )
)
( 84DFBB8F $noname I00105 (null) {Lib=(null)}
( GND GND_SIGNAL )
( VIN &_43_VB )
( VOUT &_43_5VSB )
)
( 84DFBB8F $noname I00107 (null) {Lib=(null)}
( &1 N00266 )
( &2 N00318 )
)
( 84DFBB8F $noname I00109 (null) {Lib=(null)}
( &1 N00219 )
( &2 N00247 )
)
( 84DFBB8F $noname I00111 (null) {Lib=(null)}
( &1 N00221 )
( &2 N00247 )
)
( 84DFBB8F $noname I00113 (null) {Lib=(null)}
( &1 N00901 )
( &2 N00911 )
)
( 84DFBB8F $noname I00115 (null) {Lib=(null)}
( &1 N03902 )
( &2 &_43_3_46_3V )
)
( 84DFBB8F $noname I00117 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N04515 )
)
( 84DFBB8F $noname I00119 (null) {Lib=(null)}
( &1 PSON_42_ )
( &2 N04518 )
)
( 84DFBB8F $noname I00121 (null) {Lib=(null)}
( &2 PSON_42_ )
(&_43_VB &_43_VB )
)
( 84DFBB8F $noname I00125 (null) {Lib=(null)}
( &1 PSON_42_ )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00127 (null) {Lib=(null)}
( &1 &_43_VB )
( &2 N05988 )
)
( 84DFBB8F $noname I00129 (null) {Lib=(null)}
( &1 N05988 )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00131 (null) {Lib=(null)}
( &1 N04265 )
( &2 N04246 )
)
( 84DFBB8F $noname I00133 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N04246 )
)
( 84DFBB8F $noname I00135 (null) {Lib=(null)}
( &1 N04246 )
( &2 N04243 )
)
( 84DFBB8F $noname I00137 (null) {Lib=(null)}
( &1 N04246 )
( &2 &_43_5V )
)
( 84DFBB8F $noname I00139 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N00247 )
)
( 84DFBB8F $noname I00141 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N00247 )
)
( 84DFBB8F $noname I00143 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 &_43_5VSB )
)
( 84DFBB8F $noname I00145 (null) {Lib=(null)}
( &1 N00221 )
( &2 N00247 )
)
( 84DFBB8F $noname I00147 (null) {Lib=(null)}
( &1 N00219 )
( &2 N00247 )
)
( 84DFBB8F $noname I00149 (null) {Lib=(null)}
( &1 N00250 )
( &2 N00260 )
)
( 84DFBB8F $noname I00151 (null) {Lib=(null)}
( &1 N00181 )
( &2 N00195 )
)
( 84DFBB8F $noname I00153 (null) {Lib=(null)}
( &1 N00276 )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00155 (null) {Lib=(null)}
( &1 N04243 )
( &2 &_43_5V )
)
( 84DFBB8F $noname I00157 (null) {Lib=(null)}
( &1 N04268 )
( &2 N04265 )
)
( 84DFBB8F $noname I00159 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N04491 )
)
( 84DFBB8F $noname I00161 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N04495 )
)
( 84DFBB8F $noname I00163 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 VR )
)
( 84DFBB8F $noname I00165 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N04503 )
)
( 84DFBB8F $noname I00167 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N04507 )
)
( 84DFBB8F $noname I00169 (null) {Lib=(null)}
( &1 N03924 )
( &2 N03927 )
)
( 84DFBB8F $noname I00171 (null) {Lib=(null)}
( &1 N03902 )
( &2 N03927 )
)
( 84DFBB8F $noname I00173 (null) {Lib=(null)}
( &1 N03888 )
( &2 &_43_3_46_3V )
)
( 84DFBB8F $noname I00175 (null) {Lib=(null)}
( &1 N05988 )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00177 (null) {Lib=(null)}
( &1 &_43_VB )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I00179 (null) {Lib=(null)}
( &1 &_43_5VSB )
( &2 GND_SIGNAL )
)
( 84DFBB8F $noname I04226 (null) {Lib=(null)}
( &1 N04268 )
( &2 N04246 )
)
( 84DFBB8F $noname I07258 (null) {Lib=(null)}
( &1 GND_SIGNAL )
( &2 N06666 )
)
( 84DFBB8F $noname I07341 (null) {Lib=(null)}
( &2 &_43_3_46_3V )
( &3 GND_SIGNAL )
( &4 &_43_5V )
( &5 GND_SIGNAL )
( &6 &_43_5V )
( &7 GND_SIGNAL )
( &8 &_43_5V )
( &11 &_43_3_46_3V )
( &15 GND_SIGNAL )
( &16 GND_SIGNAL )
( &17 GND_SIGNAL )
( &20 &_43_5V )
(&_43_5V &_43_5V )
(&_43_12V &_43_12V )
(PSON_42_ PSON_42_ )
(&_43_5VSB &_43_5VSB )
(GND_SIGNAL GND_SIGNAL )
(&_43_3_46_3V &_43_3_46_3V )
)
)
import/edif2kicad/examples/hptest deleted 100644 → 0
View file @ 1ad84c07
This diff is collapsed.
import/edif2kicad/examples/hptest.net deleted 100644 → 0
View file @ 1ad84c07
( { netlist created 13/9/2007-18:11:44 }
( 84DFBB8F $noname CMP1 (null) {Lib=(null)}
( A0 &_37_NET00001 )
( A1 &_37_NET00002 )
( A2 &_37_NET00003 )
( A3 &_37_NET00004 )
( A4 &_37_NET00005 )
( A5 &_37_NET00006 )
( A6 &_37_NET00007 )
( A7 &_37_NET00008 )
( A8 &_37_NET00009 )
(STATUS &_37_NET00016 )
(DEC_32_IN &_37_NET00020 )
(DEC_32_RST execute )
(ENC_32_ENB execute )
(ENC_32_OUT &_37_NET00017 )
(acknowledge acknowledge )
)
( 84DFBB8F $noname CMP10 (null) {Lib=(null)}
( m &_37_NET00006 )
( n GROUND )
)
( 84DFBB8F $noname CMP11 (null) {Lib=(null)}
( m &_37_NET00007 )
( n GROUND )
)
( 84DFBB8F $noname CMP12 (null) {Lib=(null)}
( m &_37_NET00008 )
( n GROUND )
)
( 84DFBB8F $noname CMP13 (null) {Lib=(null)}
( m &_37_NET00009 )
( n GROUND )
)
( 84DFBB8F $noname CMP17 (null) {Lib=(null)}
( x &_37_NET00033 )
( y &_37_NET00024 )
( z &_37_NET00017 )
( in &_37_NET00016 )
)
( 84DFBB8F $noname CMP18 (null) {Lib=(null)}
( x1 &_37_NET00021 )
( y1 &_37_NET00024 )
( z1 &_37_NET00033 )
)
( 84DFBB8F $noname CMP19 (null) {Lib=(null)}
( i &_37_NET00020 )
( o &_37_NET00021 )
)
( 84DFBB8F $noname CMP21 (null) {Lib=(null)}
( x &_37_NET00033 )
( y &_37_NET00033 )
( z &_37_NET00055 )
( in &_37_NET00067 )
)
( 84DFBB8F $noname CMP22 (null) {Lib=(null)}
( x1 &_37_NET00068 )
( y1 &_37_NET00033 )
( z1 &_37_NET00033 )
)
( 84DFBB8F $noname CMP23 (null) {Lib=(null)}
( t GROUND )
(execute execute )
)
( 84DFBB8F $noname CMP24 (null) {Lib=(null)}
( A0 GROUND )
( A1 GROUND )
( A2 GROUND )
( A3 GROUND )
( A4 GROUND )
( A5 GROUND )
( A6 GROUND )
( A7 GROUND )
(STATUS &_37_NET00046 )
(DEC_32_IN &_37_NET00060 )
(ENC_32_OUT &_37_NET00055 )
)
( 84DFBB8F $noname CMP25 (null) {Lib=(null)}
( i &_37_NET00067 )
( o &_37_NET00044 )
)
( 84DFBB8F $noname CMP26 (null) {Lib=(null)}
( i &_37_NET00067 )
( o &_37_NET00046 )
)
( 84DFBB8F $noname CMP28 (null) {Lib=(null)}
( q GROUND )
( t &_37_NET00067 )
)
( 84DFBB8F $noname CMP30 (null) {Lib=(null)}
( i &_37_NET00059 )
( o &_37_NET00068 )
)
( 84DFBB8F $noname CMP31 (null) {Lib=(null)}
( i &_37_NET00060 )
( o &_37_NET00068 )
)
( 84DFBB8F $noname CMP4 (null) {Lib=(null)}
( A0 GROUND )
( A1 GROUND )
( A2 GROUND )
( A3 GROUND )
( A4 GROUND )
( A5 GROUND )
( A6 GROUND )
( A7 GROUND )
( A8 GROUND )
(STATUS &_37_NET00044 )
(DEC_32_IN &_37_NET00059 )
(ENC_32_OUT &_37_NET00055 )
)
( 84DFBB8F $noname CMP5 (null) {Lib=(null)}
( m &_37_NET00001 )
( n GROUND )
)
( 84DFBB8F $noname CMP6 (null) {Lib=(null)}
( m &_37_NET00002 )
( n GROUND )
)
( 84DFBB8F $noname CMP7 (null) {Lib=(null)}
( m &_37_NET00003 )
( n GROUND )
)
( 84DFBB8F $noname CMP8 (null) {Lib=(null)}
( m &_37_NET00004 )
( n GROUND )
)
( 84DFBB8F $noname CMP9 (null) {Lib=(null)}
( m &_37_NET00005 )
( n GROUND )
)
)
import/edif2kicad/fctsys.h deleted 100644 → 0
View file @ 1ad84c07
/********************/
/* includes systeme */
/********************/
#include <stdio.h>
#include <stdlib.h>
#include <malloc.h>
#include <math.h>
#include <string.h>
#include <ctype.h>
#ifdef TO_DOS
#include <dos.h>
#include <pc.h>
#endif
#ifdef TO_LINUX
#define stricmp strcasecmp
#define strnicmp strncasecmp
#endif
/* fonctions */
// #include "priorque.h"
import/edif2kicad/makefile deleted 100644 → 0
View file @ 1ad84c07
#
# Makefile for EDIF parser.
#
# CFLAGS = -DDEBUG
# CFLAGS = -O
CC = gcc
CFLAGS = -g -static
SOURCES = edif.y
all : e2net ppedif e2sch
ppedif : ppedif.o
gcc $(CFLAGS) ppedif.c -o ppedif
e2net : ed.h eelibsl.h e2net.o edif.o savelib.o
gcc $(CFLAGS) e2net.o edif.o savelib.o -o e2net -lm
e2sch : ed.h eelibsl.h e2sch.o edif.o savelib.o
gcc $(CFLAGS) e2sch.o edif.o savelib.o -o e2sch -lm
savelib : fctsys.h eelibsl.h savelib.o
gcc $(CFLAGS) -c savelib.c
edif : ed.h eelibsl.h edif.o
gcc $(CFLAGS) -c edif.c
// main.o : main.c
edif.o : edif.c
edif.c : edif.y
bison -t -v -d edif.y
cp edif.tab.c edif.c
# mv y.tab.c edif.c
# edif.y : edif.y.1 edif.y.2
# cat edif.y.1 edif.y.2 > edif.y
clean :
rm *.o edif.c edif.output edif.tab.c edif.tab.h e2sch e2net ppedif
rm e2net.exe e2sch.exe ppedif.exe
import/edif2kicad/ppedif.c deleted 100644 → 0
View file @ 1ad84c07
#include <stdio.h>
id(int j)
{
printf("\n");
for( ; j>0 ; j--)
printf(" ");
}
main()
{
int ch, i=0, j=0, wh=0, last=0, instr=0 ;
while((ch = getchar()) != EOF){
switch (ch) {
case '(':
if( last == ')')
id(i);
i++; j=i+1;
wh=0;
break;
case ')':
if(--j == i){
printf(")");
if(i>0)i--;
last=ch;
continue;
}
wh=1;
break;
case '"':
instr ^=1;
break;
case '\r':
case '\n':
if(instr)
continue;
ch=' ';
break;
case ' ':
case '\t':
if(wh || last=='(')
continue;
break;
default:
wh=0;
break;
}
last = ch;
printf("%c", ch);
}
}
import/edif2kicad/savelib.c deleted 100644 → 0
View file @ 1ad84c07
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import/edif2kicad/test/750-2152-002-SCH_REVD.EDF deleted 100644 → 0
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import/edif2kicad/test/openrd.edf deleted 100644 → 0
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import/edif2kicad/test/panda.edf deleted 100644 → 0
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import/pcb123net2kicad/README deleted 100644 → 0
View file @ 1ad84c07
This a utility to convert a PCB123 netlist
to a kicad netlist.
created by Frank Bennett Thu Sep 13 16:33:01 MDT 200
No guarantees at all... You use pcb2kicad at your own risk.
This directory contains:
makefile
netL.l
netY.y
test.net
out.net
To Build on a Linux box:
make
To run a test:
pcb2kicad < pcb123.net >out.net
out.net can be edited to add actual part types or schematic symbol
references. KiCad netlist editor can also be used to select actual
footprints.
Note: Beware KiCad currently limits PinNames to 4 characters.
These name should probably be truncated to make KiCad happy.
EDIF import uses the Rename directive if present.
import/pcb123net2kicad/makefile deleted 100644 → 0
View file @ 1ad84c07
CFLAGS = -w
CC = gcc
# Expression evaluator program: pcb2kicad
pcb2kicad: netY.o netL.o
$(CC) $(CFLAGS) -o pcb2kicad netY.o netL.o -lm -lfl
netY.o:netY.y netL.c netY.h
bison -t -v -d netY.y
mv netY.tab.c netY.c
$(CC) $(CFLAGS) -DYYDEBUG -c netY.c
netL.c:netL.l netY.h
flex -t netL.l > netL.c
netY.h:netY.y
bison -d netY.y
mv netY.tab.h netY.h
clean:
rm *.o netL.c netY.c netY.h netY.tab.h *.output pcb2kicad
import/pcb123net2kicad/netL.l deleted 100644 → 0
View file @ 1ad84c07
%{
#include "netY.h"
#include <string.h>
void yyerror(char*);
int cont=0;
int lineno=0;
%}
%%
<<EOF>> {return 0;}
[+A-Za-z_$0-9]+ {yylval.str = strdup(yytext); return NAME;}
[&] {cont=1;}
[ \t]+ ;
[\n] {lineno++;
if( cont )
cont = 0;
else
return EOL;
}
[-,] {return yytext[0];}
. {ECHO; yyerror ("unexpected character");}
%%
int yywrap (void) {return 1;}
import/pcb123net2kicad/netY.y deleted 100644 → 0
View file @ 1ad84c07
%{
// #define YYDEBUG 1
#include <stdio.h>
extern int yydebug; // export yydebug so lexer can manipulate it
int nbug=0;
struct lst {
struct con *net;
struct lst *nxt;
} *clst=NULL, *lptr;
struct con {
char *ref;
char *pin;
char *nnam;
struct con *nxt;
} *cons=NULL, *cptr;
struct net {
char *nnam;
struct net *nxt;
struct con *nlst;
} *nets=NULL, *nptr;
%}
%union {char *str; int num;}
%start file
%token <str> NAME
%token EOL
%%
file : net
| file net
;
net : NAME '-''-''-''-' con EOL
{
if(nbug)printf("%s \n", $1);
// add netname to nets
nptr = (struct net *) malloc (sizeof (struct net));
nptr->nnam = $1;
nptr->nxt = nets;
nptr->nlst = cons;
nets = nptr;
while( cons != NULL ){
lptr = (struct lst *) malloc (sizeof (struct lst));
lptr->net = cons;
lptr->nxt = clst;
clst = lptr;
cons->nnam = $1;
cons = cons->nxt;
}
}
;
con : NAME '-' NAME
{
if(nbug)printf(" %s-%s ", $1, $3);
cptr = (struct con *) malloc (sizeof (struct con));
cptr->ref = $1;
cptr->pin = $3;
cptr->nxt = cons;
cons = cptr;
}
| con ',' NAME '-' NAME
{
if(nbug)printf(" %s-%s ", $3, $5);
cptr = (struct con *) malloc (sizeof (struct con));
cptr->ref = $3;
cptr->pin = $5;
cptr->nxt = cons;
cons = cptr;
}
;
%%
int main (void) {
int ch, i, first=1;
char line[80], s1[40], s2[40], *s;
extern lineno;
for( i=0; i<5; ){
if( (ch=getchar()) == '\n'){
i++;
lineno++;
}
if(nbug) putchar(ch);
}
yyparse ();
// bubble sort clist by ref
struct lst *a, *b, *c, *e = NULL, *tmp;
while(e != clst->nxt) {
c = a = clst; b = a->nxt;
while(a != e) {
sprintf(s1, "%s%5s", a->net->ref, a->net->pin);
sprintf(s2, "%s%5s", b->net->ref, b->net->pin);
if( strcmp( s1, s2 ) >0 ) {
if(a == clst) {
tmp = b->nxt; b->nxt = a; a->nxt = tmp;
clst = b; c = b;
} else {
tmp = b->nxt; b->nxt = a; a->nxt = tmp;
c->nxt = b; c = b;
}
} else {
c = a; a = a->nxt;
}
b = a->nxt;
if(b == e)
e = a;
}
}
#ifdef NOT
// dump connections by component
strcpy(s1, "" );
while (clst != NULL){
if(strcmp(s1, clst->net->ref) == 0)
printf("%4s %3s %s\n", clst->net->ref, clst->net->pin, clst->net->nnam);
else
printf("\n%4s %3s %s\n", clst->net->ref, clst->net->pin, clst->net->nnam);
strcpy(s1, clst->net->ref);
clst = clst->nxt;
}
// dump by netnames
while (nets != NULL){
printf("\n%s", nets->nnam);
cptr = nets->nlst;
while( cptr != NULL ){
printf(" %s.%s", cptr->ref, cptr->pin);
cptr = cptr->nxt;
}
nets = nets->nxt;
}
#endif
// output kicad netlist
printf("( { netlist created 13/9/2007-18:11:44 }\n");
// by component
strcpy(s1, "" );
while (clst != NULL){
if(strcmp(s1, clst->net->ref) != 0) {
if(!first) printf(" )\n");
printf(" ( 84DFBB8F SM0805 %s CAP {Lib=C}\n", clst->net->ref);
first=0;
}
printf(" (%5s %s )\n",clst->net->pin, clst->net->nnam);
strcpy(s1, clst->net->ref);
clst = clst->nxt;
}
printf(" )\n)\n");
#ifdef NOTNEEDED
// by net
printf("{ Pin List by Nets\n");
for( i=2 ; nets != NULL ; i++, nets = nets->nxt ){
printf("Net %d \"%s\"\n", i, nets->nnam);
for( cptr = nets->nlst; cptr != NULL ; cptr = cptr->nxt)
printf(" %s %s\n", cptr->ref, cptr->pin);
}
printf("}\n#End");
#endif
}
void yyerror (char *s) {
extern lineno;
extern char * yytext;
fprintf (stderr, "line %d %s\n'%s'\n", lineno, s, yytext);
}
import/pcb123net2kicad/pcb123.net deleted 100644 → 0
View file @ 1ad84c07
Netlist for design: test
Time: 13:29
Date: 8/25/07 Sat
Processing time:1.0
Number of signals found=83
VLEDN----j1-1,r11-2,r12-1,q1-1
VLED+----j1-2,d3-2,d4-2
+3v3----j1-4,j7-33,j7-35,u1-4,c7-1,u1-6,c6-1,r2-1,r1-1,c8-1,l1-2,j5-1,&
j5-33,j5-35,j6-1,j6-33,j6-35,u4-16,r18-1,r14-2,r15-2,r16-2,r17-2
R0----j1-5,j7-1
R1----j1-6,j7-2
R2----j1-7,j7-3
R3----j1-8,j7-4
R4----j1-9,j7-5
R5----j1-10,j7-6
R6----j1-11,j7-7
R7----j1-12,j7-8
G0----j1-13,j7-9
G1----j1-14,j7-10
G2----j1-15,j7-11
G3----j1-16,j7-12
G4----j1-17,j7-13
G5----j1-18,j7-14
G6----j1-19,j7-15
G7----j1-20,j7-16
B0----j1-21,j7-17
B1----j1-22,j7-18
B2----j1-23,j7-19
B3----j1-24,j7-20
B4----j1-25,j7-21
B5----j1-26,j7-22
B6----j1-27,j7-23
B7----j1-28,j7-24
PCLK----j1-30,j7-28
MODE----j1-31,j7-26
HSYNC----j1-32,j7-27
VSYNC----j1-33,j7-29
DVAL----j1-34,j7-25
+5V----j1-35,r7-1,l2-2,c11-1,u3-5,l4-1,c19-1,r13-1,t4-1,r19-2
X1----j1-37,u1-23,c5-1
Y1----j1-38,u1-22,c4-1
X2----j1-39,u1-21,c3-1
Y2----j1-40,u1-20,c2-1
SC0_TD----u1-1,j5-17
SC0_TK----u1-3,r3-1,j5-15
GCLK0----u1-7,r3-2,j5-22
SPI0_SCK----u1-8,j5-5,u4-1
SPI0_MISO----u1-9,j5-3,u4-2
SPI0_MOSI----u1-10,j5-4,u4-14
SPI0_CS2----u1-11,j5-8,t3-1
T_INT----u1-12,j6-25
def0----u1-16,r19-1
def1----u1-17,r20-1
def2----u1-18,c1-1
AVDD----u1-24,u1-28,l1-1
HPL----u1-25,x1-a4
VGND----u1-27,x1-b1
HPR----u1-29,x1-2
RESETN----u1-30,r1-2
SC0_TF----u1-31,j5-16
def3----u1-32,r2-2
SPI0_CS0----j5-6,t1-1
SPI0_CS1----j5-7,t2-1,u4-15
PWM0----j5-20,u3-4,r13-2,q1-2
PB_INT----j6-26,r18-2,d5-1,d6-1,d7-1,d8-1
FB1----u2-4,r6-1,r7-2
def4----u2-5,r8-2
def5----u2-6,c15-2
def6----u2-7,r9-2
FB2----u2-8,r4-1,r5-2
SW2----u2-13,c10-1,l3-1,d1-2
Vin----u2-14,u2-15,u2-23,j16-1
def7----u2-16,c10-2
def8----u2-18,c18-2
def9----u2-19,r10-2
def10----u2-20,c13-2
def11----u2-22,c9-2
SW1----u2-24,c9-1,l2-1,d2-2
+1v8----r5-1,l3-2,c12-1,t7-1,r20-2
def12----r8-1,c14-2
def13----r9-1,c16-2
def14----u3-1,d3-1,l4-2
def15----u3-3,d4-1,r11-1
P0----u4-3,r14-1,d5-2
P1----u4-4,r15-1,d6-2
P2----u4-5,r16-1,d7-2
P3----u4-6,r17-1,d8-2
def16----j99-42,j99-41
GROUND----h1-1,h2-1,h3-1,j1-3,j1-29,j1-36,j7-34,j7-36,u1-5,u1-19,u1-26,&
c1-2,c2-2,c3-2,c4-2,c5-2,c6-2,c7-2,c8-2,j5-2,j5-34,j5-36,j6-2,&
j6-34,j6-4,j6-36,u2-1,u2-12,u2-2,u2-3,u2-9,u2-10,u2-11,r4-2,r6-2,&
r10-1,c13-1,d1-1,d2-1,c11-2,c12-2,c14-1,c15-1,c16-1,c18-1,j16-2,&
u3-2,c19-2,r12-2,u4-8,q1-3,t5-1,t6-1,j99-2,j99-40,j99-19,j99-22,&
j99-24,j99-26,j99-30,j99-43
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