EEschema





8 - Netlist Creation.

8.1 - Overview.

This command allows you to create the netlist file for your design.
A netlist is a file which describes electrical connections between components.
One thus finds there
There are different netlist formats. Sometimes the component list and equipotential list are two separate files.
This netlist is fundamental in the use of schematic capture software, because the netlist is the link with other electronic CAD software, like:

Eeschema supports several netlist formats :

8.2 - Netlist formats.

Select the tool to open the netlist creation dialog box :

Pcbnew selected

Spice selected


Using the different tabs, you can select the desired format as the default format.
In Spice format, you can generate netlists with either equipotential names (it is more legible) or net numbers (old Spice versions accept numbers only)

By clicking the Netlist button, you will be asked for a netlist file name.
Note :
With big projects, the netlist generation can take a few minutes.

8.3 - Examples.

You can see below a schematic design using the PSPICE library :


Structure of a PCBNEW netlist :

# EESchema Netlist Version 1.0 generee le 21/1/1997-16:51:15
(
(32E35B76 $noname C2 1NF {Lib=C}
(1 0)
(2 VOUT_1)
)
(32CFC454 $noname V2 AC_0.1 {Lib=VSOURCE}
(1 N-000003)
(2 0)
)
(32CFC413 $noname C1 1UF {Lib=C}
(1 INPUT_1)
(2 N-000003)
)
(32CFC337 $noname V1 DC_12V {Lib=VSOURCE}
(1 +12V)
(2 0)
)
(32CFC293 $noname R2 10K {Lib=R}
(1 INPUT_1)
(2 0)
)
(32CFC288 $noname R6 22K {Lib=R}
(1 +12V)
(2 INPUT_1)
)
(32CFC27F $noname R5 22K {Lib=R}
(1 +12V)
(2 N-000008)
)
(32CFC277 $noname R1 10K {Lib=R}
(1 N-000008)
(2 0)
)
(32CFC25A $noname R7 470 {Lib=R}
(1 EMET_1)
(2 0)
)
(32CFC254 $noname R4 1K {Lib=R}
(1 +12V)
(2 VOUT_1)
)
(32CFC24C $noname R3 1K {Lib=R}
(1 +12V)
(2 N-000006)
)
(32CFC230 $noname Q2 Q2N2222 {Lib=NPN}
(1 VOUT_1)
(2 N-000008)
(3 EMET_1)
)
(32CFC227 $noname Q1 Q2N2222 {Lib=NPN}
(1 N-000006)
(2 INPUT_1)
(3 EMET_1)
)
)
# End


In PSPICE format, the netlist is as follows:

* EESchema Netlist Version 1.0 (Spice format) generee 24/10/2001-11:51:42

.model Q2N2222 npn (bf=200)
.AC LIN 300.100 1MEG
.PROBE

R8 DIRV_1 0.2.2K
R9 +12V INVS_1 470
Q3 INVS_1 VOUT_1 DIRV_1 Q2N2222
V2 N-000001 0 AC 0.1
C1 INPUT_1 N-000001 1UF
V1 +12V 0 cd. 12V
R2 INPUT_1 0 10K
R6 +12V INPUT_1 22K
R5 +12V N-000010 22K
R1 N-000010 0 10K
R7 EMET_1 0 470
R4 +12V VOUT_1 1K
R3 +12V N-000008 1K
Q2 VOUT_1 N-000010 EMET_1 Q2N2222
Q1 N-000008 INPUT_1 EMET_1 Q2N2222

.end


8.4 - Note.

8.4.1 - Precautions.

Many versions of software that exploit netlists do not accept spaces in the component names, pins, equipotentials or others.
Systematically avoid spaces in labels, or names and value fields of components or their pins.
In the same way, certain characters other than letters and numerals can induce problems.
Note that this limitation is not related to EESchema, but to netlist formats that can then become untranslatable, or to software which uses these netlists.

8.4.2 - PSPICE netlists.

For the Pspice simulator, you have to include some command lines in the netlist itself (.PROBE, .AC…).
Any text line included in the schematic diagram starting with the keyword .PSPICE will be inserted (without the keyword) at the top of the netlist.

For example: if you type the following text (and not the label!):
.PSPICE .PROBE
a line .PROBE will be inserted in the netlist.
In the previous example, three lines were inserted with this technique.

Besides, also note that the equipotential GND must be named 0 (zero) for Pspice.





Netlist. Page 8 - 1