It is usually a good idea to
define the outline of the board first. The outline is drawn as a
sequence of line segments. Select 'Edges pcb' as the
active layer and use the 'Add graphic line or polygon' tool to trace
the edge, clicking at the position of each vertex and
double-clicking to finish the outline. Boards usually have very
precise dimensions, so it may be necessary to use the displayed
cursor coordinates while tracing the outline. Remember that the
relative coordinates can be zeroed at any time using the space bar,
and that the display units can also be toggled using 'Alt-U'.
Relative coordinates enable very precise dimensions to be drawn. It
is possible to draw a circular (or arc) outline:
Select the 'Add graphic circle'
or 'Add graphic arc' tool
Click to fix the circle centre
Adjust the radius by moving the
mouse
Finish by clicking again.
Note that the width
of the outline can be adjusted, in the Parameters menu
(recommended width = 150 in 1/10 mils) or via the Options,
but this will not be visible unless the graphics are displayed in
other than outline mode.
The resulting outline might look
something like this:
6.1.2 - Reading the
netlist generated from the schematic
Activate the
icon to display the netlist dialog window:
If the name (path) of the netlist in
the window title is incorrect, use the 'Select' button to browse to
the desired netlist. Then 'Read' the netlist. Any
modules not already loaded will appear, superimposed one upon
another (we shall see below how to move them automatically).
If none of the modules have been
placed, all of the modules will appear on the board in the same
place, making them difficult to recognise. It is possible to arrange
them automatically (using the command 'Global Place/Move module'
accessed via the right mouse button). Here is the result of such
automatic arrangement:
Important note:
If a board is modified by replacing
an existing module with a new one (for example changing a 1/8W
resistance to 1/2W) in CVPCB, it will be necessary to delete the
existing component before PCBNEW will load the replacement module.
However, if a module is to be replaced by
an existing module, this is easier
to do using the module dialog accessed by clicking the right mouse
button over the module in question.
6.2 - Correcting
a board
It is very often necessary to
correct a board following the corresponding change in the schematic.
6.2.1 - Steps
to follow:
Create a new netlist from the
modified schematic.
If new components have been added,
link these to their corresponding modules in cvpcb.
Read the new netlist in pcbnew.
6.2.2 - Deleting
incorrect tracks:
Pcbnew is able to
delete automatically tracks that have become incorrect as a result
of modifications. To do this, check the 'Delete' option in the 'Bad
tracks deletion' box of the netlist dialog:
However,
it is often quicker to modify such tracks by hand (the DRC function
allows their identification).
6.2.3 - Deleted
components:
Pcbnew
does not automatically
delete modules corresponding
to components that have been removed from the schematic –
these must be deleted by hand. This convention is necesary because
there are often modules (holes for fixation screws, for instance)
that are added to the PCB that never appear in the schematic.
6.2.4 - Modified
modules:
If a
module is modified in the netlist (using Cvpcb), but the
module has already been placed, it will not be modified by Pcbnew,
unless the corresponding option of the 'Exchange module' box of the
netlist dialog is checked:
Changing a
module (replacing a resistance with one of a different size, for
instance) can be effected directly by editing the module.
6.2.5 - Advanced
options - selection using time stamps:
Sometimes
the notation of the schematic is changed, without any material
changes in the circuit (this would concern the references - like R5,
U4...).The PCB is therefore unchanged (except possibly for the
silkscreen markings). Nevertheless, internally, components and
modules are represented by their reference. In this situation, the
'Timestamp' option of the netlist dialog may be selected before
rereading the netlist:
With this
option, pcbnew no longer identifies modules by their reference, but
by their time stamp instead. The time stamp is automatically
generated by Eeschema (it is the time and date when the component
was placed in the schematic).
Great
care should be exercised when using this option (save the file
first!)
This is
because the technique is complicated in the case of components
containing multiple parts (e.g. a 7400 has 4 parts and one case). In
this situation, the time stamp is not uniquely defined (for the 7400
there would be up to four – one for each part). Nevertheless,
the time stamp option usually resolves reannotation problems.